MCC'2024- Execution of r291-tajo-171654447700172

About the Execution of LoLA for PolyORBLF-COL-S06J04T04

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
1966.220	272397.00	286883.00	57.70	FTFFTFFFFFFF?TFF	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2024-input.r291-tajo-171654447700172.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2024-input.qcow2' backing_fmt='qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is PolyORBLF-COL-S06J04T04, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r291-tajo-171654447700172
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 576K
-rw-r--r-- 1 mcc users 7.2K Apr 11 17:33 CTLCardinality.txt
-rw-r--r-- 1 mcc users 62K Apr 11 17:33 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Apr 11 17:31 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Apr 11 17:31 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Apr 23 07:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 23 07:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 23 07:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 23 07:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 11 17:58 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 103K Apr 11 17:58 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.6K Apr 11 17:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 65K Apr 11 17:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 10 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 154K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-00
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-01
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-02
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-03
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-04
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-05
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-06
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-07
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-08
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-09
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-10
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-11
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-12
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-13
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-14
FORMULA_NAME PolyORBLF-COL-S06J04T04-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717054374289

FORMULA PolyORBLF-COL-S06J04T04-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J04T04-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J04T04-LTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J04T04-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J04T04-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J04T04-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J04T04-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J04T04-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J04T04-LTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J04T04-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J04T04-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J04T04-LTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J04T04-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J04T04-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J04T04-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[32mPolyORBLF-COL-S06J04T04-LTLFireability-01: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mPolyORBLF-COL-S06J04T04-LTLFireability-04: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-05: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m] [1m[33mPolyORBLF-COL-S06J04T04-LTLFireability-12: LTL unknown AGGR[0m
[[35mlola[0m] [1m[32mPolyORBLF-COL-S06J04T04-LTLFireability-13: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 272 secs. Pages in use: 58

BK_STOP 1717054646686

--------------------
content from stderr:

[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 56 (type SKEL/CNST) for 34 PolyORBLF-COL-S06J04T04-LTLFireability-10
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 56 (type SKEL/CNST) for PolyORBLF-COL-S06J04T04-LTLFireability-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] Places: 454, Transitions: 6994
[[35mlola[0m][W] findlow criterion violated for transition 59
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][W] findlow criterion violated for transition 38
[[35mlola[0m][W] findlow criterion violated for transition 60
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][W] findlow criterion violated for transition 4
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][W] findlow criterion violated for transition 23
[[35mlola[0m][W] findlow criterion violated for transition 9
[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 41 PolyORBLF-COL-S06J04T04-LTLFireability-11
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 42 (type EXCL) for PolyORBLF-COL-S06J04T04-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 158
[[35mlola[0m][I] fired transitions : 158
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 PolyORBLF-COL-S06J04T04-LTLFireability-14
[[35mlola[0m][I] time limit : 199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 51 (type EXCL) for PolyORBLF-COL-S06J04T04-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 9
[[35mlola[0m][I] fired transitions : 9
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 45 (type EXCL) for 44 PolyORBLF-COL-S06J04T04-LTLFireability-12
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-00: CONJ 0 2 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-08: LTL 0 1 0 0 0 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-10: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 45 LTL EXCL 1/211 1/2000 PolyORBLF-COL-S06J04T04-LTLFireability-12 19183 m, 3836 m/sec, 33239 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] findlow criterion violated for 16 clusters
[[35mlola[0m][I] Time for checking findlow: 6
[[35mlola[0m][I] LAUNCH task # 57 (type SKEL/SRCH) for 28 PolyORBLF-COL-S06J04T04-LTLFireability-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 57 (type SKEL/SRCH) for PolyORBLF-COL-S06J04T04-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 255
[[35mlola[0m][I] fired transitions : 259
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-10: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 45 LTL EXCL 6/239 2/2000 PolyORBLF-COL-S06J04T04-LTLFireability-12 130752 m, 22313 m/sec, 157976 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPolyORBLF-COL-S06J04T04-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-10: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S06J04T04-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 45 LTL EXCL 11/239 3/2000 PolyORBLF-COL-S06J04T04-LTLFireability-12 243107 m, 22471 m/sec, 286564 t fired, .
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[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 34 PolyORBLF-COL-S06J04T04-LTLFireability-10
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 39 (type EXCL) for PolyORBLF-COL-S06J04T04-LTLFireability-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 9
[[35mlola[0m][I] fired transitions : 9
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 PolyORBLF-COL-S06J04T04-LTLFireability-09
[[35mlola[0m][I] time limit : 277 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 32 (type EXCL) for PolyORBLF-COL-S06J04T04-LTLFireability-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 9
[[35mlola[0m][I] fired transitions : 9
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 PolyORBLF-COL-S06J04T04-LTLFireability-08
[[35mlola[0m][I] time limit : 302 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for PolyORBLF-COL-S06J04T04-LTLFireability-08
[[35mlola[0m][I] result : false
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[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 PolyORBLF-COL-S06J04T04-LTLFireability-07
[[35mlola[0m][I] time limit : 333 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 26 (type EXCL) for PolyORBLF-COL-S06J04T04-LTLFireability-07
[[35mlola[0m][I] result : false
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[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 20 (type EXCL) for 19 PolyORBLF-COL-S06J04T04-LTLFireability-05
[[35mlola[0m][I] time limit : 370 sec
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[[35mlola[0m][I] FINISHED task # 20 (type EXCL) for PolyORBLF-COL-S06J04T04-LTLFireability-05
[[35mlola[0m][I] result : false
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[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 16 PolyORBLF-COL-S06J04T04-LTLFireability-04
[[35mlola[0m][I] time limit : 416 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 17 (type EXCL) for PolyORBLF-COL-S06J04T04-LTLFireability-04
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[[35mlola[0m][I] time limit : 475 sec
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[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 PolyORBLF-COL-S06J04T04-LTLFireability-02
[[35mlola[0m][I] time limit : 555 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 11 (type EXCL) for PolyORBLF-COL-S06J04T04-LTLFireability-02
[[35mlola[0m][I] result : false
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[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 8 (type EXCL) for 7 PolyORBLF-COL-S06J04T04-LTLFireability-01
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[[35mlola[0m][I] FINISHED task # 8 (type EXCL) for PolyORBLF-COL-S06J04T04-LTLFireability-01
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[[35mlola[0m][I] time limit : 832 sec
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[[35mlola[0m][I] FINISHED task # 5 (type EXCL) for PolyORBLF-COL-S06J04T04-LTLFireability-00
[[35mlola[0m][I] result : false
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[[35mlola[0m][I] LAUNCH task # 54 (type EXCL) for 53 PolyORBLF-COL-S06J04T04-LTLFireability-15
[[35mlola[0m][I] time limit : 1665 sec
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[[35mlola[0m][I] FINISHED task # 54 (type EXCL) for PolyORBLF-COL-S06J04T04-LTLFireability-15
[[35mlola[0m][I] result : false
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[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 PolyORBLF-COL-S06J04T04-LTLFireability-06
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[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for PolyORBLF-COL-S06J04T04-LTLFireability-06
[[35mlola[0m][I] result : false
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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PolyORBLF-COL-S06J04T04"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is PolyORBLF-COL-S06J04T04, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r291-tajo-171654447700172"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PolyORBLF-COL-S06J04T04.tgz
mv PolyORBLF-COL-S06J04T04 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;