About the Execution of LoLA for PolyORBLF-COL-S04J06T06
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 0.000 | 663071.00 | 0.00 | 0.00 | [undef] | Cannot compute |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2024-input.r291-tajo-171654447700146.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2024-input.qcow2' backing_fmt='qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is PolyORBLF-COL-S04J06T06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r291-tajo-171654447700146
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 612K
-rw-r--r-- 1 mcc users 7.5K Apr 11 17:09 CTLCardinality.txt
-rw-r--r-- 1 mcc users 68K Apr 11 17:09 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Apr 11 17:06 CTLFireability.txt
-rw-r--r-- 1 mcc users 59K Apr 11 17:06 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Apr 23 07:43 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 23 07:43 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Apr 23 07:43 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 11 17:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 115K Apr 11 17:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.5K Apr 11 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Apr 11 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 10 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 154K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-00
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-01
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-02
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-03
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-04
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-05
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-06
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-07
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-08
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-09
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-10
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-11
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-12
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-13
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-14
FORMULA_NAME PolyORBLF-COL-S04J06T06-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717052687101
BK_STOP 1717053350172
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] LAUNCH task # 69 (type SKEL/FNDP) for 24 PolyORBLF-COL-S04J06T06-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 70 (type SKEL/EQUN) for 24 PolyORBLF-COL-S04J06T06-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 71 (type SKEL/SRCH) for 24 PolyORBLF-COL-S04J06T06-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 69 (type SKEL/FNDP) for PolyORBLF-COL-S04J06T06-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 70 (type EQUN) for PolyORBLF-COL-S04J06T06-CTLFireability-2024-08 (obsolete)
[[35mlola[0m][W] CANCELED task # 71 (type SRCH) for PolyORBLF-COL-S04J06T06-CTLFireability-2024-08 (obsolete)
[[35mlola[0m][I] FINISHED task # 71 (type SKEL/SRCH) for PolyORBLF-COL-S04J06T06-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 11
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Places: 618, Transitions: 3190
[[35mlola[0m][I] FINISHED task # 70 (type SKEL/EQUN) for PolyORBLF-COL-S04J06T06-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 PolyORBLF-COL-S04J06T06-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 171 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 76 (type EQUN) for 55 PolyORBLF-COL-S04J06T06-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 77 (type FNDP) for 24 PolyORBLF-COL-S04J06T06-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 78 (type EQUN) for 24 PolyORBLF-COL-S04J06T06-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 77 (type FNDP) for PolyORBLF-COL-S04J06T06-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 78 (type EQUN) for PolyORBLF-COL-S04J06T06-CTLFireability-2024-08 (obsolete)
[[35mlola[0m][I] LAUNCH task # 83 (type EQUN) for 6 PolyORBLF-COL-S04J06T06-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 76 (type EQUN) for PolyORBLF-COL-S04J06T06-CTLFireability-2024-13
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 84 (type FNDP) for 55 PolyORBLF-COL-S04J06T06-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 85 (type EQUN) for 55 PolyORBLF-COL-S04J06T06-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 84 (type FNDP) for PolyORBLF-COL-S04J06T06-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 85 (type EQUN) for PolyORBLF-COL-S04J06T06-CTLFireability-2024-13 (obsolete)
[[35mlola[0m][I] FINISHED task # 85 (type EQUN) for PolyORBLF-COL-S04J06T06-CTLFireability-2024-13
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-02: EXEG 0 1 1 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-08: DISJ 0 2 0 0 6 0 0 2
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-10: DISJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-13: CONJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 4/189 4/2000 PolyORBLF-COL-S04J06T06-CTLFireability-2024-03 383716 m, 76743 m/sec, 732933 t fired, .
[[35mlola[0m][.] 83 EF STEQ 2/3597 0/5 PolyORBLF-COL-S04J06T06-CTLFireability-2024-02 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 4
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[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
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[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-02: EXEG 0 1 1 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-08: DISJ 0 2 0 0 6 0 0 2
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-10: DISJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-13: CONJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 9/189 9/2000 PolyORBLF-COL-S04J06T06-CTLFireability-2024-03 983359 m, 119928 m/sec, 1944633 t fired, .
[[35mlola[0m][.] 83 EF STEQ 7/3597 0/5 PolyORBLF-COL-S04J06T06-CTLFireability-2024-02 sara not yet started (preprocessing).
[[35mlola[0m][.]
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[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-02: EXEG 0 1 1 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-08: DISJ 0 2 0 0 6 0 0 2
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-10: DISJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-13: CONJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 14/189 15/2000 PolyORBLF-COL-S04J06T06-CTLFireability-2024-03 1620177 m, 127363 m/sec, 3387492 t fired, .
[[35mlola[0m][.] 83 EF STEQ 12/3597 0/5 PolyORBLF-COL-S04J06T06-CTLFireability-2024-02 sara not yet started (preprocessing).
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[[35mlola[0m][I] FINISHED task # 78 (type EQUN) for PolyORBLF-COL-S04J06T06-CTLFireability-2024-08
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
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[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-02: EXEG 0 1 1 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-08: DISJ 0 2 0 0 7 0 0 1
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-10: DISJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-13: CONJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 19/189 22/2000 PolyORBLF-COL-S04J06T06-CTLFireability-2024-03 2313941 m, 138752 m/sec, 4792391 t fired, .
[[35mlola[0m][.] 83 EF STEQ 17/3597 0/5 PolyORBLF-COL-S04J06T06-CTLFireability-2024-02 sara not yet started (preprocessing).
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[[35mlola[0m][I] FINISHED task # 83 (type EQUN) for PolyORBLF-COL-S04J06T06-CTLFireability-2024-02
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
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[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PolyORBLF-COL-S04J06T06-CTLFireability-2024-02: EXEG 0 1 0 0 2 0 0 0
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 414 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PolyORBLF-COL-S04J06T06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is PolyORBLF-COL-S04J06T06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r291-tajo-171654447700146"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PolyORBLF-COL-S04J06T06.tgz
mv PolyORBLF-COL-S04J06T06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;