About the Execution of LoLA for PhaseVariation-PT-D20CS010
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 10589.304 | 3261062.00 | 3995184.00 | 11459.80 | F?FF?T??FF?FT?TT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r269-smll-171654408700346.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
.............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is PhaseVariation-PT-D20CS010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r269-smll-171654408700346
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 14M
-rw-r--r-- 1 mcc users 8.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.3K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.6K Apr 23 07:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 23 07:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.7K May 19 07:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 19 18:45 LTLFireability.xml
-rw-r--r-- 1 mcc users 18K Apr 11 21:26 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 159K Apr 11 21:26 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 15K Apr 11 21:20 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 79K Apr 11 21:20 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 23 07:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 23 07:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 9 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 13M May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2024-00
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2024-01
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2024-02
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2024-03
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2024-04
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2024-05
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2024-06
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2024-07
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2024-08
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2024-09
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2024-10
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2024-11
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2023-12
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2023-13
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2023-14
FORMULA_NAME PhaseVariation-PT-D20CS010-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717193497510
FORMULA PhaseVariation-PT-D20CS010-CTLFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D20CS010-CTLFireability-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D20CS010-CTLFireability-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D20CS010-CTLFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D20CS010-CTLFireability-2023-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D20CS010-CTLFireability-2023-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D20CS010-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D20CS010-CTLFireability-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D20CS010-CTLFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D20CS010-CTLFireability-2023-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m] [1m[33mPhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL unknown AGGR[0m
[[35mlola[0m] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m] [1m[33mPhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL unknown AGGR[0m
[[35mlola[0m] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m] [1m[33mPhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL unknown AGGR[0m
[[35mlola[0m] [1m[33mPhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL unknown AGGR[0m
[[35mlola[0m] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m] [1m[33mPhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL unknown AGGR[0m
[[35mlola[0m] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m] [1m[33mPhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL unknown AGGR[0m
[[35mlola[0m] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL true CTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 3260 secs. Pages in use: 78
BK_STOP 1717196758572
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 52 transitions removed,2 places removed
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 8 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 13 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 18 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 23 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 28 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 33 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 38 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 43 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 48 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 53 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 58 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 63 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 68 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 73 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 78 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 83 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 88 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 93 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 98 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 103 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 108 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 113 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 118 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 59 (type EXCL) for 0 PhaseVariation-PT-D20CS010-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 193 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 57 (type FNDP) for 0 PhaseVariation-PT-D20CS010-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 58 (type EQUN) for 0 PhaseVariation-PT-D20CS010-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 57 (type FNDP) for PhaseVariation-PT-D20CS010-CTLFireability-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 58 (type EQUN) for PhaseVariation-PT-D20CS010-CTLFireability-2024-00 (obsolete)
[[35mlola[0m][W] CANCELED task # 59 (type EXCL) for PhaseVariation-PT-D20CS010-CTLFireability-2024-00 (obsolete)
[[35mlola[0m][I] FINISHED task # 58 (type EQUN) for PhaseVariation-PT-D20CS010-CTLFireability-2024-00
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 123 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 128 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 133 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 138 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 143 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 148 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 153 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 158 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 6 PhaseVariation-PT-D20CS010-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 202 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 CTL EXCL 0/202 0/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-02 --
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for PhaseVariation-PT-D20CS010-CTLFireability-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 26
[[35mlola[0m][I] fired transitions : 25
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 18 (type EXCL) for 17 PhaseVariation-PT-D20CS010-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 245 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 18 (type EXCL) for PhaseVariation-PT-D20CS010-CTLFireability-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 399
[[35mlola[0m][I] fired transitions : 816
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 24 (type EXCL) for 23 PhaseVariation-PT-D20CS010-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 263 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 24 (type EXCL) for PhaseVariation-PT-D20CS010-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4326
[[35mlola[0m][I] fired transitions : 4347
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 21 (type EXCL) for 20 PhaseVariation-PT-D20CS010-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 285 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 3/285 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 20696 m, 4139 m/sec, 376921 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 8/285 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 47019 m, 5264 m/sec, 993238 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 13/285 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 74014 m, 5399 m/sec, 1615650 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 18/285 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 99046 m, 5006 m/sec, 2262917 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 190 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 23/285 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 120831 m, 4357 m/sec, 2949867 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 195 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 28/285 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 148468 m, 5527 m/sec, 3514634 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 200 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 33/285 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 171580 m, 4622 m/sec, 4140557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 205 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 38/285 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 193736 m, 4431 m/sec, 4776248 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 210 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 43/285 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 218560 m, 4964 m/sec, 5374982 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 215 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 48/285 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 243785 m, 5045 m/sec, 5967257 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 220 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 53/285 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 265958 m, 4434 m/sec, 6600324 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 225 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 58/285 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 287185 m, 4245 m/sec, 7243697 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 230 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 63/285 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 308042 m, 4171 m/sec, 7891865 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 235 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 68/285 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 328378 m, 4067 m/sec, 8544203 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 240 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 73/285 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 347323 m, 3789 m/sec, 9216966 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 245 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 78/285 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 370569 m, 4649 m/sec, 9838108 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 250 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 83/285 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 395706 m, 5027 m/sec, 10436923 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 255 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 88/285 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 420776 m, 5014 m/sec, 11034007 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 260 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 93/285 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 446085 m, 5061 m/sec, 11622455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 265 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 98/285 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 467710 m, 4325 m/sec, 12264236 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 270 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 103/285 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 493591 m, 5176 m/sec, 12850288 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 275 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 108/285 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 517748 m, 4831 m/sec, 13460016 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 280 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 113/285 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 540719 m, 4594 m/sec, 14082154 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 285 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 118/285 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 564020 m, 4660 m/sec, 14697925 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 290 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 123/285 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 589337 m, 5063 m/sec, 15286525 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 295 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 128/285 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 612501 m, 4632 m/sec, 15901411 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 300 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 133/285 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 632464 m, 3992 m/sec, 16559613 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 305 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 138/285 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 653915 m, 4290 m/sec, 17197285 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 310 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 143/285 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 675560 m, 4329 m/sec, 17829857 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 315 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 148/285 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 694840 m, 3856 m/sec, 18493969 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 320 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 153/285 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 712761 m, 3584 m/sec, 19180268 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 325 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 158/285 6/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 735055 m, 4458 m/sec, 19803424 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 163/285 6/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 755470 m, 4083 m/sec, 20453409 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 168/285 6/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 775149 m, 3935 m/sec, 21110287 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 173/285 6/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 796358 m, 4241 m/sec, 21741154 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 178/285 6/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 814625 m, 3653 m/sec, 22411099 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 183/285 6/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 832749 m, 3624 m/sec, 23092320 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 188/285 6/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 854810 m, 4412 m/sec, 23720525 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 193/285 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 874202 m, 3878 m/sec, 24385153 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 198/285 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 893100 m, 3779 m/sec, 25047674 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 203/285 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 911404 m, 3660 m/sec, 25718947 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 208/285 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 931195 m, 3958 m/sec, 26368219 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 213/285 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 952197 m, 4200 m/sec, 26999410 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 218/285 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 970720 m, 3704 m/sec, 27662926 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 223/285 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 987584 m, 3372 m/sec, 28354920 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 228/285 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 1005711 m, 3625 m/sec, 29030259 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 233/285 8/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 1023776 m, 3613 m/sec, 29705527 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 238/285 8/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 1040550 m, 3354 m/sec, 30396855 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 243/285 8/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 1056274 m, 3144 m/sec, 31102836 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 248/285 8/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 1077520 m, 4249 m/sec, 31741360 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 420 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 253/285 8/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 1102503 m, 4996 m/sec, 32334868 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 425 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 258/285 8/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 1127991 m, 5097 m/sec, 32919616 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 430 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 263/285 8/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 1153400 m, 5081 m/sec, 33503633 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 435 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 268/285 9/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 1174872 m, 4294 m/sec, 34142660 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 440 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 273/285 9/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 1199907 m, 5007 m/sec, 34732726 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 445 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 278/285 9/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 1224157 m, 4850 m/sec, 35334760 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 450 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 283/285 9/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 1247163 m, 4601 m/sec, 35949330 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 455 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 21 (type EXCL) for PhaseVariation-PT-D20CS010-CTLFireability-2024-04 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 460 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 PhaseVariation-PT-D20CS010-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 285 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 21 (type EXCL) for 20 PhaseVariation-PT-D20CS010-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 3140 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 51 (type EXCL) for PhaseVariation-PT-D20CS010-CTLFireability-2023-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 398
[[35mlola[0m][I] fired transitions : 397
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 4/285 1/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 25196 m, -244393 m/sec, 465699 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 465 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 9/285 1/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 50619 m, 5084 m/sec, 1059256 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 470 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 14/285 1/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 75972 m, 5070 m/sec, 1653445 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 475 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 19/285 1/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 99352 m, 4676 m/sec, 2272852 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 480 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 24/285 1/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 119709 m, 4071 m/sec, 2934952 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 485 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 29/285 2/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 147628 m, 5583 m/sec, 3492264 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 490 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 34/285 2/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 170708 m, 4616 m/sec, 4118133 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 495 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 39/285 2/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 192976 m, 4453 m/sec, 4750570 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 500 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 44/285 2/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 217472 m, 4899 m/sec, 5350845 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 505 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 49/285 2/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 242792 m, 5064 m/sec, 5936860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 510 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 54/285 2/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 264992 m, 4440 m/sec, 6568347 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 515 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 59/285 3/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 286116 m, 4224 m/sec, 7214941 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 520 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 64/285 3/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 306817 m, 4140 m/sec, 7865012 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 525 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 69/285 3/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 327600 m, 4156 m/sec, 8508127 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 530 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 74/285 3/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 346357 m, 3751 m/sec, 9180757 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 535 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 79/285 3/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 368756 m, 4479 m/sec, 9811507 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 540 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 84/285 3/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 393877 m, 5024 m/sec, 10406336 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 545 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 89/285 3/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 419429 m, 5110 m/sec, 10993566 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 550 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 94/285 4/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 444895 m, 5093 m/sec, 11579439 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 555 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 99/285 4/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 466412 m, 4303 m/sec, 12220860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 560 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 104/285 4/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 491670 m, 5051 m/sec, 12812348 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 565 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 109/285 4/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 515985 m, 4863 m/sec, 13418404 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 570 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 114/285 4/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 539138 m, 4630 m/sec, 14036789 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 575 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 119/285 4/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 562163 m, 4605 m/sec, 14651705 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 580 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 124/285 5/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 587213 m, 5010 m/sec, 15238258 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 585 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 129/285 5/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 610432 m, 4643 m/sec, 15849007 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 590 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 134/285 5/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 630078 m, 3929 m/sec, 16506971 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 595 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 139/285 5/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 652107 m, 4405 m/sec, 17132552 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 600 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 144/285 5/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 673520 m, 4282 m/sec, 17764739 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 605 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 149/285 5/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 692989 m, 3893 m/sec, 18423639 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 610 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 154/285 5/5 PhaseVariation-PT-D20CS010-CTLFireability-2024-04 709729 m, 3348 m/sec, 19106432 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 615 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 21 (type EXCL) for PhaseVariation-PT-D20CS010-CTLFireability-2024-04 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 620 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 47 PhaseVariation-PT-D20CS010-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 298 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 5/298 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 21329 m, 4265 m/sec, 392047 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 625 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 10/298 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 41472 m, 4028 m/sec, 898007 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 630 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 15/298 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 62206 m, 4146 m/sec, 1377588 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 635 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 20/298 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 82486 m, 4056 m/sec, 1844073 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 640 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 25/298 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 102344 m, 3971 m/sec, 2379893 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 645 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 30/298 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 120041 m, 3539 m/sec, 2954828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 650 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 35/298 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 141222 m, 4236 m/sec, 3369232 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 655 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 40/298 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 161388 m, 4033 m/sec, 3900846 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 660 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 45/298 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 181651 m, 4052 m/sec, 4435277 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 665 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 50/298 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 200043 m, 3678 m/sec, 4991326 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 670 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 55/298 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 220510 m, 4093 m/sec, 5484913 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 675 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 60/298 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 240973 m, 4092 m/sec, 5941375 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 680 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 65/298 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 260409 m, 3887 m/sec, 6487198 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 685 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 70/298 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 278494 m, 3617 m/sec, 7073764 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 690 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 75/298 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 297492 m, 3799 m/sec, 7646203 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 695 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 80/298 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 316687 m, 3839 m/sec, 8199612 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 700 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 85/298 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 334466 m, 3555 m/sec, 8798031 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 705 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 90/298 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 350418 m, 3190 m/sec, 9431104 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 710 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 95/298 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 370248 m, 3966 m/sec, 9877558 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 715 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 100/298 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 390672 m, 4084 m/sec, 10378843 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 720 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 105/298 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 411284 m, 4122 m/sec, 10837137 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 725 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 110/298 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 431565 m, 4056 m/sec, 11304737 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 730 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 115/298 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 451398 m, 3966 m/sec, 11835452 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 735 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 120/298 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 469187 m, 3557 m/sec, 12436176 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 740 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 125/298 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 489984 m, 4159 m/sec, 12845902 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 745 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 130/298 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 510109 m, 4025 m/sec, 13362237 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 750 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 135/298 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 530651 m, 4108 m/sec, 13882369 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 755 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 140/298 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 548623 m, 3594 m/sec, 14469196 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 760 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 145/298 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 569405 m, 4156 m/sec, 14927278 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 765 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 150/298 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 589639 m, 4046 m/sec, 15391360 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 770 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 155/298 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 609404 m, 3953 m/sec, 15924539 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 775 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 160/298 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 626862 m, 3491 m/sec, 16524625 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 780 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 165/298 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 646338 m, 3895 m/sec, 17076723 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 785 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 170/298 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 665276 m, 3787 m/sec, 17632124 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 790 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 175/298 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 683031 m, 3551 m/sec, 18227673 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 795 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 180/298 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 699570 m, 3307 m/sec, 18845391 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 800 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 185/298 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 717466 m, 3579 m/sec, 19424728 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 805 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 190/298 6/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 736579 m, 3822 m/sec, 19980576 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 810 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 195/298 6/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 755052 m, 3694 m/sec, 20547937 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 815 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 200/298 6/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 772641 m, 3517 m/sec, 21140519 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 820 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 205/298 6/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 791329 m, 3737 m/sec, 21708556 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 825 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 210/298 6/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 808396 m, 3413 m/sec, 22316360 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 830 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 215/298 6/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 823420 m, 3004 m/sec, 22961230 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 835 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 220/298 6/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 843286 m, 3973 m/sec, 23492278 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 840 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 225/298 6/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 861199 m, 3582 m/sec, 24081688 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 845 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 230/298 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 878812 m, 3522 m/sec, 24681000 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 850 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 235/298 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 895367 m, 3311 m/sec, 25295331 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 855 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 240/298 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 912968 m, 3520 m/sec, 25871016 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 860 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 245/298 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 930541 m, 3514 m/sec, 26460409 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 865 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 250/298 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 949124 m, 3716 m/sec, 27027331 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 870 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 255/298 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 966037 m, 3382 m/sec, 27633644 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 875 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 260/298 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 980926 m, 2977 m/sec, 28275635 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 880 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 265/298 7/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 997874 m, 3389 m/sec, 28878517 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 885 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 270/298 8/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 1013965 m, 3218 m/sec, 29493897 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 890 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 275/298 8/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 1029830 m, 3173 m/sec, 30108323 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 895 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 280/298 8/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 1044712 m, 2976 m/sec, 30740966 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 900 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 285/298 8/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 1058123 m, 2682 m/sec, 31403720 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 905 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 290/298 8/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 1078224 m, 4020 m/sec, 31827181 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 910 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 295/298 8/2000 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 1098229 m, 4001 m/sec, 32338940 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 915 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 48 (type EXCL) for PhaseVariation-PT-D20CS010-CTLFireability-2023-13 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 920 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 45 (type EXCL) for 44 PhaseVariation-PT-D20CS010-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 297 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 47 PhaseVariation-PT-D20CS010-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 2680 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 45 (type EXCL) for PhaseVariation-PT-D20CS010-CTLFireability-2023-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 49032
[[35mlola[0m][I] fired transitions : 189470
[[35mlola[0m][I] time used : 4
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 4/297 1/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 19097 m, -215826 m/sec, 351087 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 925 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 9/297 1/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 39239 m, 4028 m/sec, 867686 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 930 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 14/297 1/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 60016 m, 4155 m/sec, 1317784 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 935 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 19/297 1/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 80336 m, 4064 m/sec, 1782159 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 940 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 24/297 1/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 100198 m, 3972 m/sec, 2316957 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 945 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 29/297 1/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 117694 m, 3499 m/sec, 2920986 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 950 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 34/297 1/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 138834 m, 4228 m/sec, 3319271 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 955 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 39/297 2/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 159063 m, 4045 m/sec, 3841667 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 960 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 44/297 2/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 179482 m, 4083 m/sec, 4368551 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 965 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 49/297 2/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 197561 m, 3615 m/sec, 4943481 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 970 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 54/297 2/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 217693 m, 4026 m/sec, 5397869 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 975 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 59/297 2/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 238459 m, 4153 m/sec, 5876889 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 980 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 64/297 2/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 258973 m, 4102 m/sec, 6435399 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 985 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 69/297 2/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 277573 m, 3720 m/sec, 7047372 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 990 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 74/297 3/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 297333 m, 3952 m/sec, 7641218 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 995 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 79/297 3/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 317194 m, 3972 m/sec, 8216969 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1000 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 84/297 3/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 335658 m, 3692 m/sec, 8837820 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1005 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 89/297 3/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 351916 m, 3251 m/sec, 9503708 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1010 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 94/297 3/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 373565 m, 4329 m/sec, 9936111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1015 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 99/297 3/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 394680 m, 4223 m/sec, 10460249 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1020 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 104/297 3/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 416149 m, 4293 m/sec, 10974354 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1025 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 109/297 4/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 437502 m, 4270 m/sec, 11458518 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1030 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 114/297 4/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 457673 m, 4034 m/sec, 12028916 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1035 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 119/297 4/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 475936 m, 3652 m/sec, 12567448 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1040 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 124/297 4/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 496815 m, 4175 m/sec, 13000598 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1045 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 129/297 4/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 516668 m, 3970 m/sec, 13519104 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1050 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 134/297 4/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 536449 m, 3956 m/sec, 14060758 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1055 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 139/297 4/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 555022 m, 3714 m/sec, 14586818 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1060 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 144/297 5/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 574933 m, 3982 m/sec, 15087676 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1065 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 149/297 5/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 595505 m, 4114 m/sec, 15544435 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1070 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 154/297 5/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 614582 m, 3815 m/sec, 16094026 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1075 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 159/297 5/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 632806 m, 3644 m/sec, 16665544 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1080 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 164/297 5/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 651145 m, 3667 m/sec, 17244136 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1085 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 169/297 5/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 670289 m, 3828 m/sec, 17790198 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1090 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 174/297 5/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 687911 m, 3524 m/sec, 18382206 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1095 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 179/297 5/5 PhaseVariation-PT-D20CS010-CTLFireability-2023-13 703487 m, 3115 m/sec, 19014710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1100 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 48 (type EXCL) for PhaseVariation-PT-D20CS010-CTLFireability-2023-13 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1105 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 41 PhaseVariation-PT-D20CS010-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 311 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 42 (type EXCL) for PhaseVariation-PT-D20CS010-CTLFireability-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 398
[[35mlola[0m][I] fired transitions : 1195
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 38 PhaseVariation-PT-D20CS010-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 356 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 5/356 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 27624 m, 5524 m/sec, 528294 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1110 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 10/356 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 52758 m, 5026 m/sec, 1117861 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1115 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 15/356 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 78099 m, 5068 m/sec, 1704451 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1120 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 20/356 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 101081 m, 4596 m/sec, 2314413 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1125 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 25/356 1/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 121459 m, 4075 m/sec, 2961695 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1130 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 30/356 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 148587 m, 5425 m/sec, 3518477 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1135 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 35/356 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 171298 m, 4542 m/sec, 4135024 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1140 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 40/356 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 193192 m, 4378 m/sec, 4757557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1145 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 45/356 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 217594 m, 4880 m/sec, 5355592 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1150 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 50/356 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 243863 m, 5253 m/sec, 5970478 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1155 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 55/356 2/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 266900 m, 4607 m/sec, 6635215 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1160 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 60/356 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 289275 m, 4475 m/sec, 7316747 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1165 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 65/356 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 312109 m, 4566 m/sec, 7994903 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1170 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 70/356 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 333230 m, 4224 m/sec, 8695374 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1175 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 75/356 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 352244 m, 3802 m/sec, 9424366 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1180 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 80/356 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 380401 m, 5631 m/sec, 10036639 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1185 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 85/356 3/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 407156 m, 5351 m/sec, 10668391 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1190 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 90/356 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 434058 m, 5380 m/sec, 11294993 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1195 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 95/356 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 458463 m, 4881 m/sec, 11954653 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1200 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 100/356 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 482193 m, 4746 m/sec, 12624803 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1205 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 105/356 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 509651 m, 5491 m/sec, 13245954 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1210 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 110/356 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 534682 m, 5006 m/sec, 13897729 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1215 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 115/356 4/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 557997 m, 4663 m/sec, 14570934 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1220 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 120/356 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 584784 m, 5357 m/sec, 15196826 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1225 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 125/356 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 610108 m, 5064 m/sec, 15839724 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1230 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 130/356 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 631360 m, 4250 m/sec, 16537250 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1235 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 135/356 5/2000 PhaseVariation-PT-D20CS010-CTLFireability-2024-10 654335 m, 4595 m/sec, 17211617 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1240 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-00: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPhaseVariation-PT-D20CS010-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPhaseVariation-PT-D20CS010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PhaseVariation-PT-D20CS010-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PhaseVariation-PT-D20CS010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is PhaseVariation-PT-D20CS010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r269-smll-171654408700346"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PhaseVariation-PT-D20CS010.tgz
mv PhaseVariation-PT-D20CS010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;