About the Execution of LoLA for PermAdmissibility-PT-05
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16206.976 | 1391814.00 | 2795844.00 | 6659.00 | ?????????F???T?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r269-smll-171654408300170.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is PermAdmissibility-PT-05, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r269-smll-171654408300170
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.8M
-rw-r--r-- 1 mcc users 11K Apr 12 09:13 CTLCardinality.txt
-rw-r--r-- 1 mcc users 106K Apr 12 09:13 CTLCardinality.xml
-rw-r--r-- 1 mcc users 57K Apr 12 09:10 CTLFireability.txt
-rw-r--r-- 1 mcc users 296K Apr 12 09:10 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.9K Apr 23 07:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 31K Apr 23 07:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 14K Apr 23 07:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 54K Apr 23 07:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 12 09:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 130K Apr 12 09:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115K Apr 12 09:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 590K Apr 12 09:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 23 07:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.5K Apr 23 07:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 336K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-00
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-01
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-02
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-03
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-04
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-05
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-06
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-07
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-08
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-09
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-10
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-11
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-12
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-13
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-14
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717098272549
FORMULA PermAdmissibility-PT-05-CTLFireability-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-PT-05-CTLFireability-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717099664363
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL) for 13 PermAdmissibility-PT-05-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 99 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 80 (type FNDP) for 39 PermAdmissibility-PT-05-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 81 (type EQUN) for 39 PermAdmissibility-PT-05-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 80 (type FNDP) for PermAdmissibility-PT-05-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 6
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 81 (type EQUN) for PermAdmissibility-PT-05-CTLFireability-2024-09 (obsolete)
[[35mlola[0m][I] FINISHED task # 81 (type EQUN) for PermAdmissibility-PT-05-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 85 (type FNDP) for 39 PermAdmissibility-PT-05-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 86 (type EQUN) for 39 PermAdmissibility-PT-05-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 96 (type EQUN) for 19 PermAdmissibility-PT-05-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 85 (type FNDP) for PermAdmissibility-PT-05-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 86 (type EQUN) for PermAdmissibility-PT-05-CTLFireability-2024-09 (obsolete)
[[35mlola[0m][I] LAUNCH task # 102 (type EQUN) for 36 PermAdmissibility-PT-05-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 104 (type EQUN) for 36 PermAdmissibility-PT-05-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 104 (type EQUN) for PermAdmissibility-PT-05-CTLFireability-2024-08
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 109 (type FNDP) for 71 PermAdmissibility-PT-05-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 109 (type FNDP) for PermAdmissibility-PT-05-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 31
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 98 (type EQUN) for 19 PermAdmissibility-PT-05-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 98 (type EQUN) for PermAdmissibility-PT-05-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 102 (type EQUN) for PermAdmissibility-PT-05-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 86 (type EQUN) for PermAdmissibility-PT-05-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 1 0 4 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 5/211 5/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 880280 m, 176056 m/sec, 1437608 t fired, .
[[35mlola[0m][.] 96 EF STEQ 4/3598 0/5 PermAdmissibility-PT-05-CTLFireability-2024-05 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 1 0 4 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 10/211 9/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 1841068 m, 192157 m/sec, 3156344 t fired, .
[[35mlola[0m][.] 96 EF STEQ 9/3598 0/5 PermAdmissibility-PT-05-CTLFireability-2024-05 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 1 0 4 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 15/211 14/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 2796772 m, 191140 m/sec, 4837960 t fired, .
[[35mlola[0m][.] 96 EF STEQ 14/3598 0/5 PermAdmissibility-PT-05-CTLFireability-2024-05 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 16 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 1 0 4 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 20/211 18/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 3719596 m, 184564 m/sec, 6459659 t fired, .
[[35mlola[0m][.] 96 EF STEQ 19/3598 0/5 PermAdmissibility-PT-05-CTLFireability-2024-05 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 21 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 1 0 4 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 25/211 22/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 4636138 m, 183308 m/sec, 8122483 t fired, .
[[35mlola[0m][.] 96 EF STEQ 24/3598 0/5 PermAdmissibility-PT-05-CTLFireability-2024-05 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 26 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 96 (type EQUN) for PermAdmissibility-PT-05-CTLFireability-2024-05
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 30/211 27/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 5568195 m, 186411 m/sec, 9747667 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 31 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 35/211 31/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 6478274 m, 182015 m/sec, 11695709 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 36 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 40/211 35/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 7426289 m, 189603 m/sec, 13440261 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 41 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 45/211 40/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 8347737 m, 184289 m/sec, 15169241 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 46 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 50/211 44/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 9257614 m, 181975 m/sec, 16819778 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 51 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 55/211 48/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 10127936 m, 174064 m/sec, 18714013 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 56 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 60/211 52/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 11027910 m, 179994 m/sec, 20505226 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 61 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 65/211 56/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 11958344 m, 186086 m/sec, 22131342 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 66 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 70/211 60/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 12845196 m, 177370 m/sec, 23833133 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 71 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 75/211 64/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 13753899 m, 181740 m/sec, 25395352 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 76 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 80/211 68/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 14668838 m, 182987 m/sec, 27086525 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 81 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 85/211 72/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 15550709 m, 176374 m/sec, 28905640 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 86 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 90/211 76/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 16421097 m, 174077 m/sec, 30745886 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 91 secs. Pages in use: 76
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 95/211 80/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 17295399 m, 174860 m/sec, 32447984 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 96 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 100/211 84/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 18142928 m, 169505 m/sec, 34156176 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 101 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 105/211 88/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 19043452 m, 180104 m/sec, 35804334 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 106 secs. Pages in use: 88
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 110/211 91/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 19827615 m, 156832 m/sec, 37779093 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 111 secs. Pages in use: 91
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 115/211 95/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 20616643 m, 157805 m/sec, 39759340 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 116 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 120/211 98/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 21434936 m, 163658 m/sec, 41685703 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 121 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 125/211 102/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 22337180 m, 180448 m/sec, 43579275 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 126 secs. Pages in use: 102
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 130/211 107/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 23251477 m, 182859 m/sec, 45480100 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 131 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 135/211 111/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 24135022 m, 176709 m/sec, 47382401 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 136 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 140/211 115/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 25042450 m, 181485 m/sec, 49315452 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 141 secs. Pages in use: 115
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 145/211 119/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 25981852 m, 187880 m/sec, 51187670 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 146 secs. Pages in use: 119
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 150/211 124/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 26877373 m, 179104 m/sec, 53068605 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 151 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 155/211 128/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 27793571 m, 183239 m/sec, 54891161 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 156 secs. Pages in use: 128
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 160/211 132/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 28696562 m, 180598 m/sec, 56745627 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 161 secs. Pages in use: 132
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 165/211 136/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 29596258 m, 179939 m/sec, 58634343 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 166 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 170/211 140/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 30483135 m, 177375 m/sec, 60491919 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 171 secs. Pages in use: 140
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 175/211 144/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 31360244 m, 175421 m/sec, 62387542 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 176 secs. Pages in use: 144
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 180/211 148/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 32250156 m, 177982 m/sec, 64280283 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 181 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 185/211 152/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 33132806 m, 176530 m/sec, 66175868 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 186 secs. Pages in use: 152
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 190/211 156/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 33976870 m, 168812 m/sec, 68120804 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 191 secs. Pages in use: 156
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 195/211 159/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 34849854 m, 174596 m/sec, 69974345 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 196 secs. Pages in use: 159
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 200/211 163/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 35722018 m, 174432 m/sec, 71977814 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 201 secs. Pages in use: 163
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 205/211 168/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 36626608 m, 180918 m/sec, 73673356 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 206 secs. Pages in use: 168
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 210/211 172/2000 PermAdmissibility-PT-05-CTLFireability-2024-03 37524747 m, 179627 m/sec, 75408400 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 211 secs. Pages in use: 172
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 14 (type EXCL) for PermAdmissibility-PT-05-CTLFireability-2024-03 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 216 secs. Pages in use: 176
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 78 (type EXCL) for 77 PermAdmissibility-PT-05-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL) for 13 PermAdmissibility-PT-05-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 3384 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 78 (type EXCL) for PermAdmissibility-PT-05-CTLFireability-2024-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 81
[[35mlola[0m][I] fired transitions : 480
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] CANCELED task # 14 (type EXCL) for PermAdmissibility-PT-05-CTLFireability-2024-03 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 221 secs. Pages in use: 181
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 75 (type EXCL) for 74 PermAdmissibility-PT-05-CTLFireability-2024-14
[[35mlola[0m][I] time limit : 225 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 75 (type EXCL) for PermAdmissibility-PT-05-CTLFireability-2024-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 137
[[35mlola[0m][I] fired transitions : 176
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 69 (type EXCL) for 68 PermAdmissibility-PT-05-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 241 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 5/241 3/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 472281 m, 94456 m/sec, 2903341 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 226 secs. Pages in use: 181
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 10/241 4/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 871876 m, 79919 m/sec, 6155787 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 231 secs. Pages in use: 181
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 15/241 6/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 1258387 m, 77302 m/sec, 9296200 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 236 secs. Pages in use: 182
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 20/241 8/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 1647057 m, 77734 m/sec, 12445708 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 241 secs. Pages in use: 184
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 25/241 9/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 2020604 m, 74709 m/sec, 15721049 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 246 secs. Pages in use: 185
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 30/241 11/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 2384746 m, 72828 m/sec, 18948989 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 251 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 35/241 12/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 2699599 m, 62970 m/sec, 22157782 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 256 secs. Pages in use: 188
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 40/241 13/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 2962614 m, 52603 m/sec, 25386825 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 261 secs. Pages in use: 189
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 45/241 14/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 3196616 m, 46800 m/sec, 28638460 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 266 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 50/241 15/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 3455451 m, 51767 m/sec, 31814101 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 271 secs. Pages in use: 191
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 55/241 16/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 3710036 m, 50917 m/sec, 35122195 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 276 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 60/241 18/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 4020343 m, 62061 m/sec, 38340073 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 281 secs. Pages in use: 194
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 65/241 19/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 4313663 m, 58664 m/sec, 41686578 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 286 secs. Pages in use: 195
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 70/241 20/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 4649680 m, 67203 m/sec, 44856629 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 291 secs. Pages in use: 196
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 75/241 22/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 4959214 m, 61906 m/sec, 48128365 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 296 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 80/241 23/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 5285190 m, 65195 m/sec, 51304564 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 301 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 85/241 24/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 5542833 m, 51528 m/sec, 54672888 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 306 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 90/241 25/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 5849094 m, 61252 m/sec, 57770482 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 311 secs. Pages in use: 201
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 95/241 27/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 6191967 m, 68574 m/sec, 60833293 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 316 secs. Pages in use: 203
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 100/241 28/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 6484266 m, 58459 m/sec, 64065472 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 321 secs. Pages in use: 204
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 105/241 29/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 6762901 m, 55727 m/sec, 67360818 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 326 secs. Pages in use: 205
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 110/241 31/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 7046549 m, 56729 m/sec, 70550823 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 331 secs. Pages in use: 207
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 115/241 32/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 7335795 m, 57849 m/sec, 73717969 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 336 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 120/241 33/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 7596852 m, 52211 m/sec, 76968898 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 341 secs. Pages in use: 209
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 125/241 34/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 7887322 m, 58094 m/sec, 80067084 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 346 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 130/241 35/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 8192417 m, 61019 m/sec, 83094934 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 351 secs. Pages in use: 211
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 135/241 37/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 8491567 m, 59830 m/sec, 86184654 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 356 secs. Pages in use: 213
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 140/241 38/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 8794897 m, 60666 m/sec, 89212993 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 361 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 145/241 39/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 9115833 m, 64187 m/sec, 92241518 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 366 secs. Pages in use: 215
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 150/241 41/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 9457343 m, 68302 m/sec, 95377549 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 371 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 155/241 42/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 9736876 m, 55906 m/sec, 98692851 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 376 secs. Pages in use: 218
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 160/241 43/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 10014022 m, 55429 m/sec, 101989071 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 381 secs. Pages in use: 219
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 165/241 45/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 10345499 m, 66295 m/sec, 105123856 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 386 secs. Pages in use: 221
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 170/241 46/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 10638763 m, 58652 m/sec, 108324524 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 391 secs. Pages in use: 222
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 175/241 47/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 10917394 m, 55726 m/sec, 111576612 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 396 secs. Pages in use: 223
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 180/241 48/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 11232237 m, 62968 m/sec, 114732475 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 401 secs. Pages in use: 224
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 185/241 49/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 11475942 m, 48741 m/sec, 118049611 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 406 secs. Pages in use: 225
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 190/241 50/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 11708932 m, 46598 m/sec, 121331165 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 411 secs. Pages in use: 226
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 195/241 52/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 12031313 m, 64476 m/sec, 124281677 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 416 secs. Pages in use: 228
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 200/241 53/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 12346912 m, 63119 m/sec, 127311964 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 421 secs. Pages in use: 229
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 205/241 54/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 12641556 m, 58928 m/sec, 130451384 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 426 secs. Pages in use: 230
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 210/241 55/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 12910684 m, 53825 m/sec, 133643472 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 431 secs. Pages in use: 231
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 215/241 57/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 13195815 m, 57026 m/sec, 136740363 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 436 secs. Pages in use: 233
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 220/241 58/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 13449592 m, 50755 m/sec, 139898751 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 441 secs. Pages in use: 234
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 225/241 59/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 13713168 m, 52715 m/sec, 143028228 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 446 secs. Pages in use: 235
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 230/241 60/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 14011385 m, 59643 m/sec, 146007934 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 451 secs. Pages in use: 236
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 235/241 61/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 14296714 m, 57065 m/sec, 149023139 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 456 secs. Pages in use: 237
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 240/241 63/2000 PermAdmissibility-PT-05-CTLFireability-2024-12 14584653 m, 57587 m/sec, 151981016 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 461 secs. Pages in use: 239
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 69 (type EXCL) for PermAdmissibility-PT-05-CTLFireability-2024-12 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 466 secs. Pages in use: 240
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 66 (type EXCL) for 65 PermAdmissibility-PT-05-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 241 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 69 (type EXCL) for 68 PermAdmissibility-PT-05-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 3134 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 66 (type EXCL) for PermAdmissibility-PT-05-CTLFireability-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 81
[[35mlola[0m][I] fired transitions : 81
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 5/241 3/5 PermAdmissibility-PT-05-CTLFireability-2024-12 469105 m, -2823109 m/sec, 2876496 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 471 secs. Pages in use: 245
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 10/241 4/5 PermAdmissibility-PT-05-CTLFireability-2024-12 846595 m, 75498 m/sec, 5981915 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 476 secs. Pages in use: 247
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 69 (type EXCL) for PermAdmissibility-PT-05-CTLFireability-2024-12 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 481 secs. Pages in use: 249
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 PermAdmissibility-PT-05-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 259 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 5/259 2/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 407331 m, 81466 m/sec, 1300464 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 486 secs. Pages in use: 249
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 10/259 4/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 792160 m, 76965 m/sec, 2586957 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 491 secs. Pages in use: 250
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 15/259 6/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 1169020 m, 75372 m/sec, 3875777 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 496 secs. Pages in use: 253
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 20/259 7/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 1528116 m, 71819 m/sec, 5151933 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 501 secs. Pages in use: 255
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 25/259 9/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 1886667 m, 71710 m/sec, 6389939 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 506 secs. Pages in use: 258
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 30/259 10/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 2285950 m, 79856 m/sec, 7629913 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 511 secs. Pages in use: 260
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 35/259 12/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 2649271 m, 72664 m/sec, 8862211 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 516 secs. Pages in use: 263
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 40/259 13/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 3004863 m, 71118 m/sec, 10079143 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 521 secs. Pages in use: 265
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 45/259 15/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 3374232 m, 73873 m/sec, 11271932 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 526 secs. Pages in use: 268
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 50/259 17/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 3718746 m, 68902 m/sec, 12551133 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 531 secs. Pages in use: 271
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 55/259 18/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 4085662 m, 73383 m/sec, 13796823 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 536 secs. Pages in use: 274
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 60/259 20/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 4424436 m, 67754 m/sec, 15023220 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 541 secs. Pages in use: 277
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 65/259 21/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 4758288 m, 66770 m/sec, 16258780 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 546 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 70/259 22/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 5095813 m, 67505 m/sec, 17489345 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 551 secs. Pages in use: 281
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 75/259 24/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 5424054 m, 65648 m/sec, 18704921 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 556 secs. Pages in use: 284
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 80/259 25/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 5750247 m, 65238 m/sec, 19923960 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 561 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 85/259 27/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 6154656 m, 80881 m/sec, 21038882 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 566 secs. Pages in use: 289
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 90/259 29/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 6514923 m, 72053 m/sec, 22252094 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 571 secs. Pages in use: 292
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 95/259 30/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 6881777 m, 73370 m/sec, 23494119 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 576 secs. Pages in use: 294
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 100/259 32/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 7227279 m, 69100 m/sec, 24708507 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 581 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 105/259 33/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 7585635 m, 71671 m/sec, 25898311 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 586 secs. Pages in use: 299
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 110/259 35/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 7927021 m, 68277 m/sec, 27094788 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 591 secs. Pages in use: 302
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 115/259 36/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 8254497 m, 65495 m/sec, 28284784 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 596 secs. Pages in use: 304
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 120/259 38/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 8610212 m, 71143 m/sec, 29418005 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 601 secs. Pages in use: 307
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 125/259 39/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 8953031 m, 68563 m/sec, 30649312 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 606 secs. Pages in use: 309
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 130/259 41/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 9292325 m, 67858 m/sec, 31848085 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 611 secs. Pages in use: 312
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 135/259 42/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 9631747 m, 67884 m/sec, 33029647 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 616 secs. Pages in use: 314
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 140/259 43/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 9949723 m, 63595 m/sec, 34217897 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 621 secs. Pages in use: 316
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 145/259 45/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 10275739 m, 65203 m/sec, 35382707 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 626 secs. Pages in use: 319
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 150/259 46/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 10638267 m, 72505 m/sec, 36470850 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 631 secs. Pages in use: 321
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 155/259 48/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 11031410 m, 78628 m/sec, 37766270 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 636 secs. Pages in use: 324
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 160/259 50/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 11392285 m, 72175 m/sec, 39026960 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 641 secs. Pages in use: 327
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 165/259 51/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 11756527 m, 72848 m/sec, 40265152 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 646 secs. Pages in use: 329
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 170/259 53/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 12123281 m, 73350 m/sec, 41486488 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 651 secs. Pages in use: 332
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 175/259 54/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 12508392 m, 77022 m/sec, 42662379 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 656 secs. Pages in use: 334
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 180/259 56/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 12873716 m, 73064 m/sec, 43883516 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 661 secs. Pages in use: 337
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 185/259 57/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 13193387 m, 63934 m/sec, 45119692 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 666 secs. Pages in use: 339
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 190/259 59/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 13545862 m, 70495 m/sec, 46301501 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 671 secs. Pages in use: 342
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 195/259 60/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 13923528 m, 75533 m/sec, 47500803 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 676 secs. Pages in use: 344
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 200/259 62/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 14244549 m, 64204 m/sec, 48760121 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 681 secs. Pages in use: 347
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 205/259 63/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 14587393 m, 68568 m/sec, 49966408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 686 secs. Pages in use: 349
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 210/259 65/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 14943844 m, 71290 m/sec, 51119506 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 691 secs. Pages in use: 352
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 215/259 66/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 15240625 m, 59356 m/sec, 52381045 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 696 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 220/259 68/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 15596086 m, 71092 m/sec, 53531301 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 701 secs. Pages in use: 357
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 225/259 69/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 15926082 m, 65999 m/sec, 54732110 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 706 secs. Pages in use: 359
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 230/259 70/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 16247166 m, 64216 m/sec, 55898587 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 711 secs. Pages in use: 360
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 235/259 72/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 16582421 m, 67051 m/sec, 57094930 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 716 secs. Pages in use: 363
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 240/259 73/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 16904298 m, 64375 m/sec, 58268400 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 721 secs. Pages in use: 365
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 245/259 75/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 17239055 m, 66951 m/sec, 59399397 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 726 secs. Pages in use: 368
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 250/259 76/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 17583649 m, 68918 m/sec, 60545426 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 731 secs. Pages in use: 370
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 255/259 78/2000 PermAdmissibility-PT-05-CTLFireability-2024-07 17950312 m, 73332 m/sec, 61736079 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 736 secs. Pages in use: 373
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 34 (type EXCL) for PermAdmissibility-PT-05-CTLFireability-2024-07 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 741 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 PermAdmissibility-PT-05-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 259 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 PermAdmissibility-PT-05-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 2859 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 5/259 2/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 356619 m, 71323 m/sec, 2603574 t fired, .
[[35mlola[0m][.] 34 CTL EXCL 5/2859 2/5 PermAdmissibility-PT-05-CTLFireability-2024-07 397292 m, -3510604 m/sec, 1263727 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 746 secs. Pages in use: 380
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 10/259 3/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 651300 m, 58936 m/sec, 5308753 t fired, .
[[35mlola[0m][.] 34 CTL EXCL 10/238 4/5 PermAdmissibility-PT-05-CTLFireability-2024-07 770583 m, 74658 m/sec, 2511438 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 751 secs. Pages in use: 385
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 15/259 5/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 943921 m, 58524 m/sec, 8053524 t fired, .
[[35mlola[0m][.] 34 CTL EXCL 15/238 5/5 PermAdmissibility-PT-05-CTLFireability-2024-07 1139480 m, 73779 m/sec, 3768950 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 756 secs. Pages in use: 389
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 34 (type EXCL) for PermAdmissibility-PT-05-CTLFireability-2024-07 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 20/259 6/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 1218327 m, 54881 m/sec, 10702708 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 761 secs. Pages in use: 389
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 25/259 7/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 1496180 m, 55570 m/sec, 13359039 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 766 secs. Pages in use: 389
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 30/259 8/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 1776875 m, 56139 m/sec, 16064966 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 771 secs. Pages in use: 390
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 35/259 9/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 2036152 m, 51855 m/sec, 18783300 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 776 secs. Pages in use: 392
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 40/259 10/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 2302244 m, 53218 m/sec, 21508803 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 781 secs. Pages in use: 394
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 45/259 11/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 2544262 m, 48403 m/sec, 24297427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 786 secs. Pages in use: 396
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 50/259 12/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 2789857 m, 49119 m/sec, 27030404 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 791 secs. Pages in use: 398
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 55/259 13/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 2983389 m, 38706 m/sec, 29952007 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 796 secs. Pages in use: 401
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 60/259 14/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 3165514 m, 36425 m/sec, 32872584 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 801 secs. Pages in use: 403
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 65/259 15/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 3372506 m, 41398 m/sec, 35730871 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 806 secs. Pages in use: 405
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 70/259 16/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 3570275 m, 39553 m/sec, 38617065 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 811 secs. Pages in use: 407
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 75/259 17/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 3775694 m, 41083 m/sec, 41501262 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 816 secs. Pages in use: 409
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 80/259 18/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 4023562 m, 49573 m/sec, 44327301 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 821 secs. Pages in use: 410
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 85/259 19/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 4249278 m, 45143 m/sec, 47249080 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 826 secs. Pages in use: 411
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 90/259 20/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 4512933 m, 52731 m/sec, 50035445 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 831 secs. Pages in use: 412
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 95/259 21/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 4740687 m, 45550 m/sec, 52909325 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 836 secs. Pages in use: 413
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 100/259 22/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 4985439 m, 48950 m/sec, 55756687 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 841 secs. Pages in use: 415
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 105/259 23/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 5246529 m, 52218 m/sec, 58563016 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 846 secs. Pages in use: 417
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 110/259 24/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 5458957 m, 42485 m/sec, 61554465 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 851 secs. Pages in use: 418
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 115/259 25/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 5670883 m, 42385 m/sec, 64492474 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 856 secs. Pages in use: 420
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 120/259 26/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 5929419 m, 51707 m/sec, 67262776 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 861 secs. Pages in use: 422
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 125/259 27/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 6208369 m, 55790 m/sec, 69990634 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 866 secs. Pages in use: 424
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 130/259 28/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 6430817 m, 44489 m/sec, 72775707 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 871 secs. Pages in use: 426
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 135/259 29/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 6638599 m, 41556 m/sec, 75626310 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 876 secs. Pages in use: 427
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 140/259 30/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 6867321 m, 45744 m/sec, 78434548 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 881 secs. Pages in use: 429
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 145/259 31/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 7092974 m, 45130 m/sec, 81216028 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 886 secs. Pages in use: 431
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 150/259 32/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 7307266 m, 42858 m/sec, 83952997 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 891 secs. Pages in use: 434
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 155/259 32/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 7494471 m, 37441 m/sec, 86811052 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 896 secs. Pages in use: 435
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 160/259 33/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 7732283 m, 47562 m/sec, 89509887 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 901 secs. Pages in use: 437
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 165/259 34/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 7948679 m, 43279 m/sec, 92234171 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 906 secs. Pages in use: 439
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 170/259 35/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 8186901 m, 47644 m/sec, 94904188 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 911 secs. Pages in use: 440
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 175/259 36/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 8412507 m, 45121 m/sec, 97635824 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 916 secs. Pages in use: 441
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 180/259 37/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 8649076 m, 47313 m/sec, 100355110 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 921 secs. Pages in use: 442
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 185/259 38/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 8897834 m, 49751 m/sec, 103099825 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 926 secs. Pages in use: 443
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 190/259 39/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 9162532 m, 52939 m/sec, 105956615 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 931 secs. Pages in use: 445
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 195/259 41/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 9425445 m, 52582 m/sec, 108677805 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 936 secs. Pages in use: 447
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 200/259 42/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 9644927 m, 43896 m/sec, 111577696 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 941 secs. Pages in use: 449
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 205/259 42/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 9847394 m, 40493 m/sec, 114411931 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 946 secs. Pages in use: 450
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 210/259 43/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 10096097 m, 49740 m/sec, 117172524 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 951 secs. Pages in use: 452
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 215/259 44/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 10335161 m, 47812 m/sec, 119930713 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 956 secs. Pages in use: 453
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 220/259 45/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 10569787 m, 46925 m/sec, 122688798 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 961 secs. Pages in use: 455
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 225/259 46/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 10790165 m, 44075 m/sec, 125607980 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 966 secs. Pages in use: 457
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 230/259 47/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 11018364 m, 45639 m/sec, 128463932 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 971 secs. Pages in use: 459
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 235/259 48/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 11255001 m, 47327 m/sec, 131231313 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 976 secs. Pages in use: 460
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 240/259 49/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 11440487 m, 37097 m/sec, 134057006 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 981 secs. Pages in use: 462
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 245/259 50/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 11618908 m, 35684 m/sec, 136854371 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 986 secs. Pages in use: 464
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 250/259 51/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 11845161 m, 45250 m/sec, 139476218 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 991 secs. Pages in use: 466
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 255/259 52/2000 PermAdmissibility-PT-05-CTLFireability-2024-06 12069475 m, 44862 m/sec, 142037063 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 996 secs. Pages in use: 467
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 31 (type EXCL) for PermAdmissibility-PT-05-CTLFireability-2024-06 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1001 secs. Pages in use: 469
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 16 PermAdmissibility-PT-05-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 259 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 PermAdmissibility-PT-05-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 2599 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 17 (type EXCL) for PermAdmissibility-PT-05-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 81
[[35mlola[0m][I] fired transitions : 164
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 5/259 2/5 PermAdmissibility-PT-05-CTLFireability-2024-06 356926 m, -2342509 m/sec, 2605657 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1006 secs. Pages in use: 473
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 10/259 3/5 PermAdmissibility-PT-05-CTLFireability-2024-06 651568 m, 58928 m/sec, 5311306 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1011 secs. Pages in use: 476
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 15/259 5/5 PermAdmissibility-PT-05-CTLFireability-2024-06 941542 m, 57994 m/sec, 8029259 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1016 secs. Pages in use: 480
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 31 (type EXCL) for PermAdmissibility-PT-05-CTLFireability-2024-06 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1021 secs. Pages in use: 482
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 6 PermAdmissibility-PT-05-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 286 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 5/286 2/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 384253 m, 76850 m/sec, 1814399 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1026 secs. Pages in use: 482
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 10/286 4/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 748056 m, 72760 m/sec, 3610326 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1031 secs. Pages in use: 485
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 15/286 5/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 1117074 m, 73803 m/sec, 5384846 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1036 secs. Pages in use: 488
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 20/286 7/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 1469128 m, 70410 m/sec, 7192515 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1041 secs. Pages in use: 492
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 25/286 8/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 1813841 m, 68942 m/sec, 8958914 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1046 secs. Pages in use: 495
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 30/286 10/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 2152444 m, 67720 m/sec, 10714443 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1051 secs. Pages in use: 499
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 35/286 11/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 2487328 m, 66976 m/sec, 12479627 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1056 secs. Pages in use: 502
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 40/286 13/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 2819361 m, 66406 m/sec, 14254648 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1061 secs. Pages in use: 506
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 45/286 14/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 3203941 m, 76916 m/sec, 15986934 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1066 secs. Pages in use: 508
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 50/286 16/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 3570622 m, 73336 m/sec, 17755632 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1071 secs. Pages in use: 512
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 55/286 17/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 3921570 m, 70189 m/sec, 19488492 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1076 secs. Pages in use: 515
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 60/286 19/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 4263789 m, 68443 m/sec, 21209996 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1081 secs. Pages in use: 518
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 65/286 20/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 4589858 m, 65213 m/sec, 22922086 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1086 secs. Pages in use: 521
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 70/286 22/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 4928525 m, 67733 m/sec, 24613110 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1091 secs. Pages in use: 526
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 75/286 23/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 5336628 m, 81620 m/sec, 26272211 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1096 secs. Pages in use: 529
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 80/286 25/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 5651664 m, 63007 m/sec, 28039791 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1101 secs. Pages in use: 533
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 85/286 26/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 5981078 m, 65882 m/sec, 29780967 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1106 secs. Pages in use: 536
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 90/286 28/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 6335696 m, 70923 m/sec, 31523695 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1111 secs. Pages in use: 539
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 95/286 29/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 6639312 m, 60723 m/sec, 33238426 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1116 secs. Pages in use: 542
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 100/286 30/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 6962723 m, 64682 m/sec, 34944718 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1121 secs. Pages in use: 545
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 105/286 32/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 7277378 m, 62931 m/sec, 36645597 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1126 secs. Pages in use: 549
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 110/286 33/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 7600631 m, 64650 m/sec, 38344975 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1131 secs. Pages in use: 552
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 115/286 35/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 7915488 m, 62971 m/sec, 40050742 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1136 secs. Pages in use: 556
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 120/286 36/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 8218847 m, 60671 m/sec, 41756256 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1141 secs. Pages in use: 559
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 125/286 37/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 8538337 m, 63898 m/sec, 43428518 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1146 secs. Pages in use: 561
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 130/286 39/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 8854139 m, 63160 m/sec, 45136690 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1151 secs. Pages in use: 565
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 135/286 40/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 9163371 m, 61846 m/sec, 46792770 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1156 secs. Pages in use: 568
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 140/286 42/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 9709478 m, 109221 m/sec, 48411083 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1161 secs. Pages in use: 572
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 145/286 44/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 10060019 m, 70108 m/sec, 50161836 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1166 secs. Pages in use: 576
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 150/286 45/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 10407205 m, 69437 m/sec, 51887239 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1171 secs. Pages in use: 579
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 155/286 47/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 10756300 m, 69819 m/sec, 53616550 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1176 secs. Pages in use: 583
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 160/286 48/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 11089374 m, 66614 m/sec, 55310160 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1181 secs. Pages in use: 586
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 165/286 50/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 11413713 m, 64867 m/sec, 56991180 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1186 secs. Pages in use: 590
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 170/286 51/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 11731858 m, 63629 m/sec, 58649148 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1191 secs. Pages in use: 592
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 175/286 53/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 12085551 m, 70738 m/sec, 60301862 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1196 secs. Pages in use: 596
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 180/286 54/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 12419162 m, 66722 m/sec, 62000893 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1201 secs. Pages in use: 599
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 185/286 55/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 12743337 m, 64835 m/sec, 63650329 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1206 secs. Pages in use: 601
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 190/286 57/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 13057498 m, 62832 m/sec, 65342710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1211 secs. Pages in use: 604
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 195/286 58/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 13371664 m, 62833 m/sec, 67009058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1216 secs. Pages in use: 605
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 200/286 60/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 13768856 m, 79438 m/sec, 68628852 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1221 secs. Pages in use: 608
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 205/286 61/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 14084395 m, 63107 m/sec, 70339108 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1226 secs. Pages in use: 610
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 210/286 63/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 14410071 m, 65135 m/sec, 72040664 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1231 secs. Pages in use: 613
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 215/286 64/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 14743821 m, 66750 m/sec, 73703475 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1236 secs. Pages in use: 615
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 220/286 65/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 15055505 m, 62336 m/sec, 75355329 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1241 secs. Pages in use: 616
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 225/286 67/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 15371729 m, 63244 m/sec, 76992371 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1246 secs. Pages in use: 619
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 230/286 68/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 15659463 m, 57546 m/sec, 78656648 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1251 secs. Pages in use: 621
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 235/286 69/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 15963231 m, 60753 m/sec, 80292279 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1256 secs. Pages in use: 623
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 240/286 71/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 16271528 m, 61659 m/sec, 81922931 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1261 secs. Pages in use: 627
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 245/286 72/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 16584411 m, 62576 m/sec, 83550763 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1266 secs. Pages in use: 630
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 250/286 74/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 17063439 m, 95805 m/sec, 85084442 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1271 secs. Pages in use: 633
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 255/286 76/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 17481294 m, 83571 m/sec, 86836843 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1276 secs. Pages in use: 636
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 260/286 77/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 17840643 m, 71869 m/sec, 88593244 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1281 secs. Pages in use: 639
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 265/286 79/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 18179817 m, 67834 m/sec, 90341839 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1286 secs. Pages in use: 643
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 270/286 80/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 18506141 m, 65264 m/sec, 92106325 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1291 secs. Pages in use: 646
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 275/286 82/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 18854528 m, 69677 m/sec, 93847066 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1296 secs. Pages in use: 648
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 280/286 83/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 19218678 m, 72830 m/sec, 95562198 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1301 secs. Pages in use: 651
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 285/286 85/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 19597475 m, 75759 m/sec, 97330348 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1306 secs. Pages in use: 654
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 11 (type EXCL) for PermAdmissibility-PT-05-CTLFireability-2024-02 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 1 0 0 2 1 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1311 secs. Pages in use: 657
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 9 (type EXCL) for 6 PermAdmissibility-PT-05-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 286 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 6 PermAdmissibility-PT-05-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 2289 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 0 2 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 9 CTL EXCL 5/286 2/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 296245 m, 59249 m/sec, 1652022 t fired, .
[[35mlola[0m][.] 11 CTL EXCL 5/2289 2/5 PermAdmissibility-PT-05-CTLFireability-2024-02 336771 m, -3852140 m/sec, 1561975 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1316 secs. Pages in use: 665
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 0 2 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 9 CTL EXCL 10/286 3/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 545588 m, 49868 m/sec, 3576716 t fired, .
[[35mlola[0m][.] 11 CTL EXCL 10/254 3/5 PermAdmissibility-PT-05-CTLFireability-2024-02 634224 m, 59490 m/sec, 3036347 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1321 secs. Pages in use: 668
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 0 2 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 9 CTL EXCL 15/286 4/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 799448 m, 50772 m/sec, 5612658 t fired, .
[[35mlola[0m][.] 11 CTL EXCL 15/254 4/5 PermAdmissibility-PT-05-CTLFireability-2024-02 921804 m, 57516 m/sec, 4427767 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1326 secs. Pages in use: 673
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 11 (type EXCL) for PermAdmissibility-PT-05-CTLFireability-2024-02 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 9 CTL EXCL 20/286 5/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 1034247 m, 46959 m/sec, 7357326 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1331 secs. Pages in use: 676
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 9 CTL EXCL 25/286 6/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 1321929 m, 57536 m/sec, 9796349 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1336 secs. Pages in use: 676
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 9 CTL EXCL 30/286 7/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 1608293 m, 57272 m/sec, 12086808 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1341 secs. Pages in use: 680
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 9 CTL EXCL 35/286 9/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 1897467 m, 57834 m/sec, 14623492 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1346 secs. Pages in use: 685
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 9 CTL EXCL 40/286 10/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 2165933 m, 53693 m/sec, 17073281 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1351 secs. Pages in use: 689
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 9 CTL EXCL 45/286 11/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 2423416 m, 51496 m/sec, 19375746 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1356 secs. Pages in use: 693
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 9 CTL EXCL 50/286 12/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 2669607 m, 49238 m/sec, 21866997 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1361 secs. Pages in use: 696
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 9 CTL EXCL 55/286 13/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 2890641 m, 44206 m/sec, 24423307 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1366 secs. Pages in use: 699
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 9 CTL EXCL 60/286 14/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 3093734 m, 40618 m/sec, 27031446 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1371 secs. Pages in use: 703
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 9 CTL EXCL 65/286 15/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 3279327 m, 37118 m/sec, 29686540 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1376 secs. Pages in use: 708
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 9 CTL EXCL 71/286 15/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 3370668 m, 18268 m/sec, 30776237 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1382 secs. Pages in use: 708
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-09: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-13: EF true findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-05-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-05-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-02: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-05: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-08: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-05-CTLFireability-2024-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 9 CTL EXCL 80/286 15/2000 PermAdmissibility-PT-05-CTLFireability-2024-02 3389578 m, 3782 m/sec, 30974988 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1391 secs. Pages in use: 708
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 404 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-05"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is PermAdmissibility-PT-05, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r269-smll-171654408300170"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-05.tgz
mv PermAdmissibility-PT-05 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;