About the Execution of LoLA for PermAdmissibility-PT-02
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
14512.560 | 3600000.00 | 1524555.00 | 12449.10 | ?T?F?F?F??T??F?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r269-smll-171654408300161.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is PermAdmissibility-PT-02, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r269-smll-171654408300161
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.8M
-rw-r--r-- 1 mcc users 11K Apr 12 09:11 CTLCardinality.txt
-rw-r--r-- 1 mcc users 102K Apr 12 09:11 CTLCardinality.xml
-rw-r--r-- 1 mcc users 52K Apr 12 09:09 CTLFireability.txt
-rw-r--r-- 1 mcc users 268K Apr 12 09:09 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.7K Apr 23 07:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Apr 23 07:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 18K Apr 23 07:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 72K Apr 23 07:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 18K Apr 12 09:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 154K Apr 12 09:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113K Apr 12 09:17 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 575K Apr 12 09:17 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 23 07:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.4K Apr 23 07:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 336K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-00
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-01
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-02
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-03
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-04
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-05
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-06
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-07
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-08
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-09
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-10
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-11
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-12
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-13
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-14
FORMULA_NAME PermAdmissibility-PT-02-CTLCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717090997160
FORMULA PermAdmissibility-PT-02-CTLCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-PT-02-CTLCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-PT-02-CTLCardinality-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-PT-02-CTLCardinality-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-PT-02-CTLCardinality-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-PT-02-CTLCardinality-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 60 (type SKEL/SRCH) for 10 PermAdmissibility-PT-02-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 60 (type SKEL/SRCH) for PermAdmissibility-PT-02-CTLCardinality-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[*** LOG ERROR #0001 ***] [2024-05-30 17:43:22] [status_logger] string pointer is null
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 61 (type SKEL/SRCH) for 10 PermAdmissibility-PT-02-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 61 (type SKEL/SRCH) for PermAdmissibility-PT-02-CTLCardinality-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 18 (type CNST) for 17 PermAdmissibility-PT-02-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 18 (type CNST) for PermAdmissibility-PT-02-CTLCardinality-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 8 (type EXCL) for 7 PermAdmissibility-PT-02-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 156 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 8 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 27
[[35mlola[0m][I] fired transitions : 29
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 65 (type EXCL) for 51 PermAdmissibility-PT-02-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 156 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 63 (type FNDP) for 51 PermAdmissibility-PT-02-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 64 (type EQUN) for 51 PermAdmissibility-PT-02-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 43 (type CNST) for 42 PermAdmissibility-PT-02-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 43 (type CNST) for PermAdmissibility-PT-02-CTLCardinality-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 34 (type CNST) for 33 PermAdmissibility-PT-02-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 34 (type CNST) for PermAdmissibility-PT-02-CTLCardinality-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 63 (type FNDP) for PermAdmissibility-PT-02-CTLCardinality-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 153
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 64 (type EQUN) for PermAdmissibility-PT-02-CTLCardinality-2024-13 (obsolete)
[[35mlola[0m][W] CANCELED task # 65 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-13 (obsolete)
[[35mlola[0m][I] LAUNCH task # 24 (type CNST) for 23 PermAdmissibility-PT-02-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 5 (type EXCL) for 0 PermAdmissibility-PT-02-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 64 (type EQUN) for PermAdmissibility-PT-02-CTLCardinality-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 5 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 23
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 24 (type CNST) for PermAdmissibility-PT-02-CTLCardinality-2024-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 3 (type EXCL) for 0 PermAdmissibility-PT-02-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 299 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 69 (type EQUN) for 48 PermAdmissibility-PT-02-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 71 (type EQUN) for 48 PermAdmissibility-PT-02-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 71 (type EQUN) for PermAdmissibility-PT-02-CTLCardinality-2024-12
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 69 (type EQUN) for PermAdmissibility-PT-02-CTLCardinality-2024-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 5/326 3/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 488920 m, 97784 m/sec, 2342082 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 10/326 5/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 956022 m, 93420 m/sec, 4973412 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 15/326 7/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 1434778 m, 95751 m/sec, 7602416 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 20/326 9/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 1917433 m, 96531 m/sec, 10179265 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 25/326 11/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 2456862 m, 107885 m/sec, 12559274 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 30/326 13/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 2982397 m, 105107 m/sec, 14962285 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 35/326 16/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 3490663 m, 101653 m/sec, 17386055 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 40/326 18/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 3994154 m, 100698 m/sec, 19753660 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 45/326 20/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 4494385 m, 100046 m/sec, 22320990 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 50/326 22/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 4951877 m, 91498 m/sec, 25056336 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 55/326 24/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 5394006 m, 88425 m/sec, 27697158 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 60/326 26/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 5834503 m, 88099 m/sec, 30285900 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 65/326 28/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 6230572 m, 79213 m/sec, 32898896 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 70/326 30/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 6717870 m, 97459 m/sec, 35284600 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 75/326 32/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 7230266 m, 102479 m/sec, 37543442 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 80/326 34/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 7702868 m, 94520 m/sec, 39948411 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 85/326 36/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 8162914 m, 92009 m/sec, 42330470 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 90/326 38/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 8634369 m, 94291 m/sec, 44782933 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 95/326 40/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 9126705 m, 98467 m/sec, 47301707 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 100/326 42/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 9620997 m, 98858 m/sec, 49782200 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 42
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 105/326 44/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 10054082 m, 86617 m/sec, 52368458 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 110/326 46/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 10514708 m, 92125 m/sec, 54774116 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 46
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 115/326 49/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 11029324 m, 102923 m/sec, 57045535 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 120/326 51/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 11504140 m, 94963 m/sec, 59530032 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 125/326 53/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 11968865 m, 92945 m/sec, 61943337 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 53
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 130/326 54/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 12393762 m, 84979 m/sec, 64443220 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 54
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 135/326 56/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 12833969 m, 88041 m/sec, 66753824 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 140/326 58/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 13321138 m, 97433 m/sec, 68976328 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 145/326 60/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 13769290 m, 89630 m/sec, 71353032 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 150/326 62/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 14205785 m, 87299 m/sec, 73634923 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 62
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 155/326 64/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 14647771 m, 88397 m/sec, 75891693 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 160/326 66/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 15089714 m, 88388 m/sec, 78172116 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 66
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 165/326 68/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 15513927 m, 84842 m/sec, 80541119 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 170/326 70/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 15954119 m, 88038 m/sec, 82834056 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 175/326 72/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 16383987 m, 85973 m/sec, 85165204 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 180/326 74/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 16796208 m, 82444 m/sec, 87493424 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 74
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 185/326 76/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 17239507 m, 88659 m/sec, 89749246 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 190 secs. Pages in use: 76
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 190/326 77/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 17659505 m, 83999 m/sec, 91989714 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 195 secs. Pages in use: 77
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 195/326 79/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 18088335 m, 85766 m/sec, 94412153 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 200 secs. Pages in use: 79
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 200/326 81/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 18554662 m, 93265 m/sec, 97022977 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 205 secs. Pages in use: 81
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 205/326 83/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 18983060 m, 85679 m/sec, 99578638 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 210 secs. Pages in use: 83
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 210/326 85/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 19458146 m, 95017 m/sec, 102007629 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 215 secs. Pages in use: 85
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 215/326 87/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 19920345 m, 92439 m/sec, 104400124 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 220 secs. Pages in use: 87
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 220/326 89/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 20357026 m, 87336 m/sec, 106793195 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 225 secs. Pages in use: 89
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 225/326 91/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 20800042 m, 88603 m/sec, 109446976 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 230 secs. Pages in use: 91
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 230/326 93/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 21215502 m, 83092 m/sec, 112088848 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 235 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 235/326 95/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 21615666 m, 80032 m/sec, 114647846 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 240 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 240/326 96/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 22029463 m, 82759 m/sec, 117125398 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 245 secs. Pages in use: 96
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 245/326 98/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 22477410 m, 89589 m/sec, 119451532 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 250 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 250/326 100/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 22895237 m, 83565 m/sec, 121779336 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 255 secs. Pages in use: 100
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 255/326 102/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 23332173 m, 87387 m/sec, 124252480 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 260 secs. Pages in use: 102
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 260/326 104/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 23788169 m, 91199 m/sec, 126715894 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 265 secs. Pages in use: 104
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 265/326 106/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 24181242 m, 78614 m/sec, 129262391 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 270 secs. Pages in use: 106
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 270/326 108/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 24638787 m, 91509 m/sec, 131601286 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 275 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 275/326 110/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 25078656 m, 87973 m/sec, 134011430 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 280 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 280/326 111/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 25493149 m, 82898 m/sec, 136458121 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 285 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 285/326 113/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 25924877 m, 86345 m/sec, 138726180 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 290 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 290/326 115/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 26360013 m, 87027 m/sec, 141109618 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 295 secs. Pages in use: 115
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 295/326 117/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 26791854 m, 86368 m/sec, 143347225 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 300 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 300/326 119/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 27211062 m, 83841 m/sec, 145713977 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 305 secs. Pages in use: 119
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 305/326 121/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 27618243 m, 81436 m/sec, 148046852 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 310 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 310/326 122/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 28041401 m, 84631 m/sec, 150334889 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 315 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 315/326 124/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 28451561 m, 82032 m/sec, 152624339 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 320 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 320/326 126/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 28858943 m, 81476 m/sec, 154955675 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 325 secs. Pages in use: 126
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 325/326 128/2000 PermAdmissibility-PT-02-CTLCardinality-2024-00 29265791 m, 81369 m/sec, 157184077 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 128
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 3 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-00 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 1 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 130
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 58 (type EXCL) for 57 PermAdmissibility-PT-02-CTLCardinality-2024-15
[[35mlola[0m][I] time limit : 326 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 3 (type EXCL) for 0 PermAdmissibility-PT-02-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 3265 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 58 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 33
[[35mlola[0m][I] fired transitions : 32
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 5/326 3/5 PermAdmissibility-PT-02-CTLCardinality-2024-00 533117 m, -5746534 m/sec, 2561451 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 CTL EXCL 10/326 5/5 PermAdmissibility-PT-02-CTLCardinality-2024-00 1023077 m, 97992 m/sec, 5298386 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 3 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-00 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 54 PermAdmissibility-PT-02-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 361 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 5/361 3/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 619307 m, 123861 m/sec, 2462906 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 10/361 6/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 1222764 m, 120691 m/sec, 4943886 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 15/361 9/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 1833264 m, 122100 m/sec, 7529333 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 139
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 20/361 11/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 2462970 m, 125941 m/sec, 9779391 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 141
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 25/361 14/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 3095022 m, 126410 m/sec, 11977784 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 144
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 30/361 17/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 3680918 m, 117179 m/sec, 14331144 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 147
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 35/361 19/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 4219589 m, 107734 m/sec, 16691480 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 149
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 40/361 22/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 4748250 m, 105732 m/sec, 19034199 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 152
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 45/361 24/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 5327700 m, 115890 m/sec, 21308040 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 50/361 27/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 5941040 m, 122668 m/sec, 23614456 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 55/361 29/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 6528304 m, 117452 m/sec, 25766343 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 159
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 60/361 32/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 7124201 m, 119179 m/sec, 27867521 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 65/361 35/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 7684093 m, 111978 m/sec, 30147848 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 165
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 70/361 37/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 8232923 m, 109766 m/sec, 32502125 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 420 secs. Pages in use: 167
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 75/361 39/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 8787370 m, 110889 m/sec, 34790115 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 425 secs. Pages in use: 169
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 80/361 42/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 9318949 m, 106315 m/sec, 36976738 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 430 secs. Pages in use: 172
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 85/361 44/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 9870094 m, 110229 m/sec, 39195343 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 435 secs. Pages in use: 174
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 90/361 47/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 10417855 m, 109552 m/sec, 41422659 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 440 secs. Pages in use: 177
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 95/361 49/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 10981036 m, 112636 m/sec, 43937201 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 445 secs. Pages in use: 179
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 100/361 52/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 11534771 m, 110747 m/sec, 46261223 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 450 secs. Pages in use: 182
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 105/361 54/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 12056372 m, 104320 m/sec, 48664066 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 455 secs. Pages in use: 184
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 110/361 56/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 12595668 m, 107859 m/sec, 51146837 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 460 secs. Pages in use: 186
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 115/361 59/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 13137175 m, 108301 m/sec, 53456135 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 465 secs. Pages in use: 189
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 120/361 61/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 13685487 m, 109662 m/sec, 55567689 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 470 secs. Pages in use: 191
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 125/361 64/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 14261683 m, 115239 m/sec, 57644825 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 475 secs. Pages in use: 194
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 130/361 66/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 14803886 m, 108440 m/sec, 59867128 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 480 secs. Pages in use: 196
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 135/361 68/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 15318968 m, 103016 m/sec, 62045557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 485 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 140/361 70/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 15797477 m, 95701 m/sec, 64294408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 490 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 145/361 72/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 16263498 m, 93204 m/sec, 66519711 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 495 secs. Pages in use: 202
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 150/361 74/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 16731738 m, 93648 m/sec, 68728691 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 500 secs. Pages in use: 204
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 155/361 77/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 17297267 m, 113105 m/sec, 70816596 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 505 secs. Pages in use: 207
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 160/361 80/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 17876816 m, 115909 m/sec, 72946971 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 510 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 165/361 82/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 18440980 m, 112832 m/sec, 75016913 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 515 secs. Pages in use: 212
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 170/361 85/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 19010834 m, 113970 m/sec, 77001822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 520 secs. Pages in use: 215
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 175/361 87/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 19579875 m, 113808 m/sec, 79096380 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 525 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 180/361 89/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 20083526 m, 100730 m/sec, 81345732 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 530 secs. Pages in use: 219
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 185/361 92/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 20591590 m, 101612 m/sec, 83589265 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 535 secs. Pages in use: 222
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 190/361 94/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 21101738 m, 102029 m/sec, 85685698 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 540 secs. Pages in use: 224
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 195/361 96/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 21629422 m, 105536 m/sec, 87860336 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 545 secs. Pages in use: 226
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 200/361 98/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 22131771 m, 100469 m/sec, 90065387 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 550 secs. Pages in use: 228
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 205/361 100/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 22639240 m, 101493 m/sec, 92185182 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 555 secs. Pages in use: 230
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 210/361 103/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 23211128 m, 114377 m/sec, 94448341 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 560 secs. Pages in use: 233
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 215/361 105/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 23720406 m, 101855 m/sec, 96805551 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 565 secs. Pages in use: 235
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 220/361 108/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 24317833 m, 119485 m/sec, 99012907 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 570 secs. Pages in use: 238
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 225/361 110/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 24886265 m, 113686 m/sec, 101213008 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 575 secs. Pages in use: 240
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 230/361 113/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 25420001 m, 106747 m/sec, 103439165 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 580 secs. Pages in use: 243
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 235/361 115/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 25952838 m, 106567 m/sec, 105543144 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 585 secs. Pages in use: 245
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 240/361 118/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 26485685 m, 106569 m/sec, 107751329 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 590 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 245/361 120/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 26965053 m, 95873 m/sec, 110118901 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 595 secs. Pages in use: 250
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 250/361 122/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 27476434 m, 102276 m/sec, 112189867 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 600 secs. Pages in use: 252
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 255/361 124/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 27948909 m, 94495 m/sec, 114367809 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 605 secs. Pages in use: 254
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 260/361 126/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 28417983 m, 93814 m/sec, 116490334 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 610 secs. Pages in use: 256
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 265/361 129/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 28987582 m, 113919 m/sec, 118489795 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 615 secs. Pages in use: 259
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 270/361 131/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 29533122 m, 109108 m/sec, 120467860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 620 secs. Pages in use: 261
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 275/361 133/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 30074917 m, 108359 m/sec, 122466562 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 625 secs. Pages in use: 263
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 280/361 136/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 30614431 m, 107902 m/sec, 124659748 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 630 secs. Pages in use: 266
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 285/361 138/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 31131393 m, 103392 m/sec, 126885998 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 635 secs. Pages in use: 268
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 290/361 140/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 31667157 m, 107152 m/sec, 128965577 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 640 secs. Pages in use: 270
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 295/361 143/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 32182457 m, 103060 m/sec, 131121249 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 645 secs. Pages in use: 273
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 300/361 145/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 32686851 m, 100878 m/sec, 133249126 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 650 secs. Pages in use: 275
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 305/361 147/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 33189948 m, 100619 m/sec, 135299347 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 655 secs. Pages in use: 277
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 310/361 149/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 33657422 m, 93494 m/sec, 137598143 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 660 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 315/361 151/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 34100979 m, 88711 m/sec, 139918877 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 665 secs. Pages in use: 281
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 320/361 153/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 34574608 m, 94725 m/sec, 141989324 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 670 secs. Pages in use: 283
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 325/361 155/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 35012438 m, 87566 m/sec, 144079459 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 675 secs. Pages in use: 285
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 330/361 157/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 35441952 m, 85902 m/sec, 146152723 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 680 secs. Pages in use: 287
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 335/361 159/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 36005204 m, 112650 m/sec, 148007167 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 685 secs. Pages in use: 289
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 340/361 162/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 36547622 m, 108483 m/sec, 149942427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 690 secs. Pages in use: 292
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 345/361 164/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 37041893 m, 98854 m/sec, 152134774 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 695 secs. Pages in use: 294
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 350/361 166/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 37543087 m, 100238 m/sec, 154248617 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 700 secs. Pages in use: 296
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 355/361 168/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 38030747 m, 97532 m/sec, 156431026 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 705 secs. Pages in use: 298
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 360/361 171/2000 PermAdmissibility-PT-02-CTLCardinality-2024-14 38523098 m, 98470 m/sec, 158549205 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 710 secs. Pages in use: 301
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 55 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 715 secs. Pages in use: 303
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 PermAdmissibility-PT-02-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 360 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 54 PermAdmissibility-PT-02-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 2885 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 5/360 3/5 PermAdmissibility-PT-02-CTLCardinality-2024-14 616497 m, -7581320 m/sec, 2449756 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 720 secs. Pages in use: 306
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 55 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-14 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 725 secs. Pages in use: 308
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 PermAdmissibility-PT-02-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 410 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 33
[[35mlola[0m][I] fired transitions : 97
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 26 PermAdmissibility-PT-02-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 479 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 66
[[35mlola[0m][I] fired transitions : 88
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 26 PermAdmissibility-PT-02-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 575 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 21 (type EXCL) for 20 PermAdmissibility-PT-02-CTLCardinality-2024-04
[[35mlola[0m][I] time limit : 718 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 5/718 6/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 1241250 m, 248250 m/sec, 1362502 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 730 secs. Pages in use: 309
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 10/718 12/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 2494047 m, 250559 m/sec, 2748509 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 735 secs. Pages in use: 315
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 15/718 17/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 3682763 m, 237743 m/sec, 4166326 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 740 secs. Pages in use: 320
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 20/718 23/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 4885776 m, 240602 m/sec, 5599902 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 745 secs. Pages in use: 326
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 25/718 28/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 6076931 m, 238231 m/sec, 6995342 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 750 secs. Pages in use: 331
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 30/718 33/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 7256864 m, 235986 m/sec, 8349162 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 755 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 35/718 38/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 8391569 m, 226941 m/sec, 9827214 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 760 secs. Pages in use: 341
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 40/718 44/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 9539287 m, 229543 m/sec, 11245591 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 765 secs. Pages in use: 347
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 45/718 49/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 10746342 m, 241411 m/sec, 12629971 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 770 secs. Pages in use: 352
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 50/718 54/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 11858448 m, 222421 m/sec, 14072308 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 775 secs. Pages in use: 357
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 55/718 59/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 12976727 m, 223655 m/sec, 15515747 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 780 secs. Pages in use: 362
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 60/718 64/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 14086064 m, 221867 m/sec, 16892629 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 785 secs. Pages in use: 367
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 65/718 69/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 15228815 m, 228550 m/sec, 18256401 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 790 secs. Pages in use: 372
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 70/718 74/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 16325603 m, 219357 m/sec, 19646000 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 795 secs. Pages in use: 377
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 75/718 79/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 17381598 m, 211199 m/sec, 21107377 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 800 secs. Pages in use: 382
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 80/718 83/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 18384634 m, 200607 m/sec, 22581636 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 805 secs. Pages in use: 386
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 85/718 87/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 19354100 m, 193893 m/sec, 24114192 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 810 secs. Pages in use: 390
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 90/718 92/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 20466491 m, 222478 m/sec, 25516757 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 815 secs. Pages in use: 395
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 95/718 97/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 21508651 m, 208432 m/sec, 26949907 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 820 secs. Pages in use: 400
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 100/718 101/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 22402237 m, 178717 m/sec, 28486973 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 825 secs. Pages in use: 404
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 105/718 105/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 23282758 m, 176104 m/sec, 30159480 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 830 secs. Pages in use: 408
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 110/718 110/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 24337877 m, 211023 m/sec, 31518796 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 835 secs. Pages in use: 413
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 115/718 114/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 25348679 m, 202160 m/sec, 32889083 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 840 secs. Pages in use: 417
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 120/718 119/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 26333236 m, 196911 m/sec, 34262984 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 845 secs. Pages in use: 422
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 125/718 123/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 27252200 m, 183792 m/sec, 35692344 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 850 secs. Pages in use: 426
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 130/718 127/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 28122925 m, 174145 m/sec, 37359201 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 855 secs. Pages in use: 430
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 135/718 131/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 29199292 m, 215273 m/sec, 38744127 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 860 secs. Pages in use: 434
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 140/718 136/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 30231481 m, 206437 m/sec, 40117639 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 865 secs. Pages in use: 439
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 145/718 141/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 31256625 m, 205028 m/sec, 41537408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 870 secs. Pages in use: 444
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 150/718 145/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 32190231 m, 186721 m/sec, 43038964 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 875 secs. Pages in use: 448
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 155/718 149/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 33065706 m, 175095 m/sec, 44741956 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 880 secs. Pages in use: 452
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 160/718 153/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 33937400 m, 174338 m/sec, 46487239 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 885 secs. Pages in use: 456
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 165/718 154/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 34343596 m, 81239 m/sec, 48935842 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 890 secs. Pages in use: 457
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 170/718 156/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 34698107 m, 70902 m/sec, 51473485 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 895 secs. Pages in use: 459
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 175/718 157/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 35048034 m, 69985 m/sec, 53726686 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 900 secs. Pages in use: 460
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 180/718 159/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 35351354 m, 60664 m/sec, 56100449 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 905 secs. Pages in use: 462
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 185/718 160/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 35652154 m, 60160 m/sec, 58487236 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 910 secs. Pages in use: 463
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 190/718 162/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 36017683 m, 73105 m/sec, 60772915 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 915 secs. Pages in use: 465
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 195/718 163/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 36400231 m, 76509 m/sec, 62940096 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 920 secs. Pages in use: 466
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 200/718 165/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 36771875 m, 74328 m/sec, 65123366 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 925 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 205/718 166/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 37127819 m, 71188 m/sec, 67422003 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 930 secs. Pages in use: 469
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 210/718 168/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 37481870 m, 70810 m/sec, 69659737 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 935 secs. Pages in use: 471
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 215/718 170/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 37832792 m, 70184 m/sec, 71883129 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 940 secs. Pages in use: 473
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 220/718 171/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 38198555 m, 73152 m/sec, 74213135 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 945 secs. Pages in use: 474
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 225/718 173/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 38554520 m, 71193 m/sec, 76563557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 950 secs. Pages in use: 476
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 230/718 174/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 38868807 m, 62857 m/sec, 79179561 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 955 secs. Pages in use: 477
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 235/718 175/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 39194794 m, 65197 m/sec, 81422535 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 960 secs. Pages in use: 478
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 240/718 177/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 39508286 m, 62698 m/sec, 83731916 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 965 secs. Pages in use: 480
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 245/718 178/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 39778735 m, 54089 m/sec, 86035574 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 970 secs. Pages in use: 481
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 250/718 179/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 40043831 m, 53019 m/sec, 88367058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 975 secs. Pages in use: 482
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 255/718 180/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 40370140 m, 65261 m/sec, 90566407 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 980 secs. Pages in use: 483
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 260/718 182/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 40724429 m, 70857 m/sec, 92693485 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 985 secs. Pages in use: 485
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 265/718 184/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 41078851 m, 70884 m/sec, 94785550 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 990 secs. Pages in use: 487
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 270/718 185/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 41413103 m, 66850 m/sec, 97031265 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 995 secs. Pages in use: 488
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 275/718 186/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 41739422 m, 65263 m/sec, 99248090 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1000 secs. Pages in use: 489
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 280/718 188/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 42058875 m, 63890 m/sec, 101459933 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1005 secs. Pages in use: 491
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 285/718 189/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 42403630 m, 68951 m/sec, 103747710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1010 secs. Pages in use: 492
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 290/718 191/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 42759555 m, 71185 m/sec, 106057350 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1015 secs. Pages in use: 494
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 295/718 192/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 43106703 m, 69429 m/sec, 108352710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1020 secs. Pages in use: 495
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 300/718 194/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 43468687 m, 72396 m/sec, 110611213 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1025 secs. Pages in use: 497
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 305/718 195/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 43777186 m, 61699 m/sec, 112957402 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1030 secs. Pages in use: 498
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 310/718 197/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 44094880 m, 63538 m/sec, 115219318 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1035 secs. Pages in use: 500
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 315/718 198/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 44482653 m, 77554 m/sec, 117354537 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1040 secs. Pages in use: 501
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 320/718 200/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 44852284 m, 73926 m/sec, 119539015 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1045 secs. Pages in use: 503
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 325/718 201/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 45191036 m, 67750 m/sec, 121815076 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1050 secs. Pages in use: 504
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 330/718 203/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 45527258 m, 67244 m/sec, 124033049 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1055 secs. Pages in use: 506
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 335/718 204/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 45862142 m, 66976 m/sec, 126335209 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1060 secs. Pages in use: 507
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 340/718 206/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 46160388 m, 59649 m/sec, 128587234 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1065 secs. Pages in use: 509
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 345/718 207/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 46510199 m, 69962 m/sec, 130715854 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1070 secs. Pages in use: 510
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 350/718 209/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 46878298 m, 73619 m/sec, 132825620 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1075 secs. Pages in use: 512
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 355/718 210/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 47220058 m, 68352 m/sec, 135046265 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1080 secs. Pages in use: 513
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 360/718 212/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 47546415 m, 65271 m/sec, 137301153 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1085 secs. Pages in use: 515
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 365/718 213/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 47888167 m, 68350 m/sec, 139436472 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1090 secs. Pages in use: 516
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 370/718 215/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 48226799 m, 67726 m/sec, 141614615 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1095 secs. Pages in use: 518
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 375/718 216/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 48558622 m, 66364 m/sec, 143786312 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1100 secs. Pages in use: 519
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 380/718 217/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 48891168 m, 66509 m/sec, 145961960 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1105 secs. Pages in use: 520
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 385/718 219/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 49223467 m, 66459 m/sec, 148197065 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1110 secs. Pages in use: 522
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 390/718 220/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 49561210 m, 67548 m/sec, 150415362 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1115 secs. Pages in use: 523
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 395/718 222/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 49888955 m, 65549 m/sec, 152631511 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1120 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 400/718 223/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 50211583 m, 64525 m/sec, 154801240 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1125 secs. Pages in use: 526
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 405/718 225/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 50540111 m, 65705 m/sec, 157000153 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1130 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 410/718 226/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 50871404 m, 66258 m/sec, 159177990 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1135 secs. Pages in use: 529
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 415/718 227/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 51195734 m, 64866 m/sec, 161320360 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1140 secs. Pages in use: 530
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 420/718 229/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 51540305 m, 68914 m/sec, 163653541 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1145 secs. Pages in use: 532
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 425/718 230/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 51879499 m, 67838 m/sec, 166005966 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1150 secs. Pages in use: 533
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 430/718 232/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 52177397 m, 59579 m/sec, 168303142 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1155 secs. Pages in use: 535
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 435/718 233/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 52468798 m, 58280 m/sec, 170585478 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1160 secs. Pages in use: 536
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 440/718 234/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 52807091 m, 67658 m/sec, 172809358 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1165 secs. Pages in use: 537
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 445/718 236/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 53139234 m, 66428 m/sec, 175024660 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1170 secs. Pages in use: 539
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 450/718 237/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 53463072 m, 64767 m/sec, 177198560 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1175 secs. Pages in use: 540
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 455/718 239/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 53775170 m, 62419 m/sec, 179441441 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1180 secs. Pages in use: 542
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 460/718 240/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 54112387 m, 67443 m/sec, 181892703 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1185 secs. Pages in use: 543
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 465/718 241/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 54429571 m, 63436 m/sec, 184246111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1190 secs. Pages in use: 544
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 470/718 243/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 54722495 m, 58584 m/sec, 186627731 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1195 secs. Pages in use: 546
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 475/718 244/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 54977039 m, 50908 m/sec, 188870635 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1200 secs. Pages in use: 547
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 480/718 245/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 55262732 m, 57138 m/sec, 191118412 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1205 secs. Pages in use: 548
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 485/718 246/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 55588090 m, 65071 m/sec, 193283262 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1210 secs. Pages in use: 549
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 490/718 248/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 55900862 m, 62554 m/sec, 195483122 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1215 secs. Pages in use: 551
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 495/718 249/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 56203183 m, 60464 m/sec, 197661757 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1220 secs. Pages in use: 552
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 500/718 250/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 56514348 m, 62233 m/sec, 199942122 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1225 secs. Pages in use: 553
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 505/718 252/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 56847786 m, 66687 m/sec, 202185046 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1230 secs. Pages in use: 555
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 510/718 253/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 57182654 m, 66973 m/sec, 204481293 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1235 secs. Pages in use: 556
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 515/718 255/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 57466933 m, 56855 m/sec, 206766940 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1240 secs. Pages in use: 558
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 520/718 256/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 57817039 m, 70021 m/sec, 208923229 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1245 secs. Pages in use: 559
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 525/718 258/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 58140796 m, 64751 m/sec, 211149191 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1250 secs. Pages in use: 561
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 530/718 259/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 58461220 m, 64084 m/sec, 213349166 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1255 secs. Pages in use: 562
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 535/718 260/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 58751551 m, 58066 m/sec, 215634203 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1260 secs. Pages in use: 563
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 540/718 262/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 59093013 m, 68292 m/sec, 217717366 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1265 secs. Pages in use: 565
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 545/718 263/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 59420132 m, 65423 m/sec, 219968315 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1270 secs. Pages in use: 566
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 550/718 264/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 59750740 m, 66121 m/sec, 222133574 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1275 secs. Pages in use: 567
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 555/718 266/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 60082763 m, 66404 m/sec, 224274706 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1280 secs. Pages in use: 569
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 560/718 267/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 60393269 m, 62101 m/sec, 226493648 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1285 secs. Pages in use: 570
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 565/718 269/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 60711686 m, 63683 m/sec, 228710140 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1290 secs. Pages in use: 572
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 570/718 270/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 61037290 m, 65120 m/sec, 230902230 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1295 secs. Pages in use: 573
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 575/718 271/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 61358514 m, 64244 m/sec, 233076262 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1300 secs. Pages in use: 574
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 580/718 273/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 61673603 m, 63017 m/sec, 235290219 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1305 secs. Pages in use: 576
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 585/718 274/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 61989683 m, 63216 m/sec, 237467876 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1310 secs. Pages in use: 577
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 590/718 276/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 62354808 m, 73025 m/sec, 239528418 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1315 secs. Pages in use: 579
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 595/718 278/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 62821476 m, 93333 m/sec, 241426892 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1320 secs. Pages in use: 581
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 600/718 279/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 63196141 m, 74933 m/sec, 243699338 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1325 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 605/718 281/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 63522674 m, 65306 m/sec, 245995905 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1330 secs. Pages in use: 584
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 610/718 282/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 63844121 m, 64289 m/sec, 248220845 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1335 secs. Pages in use: 585
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 615/718 283/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 64132650 m, 57705 m/sec, 250586376 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1340 secs. Pages in use: 586
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 620/718 285/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 64445134 m, 62496 m/sec, 252789188 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1345 secs. Pages in use: 588
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 625/718 286/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 64743159 m, 59605 m/sec, 255114333 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1350 secs. Pages in use: 589
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 630/718 287/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 65077130 m, 66794 m/sec, 257318133 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1355 secs. Pages in use: 590
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 635/718 289/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 65397335 m, 64041 m/sec, 259558338 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1360 secs. Pages in use: 592
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 640/718 290/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 65727870 m, 66107 m/sec, 261855763 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1365 secs. Pages in use: 593
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 645/718 292/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 66054849 m, 65395 m/sec, 264136726 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1370 secs. Pages in use: 595
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 650/718 293/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 66376894 m, 64409 m/sec, 266344929 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1375 secs. Pages in use: 596
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 655/718 294/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 66695936 m, 63808 m/sec, 268534768 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1380 secs. Pages in use: 597
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 660/718 296/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 67038837 m, 68580 m/sec, 270703764 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1385 secs. Pages in use: 599
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 665/718 298/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 67445269 m, 81286 m/sec, 272725535 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1390 secs. Pages in use: 601
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 670/718 299/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 67856050 m, 82156 m/sec, 274752894 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1395 secs. Pages in use: 602
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 675/718 301/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 68162907 m, 61371 m/sec, 276969155 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1400 secs. Pages in use: 604
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 680/718 302/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 68467764 m, 60971 m/sec, 279193753 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1405 secs. Pages in use: 605
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 685/718 303/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 68756905 m, 57828 m/sec, 281377507 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1410 secs. Pages in use: 606
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 690/718 305/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 69067079 m, 62034 m/sec, 283551043 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1415 secs. Pages in use: 608
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 695/718 306/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 69398898 m, 66363 m/sec, 285702188 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1420 secs. Pages in use: 609
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 700/718 308/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 69718649 m, 63950 m/sec, 287937631 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1425 secs. Pages in use: 611
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 705/718 309/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 70039621 m, 64194 m/sec, 290058718 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1430 secs. Pages in use: 612
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 710/718 310/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 70347337 m, 61543 m/sec, 292184931 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1435 secs. Pages in use: 613
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 21 CTL EXCL 715/718 312/2000 PermAdmissibility-PT-02-CTLCardinality-2024-04 70662353 m, 63003 m/sec, 294289528 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1440 secs. Pages in use: 615
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 21 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-04 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1445 secs. Pages in use: 616
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 15 (type EXCL) for 10 PermAdmissibility-PT-02-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 718 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 21 (type EXCL) for 20 PermAdmissibility-PT-02-CTLCardinality-2024-04
[[35mlola[0m][I] time limit : 2155 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 15 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] CANCELED task # 21 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-04 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1450 secs. Pages in use: 621
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 66 (type EXCL) for 48 PermAdmissibility-PT-02-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 1075 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 AGEF EXCL 5/1075 3/2000 PermAdmissibility-PT-02-CTLCardinality-2024-12 586278 m, 117255 m/sec, 3114445 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1455 secs. Pages in use: 621
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 AGEF EXCL 10/1075 5/2000 PermAdmissibility-PT-02-CTLCardinality-2024-12 1163260 m, 115396 m/sec, 6248277 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1460 secs. Pages in use: 621
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 AGEF EXCL 15/1075 8/2000 PermAdmissibility-PT-02-CTLCardinality-2024-12 1808240 m, 128996 m/sec, 9177560 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1465 secs. Pages in use: 624
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 AGEF EXCL 20/1075 10/2000 PermAdmissibility-PT-02-CTLCardinality-2024-12 2408388 m, 120029 m/sec, 12130467 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1470 secs. Pages in use: 626
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 AGEF EXCL 25/1075 12/2000 PermAdmissibility-PT-02-CTLCardinality-2024-12 2969250 m, 112172 m/sec, 15262322 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1475 secs. Pages in use: 628
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 AGEF EXCL 30/1075 14/2000 PermAdmissibility-PT-02-CTLCardinality-2024-12 3497681 m, 105686 m/sec, 18245363 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1480 secs. Pages in use: 630
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 AGEF EXCL 35/1075 16/2000 PermAdmissibility-PT-02-CTLCardinality-2024-12 4028302 m, 106124 m/sec, 21146321 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1485 secs. Pages in use: 632
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 AGEF EXCL 40/1075 19/2000 PermAdmissibility-PT-02-CTLCardinality-2024-12 4621236 m, 118586 m/sec, 23948976 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1490 secs. Pages in use: 635
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 AGEF EXCL 45/1075 21/2000 PermAdmissibility-PT-02-CTLCardinality-2024-12 5165633 m, 108879 m/sec, 26819820 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1495 secs. Pages in use: 637
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 AGEF EXCL 50/1075 23/2000 PermAdmissibility-PT-02-CTLCardinality-2024-12 5732545 m, 113382 m/sec, 29718257 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1500 secs. Pages in use: 639
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF 0 0 1 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 AGEF EXCL 55/1075 25/2000 PermAdmissibility-PT-02-CTLCardinality-2024-12 6251873 m, 103865 m/sec, 32618612 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1505 secs. Pages in use: 641
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 66 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 6554285
[[35mlola[0m][I] fired transitions : 34007566
[[35mlola[0m][I] time used : 58
[[35mlola[0m][I] memory pages used : 26
[[35mlola[0m][I] LAUNCH task # 40 (type EXCL) for 39 PermAdmissibility-PT-02-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 2092 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 40 (type EXCL) for PermAdmissibility-PT-02-CTLCardinality-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 33
[[35mlola[0m][I] fired transitions : 32
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1510 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1515 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1520 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1525 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1530 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1535 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1540 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1545 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1550 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1555 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1560 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1565 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1570 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1575 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1580 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1585 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1590 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1595 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1600 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1605 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1610 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1615 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1620 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1625 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1630 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1635 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1640 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1645 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1650 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1655 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1660 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1665 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1670 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1675 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1680 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1685 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1690 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1695 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1700 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1705 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1710 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1715 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1720 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1725 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1730 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1735 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1740 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1745 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1750 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1755 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1760 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1765 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1770 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1775 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1780 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1785 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1790 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1795 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1800 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1805 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1810 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1815 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1820 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1825 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1830 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1835 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1840 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1845 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1850 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1855 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1860 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1865 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1870 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1875 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1880 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1885 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1890 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1895 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1900 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1905 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1910 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1915 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1920 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1925 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1930 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1935 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1940 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1945 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1950 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1955 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-06: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-PT-02-CTLCardinality-2024-13: AG false findpath[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-PT-02-CTLCardinality-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-00: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] PermAdmissibility-PT-02-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-02"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is PermAdmissibility-PT-02, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r269-smll-171654408300161"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-02.tgz
mv PermAdmissibility-PT-02 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;