About the Execution of LoLA for PermAdmissibility-COL-05
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16207.220 | 3580051.00 | 3603710.00 | 13311.90 | ???T???????????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r269-smll-171654408200123.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is PermAdmissibility-COL-05, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r269-smll-171654408200123
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 516K
-rw-r--r-- 1 mcc users 7.5K Apr 12 09:12 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K Apr 12 09:12 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Apr 12 09:09 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Apr 12 09:09 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 23 07:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 23 07:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 23 07:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 12 09:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 107K Apr 12 09:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 10K Apr 12 09:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 81K Apr 12 09:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 07:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 54K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-00
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-01
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-02
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-03
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-04
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-05
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-06
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-07
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-08
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-09
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-10
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-11
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-12
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-13
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-14
FORMULA_NAME PermAdmissibility-COL-05-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717084433263
FORMULA PermAdmissibility-COL-05-LTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717088013314
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 61 (type SKEL/CNST) for 57 PermAdmissibility-COL-05-LTLCardinality-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 61 (type SKEL/CNST) for PermAdmissibility-COL-05-LTLCardinality-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 66 (type SKEL/FNDP) for 25 PermAdmissibility-COL-05-LTLCardinality-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 67 (type SKEL/EQUN) for 25 PermAdmissibility-COL-05-LTLCardinality-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 68 (type SKEL/SRCH) for 25 PermAdmissibility-COL-05-LTLCardinality-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 66 (type SKEL/FNDP) for PermAdmissibility-COL-05-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 67 (type EQUN) for PermAdmissibility-COL-05-LTLCardinality-07 (obsolete)
[[35mlola[0m][W] CANCELED task # 68 (type SRCH) for PermAdmissibility-COL-05-LTLCardinality-07 (obsolete)
[[35mlola[0m][I] FINISHED task # 68 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Places: 208, Transitions: 1024
[[35mlola[0m][I] FINISHED task # 67 (type SKEL/EQUN) for PermAdmissibility-COL-05-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] findlow criterion satisfied
[[35mlola[0m][I] Time for checking findlow: 2
[[35mlola[0m][I] LAUNCH task # 91 (type SKEL/EQUN) for 13 PermAdmissibility-COL-05-LTLCardinality-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 88 (type SKEL/SRCH) for 13 PermAdmissibility-COL-05-LTLCardinality-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 70 (type SKEL/SRCH) for 35 PermAdmissibility-COL-05-LTLCardinality-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 71 (type SKEL/SRCH) for 6 PermAdmissibility-COL-05-LTLCardinality-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 88 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 91 (type EQUN) for PermAdmissibility-COL-05-LTLCardinality-03 (obsolete)
[[35mlola[0m][I] LAUNCH task # 72 (type SKEL/SRCH) for 16 PermAdmissibility-COL-05-LTLCardinality-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 74 (type SKEL/SRCH) for 22 PermAdmissibility-COL-05-LTLCardinality-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 74 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 81
[[35mlola[0m][I] fired transitions : 81
[[35mlola[0m][I] time used : 10
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 71 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 81
[[35mlola[0m][I] fired transitions : 81
[[35mlola[0m][I] time used : 10
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 91 (type SKEL/EQUN) for PermAdmissibility-COL-05-LTLCardinality-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 70 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 38331
[[35mlola[0m][I] fired transitions : 167645
[[35mlola[0m][I] time used : 11
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-00: LTL 0 1 0 0 0 0 0 0
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-01: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-02: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-04: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-05: LTL 0 1 0 0 0 0 0 0
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-07: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 1 0 0 0 0 0 0
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-10: LTL 0 1 0 0 0 0 0 0
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-11: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-12: LTL 0 1 0 0 0 0 0 0
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-13: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-14: CONJ 1 1 0 0 0 0 0 0
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-15: CONJ 1 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 72 LTL SRCH 10/889 0/5 PermAdmissibility-COL-05-LTLCardinality-04 --
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 13 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 4 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 82 (type SKEL/SRCH) for 50 PermAdmissibility-COL-05-LTLCardinality-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 79 (type SKEL/SRCH) for 50 PermAdmissibility-COL-05-LTLCardinality-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 78 (type SKEL/SRCH) for 32 PermAdmissibility-COL-05-LTLCardinality-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 72 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 412
[[35mlola[0m][I] fired transitions : 707
[[35mlola[0m][I] time used : 10
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Rule S: 432 transitions removed,40 places removed
[[35mlola[0m][I] LAUNCH task # 77 (type SKEL/SRCH) for 19 PermAdmissibility-COL-05-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 77 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 83 (type SKEL/SRCH) for 57 PermAdmissibility-COL-05-LTLCardinality-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 79 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 82
[[35mlola[0m][I] fired transitions : 82
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 78 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 705
[[35mlola[0m][I] fired transitions : 985
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 82 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4954
[[35mlola[0m][I] fired transitions : 13156
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 76 (type SKEL/SRCH) for 6 PermAdmissibility-COL-05-LTLCardinality-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 69 (type SKEL/SRCH) for 0 PermAdmissibility-COL-05-LTLCardinality-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 73 (type SKEL/SRCH) for 25 PermAdmissibility-COL-05-LTLCardinality-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 73 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 350
[[35mlola[0m][I] fired transitions : 460
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 75 (type SKEL/SRCH) for 38 PermAdmissibility-COL-05-LTLCardinality-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 69 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 81
[[35mlola[0m][I] fired transitions : 81
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 80 (type SKEL/SRCH) for 44 PermAdmissibility-COL-05-LTLCardinality-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 80 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 81 (type SKEL/SRCH) for 3 PermAdmissibility-COL-05-LTLCardinality-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 81 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 84 (type SKEL/SRCH) for 41 PermAdmissibility-COL-05-LTLCardinality-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 84 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 120
[[35mlola[0m][I] fired transitions : 120
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 85 (type SKEL/SRCH) for 47 PermAdmissibility-COL-05-LTLCardinality-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] planning for PermAdmissibility-COL-05-LTLCardinality-12 stopped (result already fixed).
[[35mlola[0m][I] FINISHED task # 85 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 210
[[35mlola[0m][I] fired transitions : 236
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] planning for PermAdmissibility-COL-05-LTLCardinality-05 stopped (result already fixed).
[[35mlola[0m][I] planning for PermAdmissibility-COL-05-LTLCardinality-09 stopped (result already fixed).
[[35mlola[0m][I] planning for PermAdmissibility-COL-05-LTLCardinality-03 stopped (result already fixed).
[[35mlola[0m][I] planning for PermAdmissibility-COL-05-LTLCardinality-01 stopped (result already fixed).
[[35mlola[0m][I] LAUNCH task # 95 (type EXCL) for 25 PermAdmissibility-COL-05-LTLCardinality-07
[[35mlola[0m][I] time limit : 275 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 76 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 93 (type FNDP) for 25 PermAdmissibility-COL-05-LTLCardinality-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[*** LOG ERROR #0001 ***] [2024-05-30 15:54:06] [status_logger] string pointer is null
[[35mlola[0m][I] FINISHED task # 95 (type EXCL) for PermAdmissibility-COL-05-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 93 (type FNDP) for PermAdmissibility-COL-05-LTLCardinality-07 (obsolete)
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 47 PermAdmissibility-COL-05-LTLCardinality-13
[[35mlola[0m][I] time limit : 358 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for PermAdmissibility-COL-05-LTLCardinality-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 108
[[35mlola[0m][I] fired transitions : 108
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 41 PermAdmissibility-COL-05-LTLCardinality-11
[[35mlola[0m][I] time limit : 398 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 42 (type EXCL) for PermAdmissibility-COL-05-LTLCardinality-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 116
[[35mlola[0m][I] fired transitions : 116
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 50 PermAdmissibility-COL-05-LTLCardinality-14
[[35mlola[0m][I] time limit : 448 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 55 (type EXCL) for PermAdmissibility-COL-05-LTLCardinality-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 82
[[35mlola[0m][I] fired transitions : 82
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 PermAdmissibility-COL-05-LTLCardinality-06
[[35mlola[0m][I] time limit : 512 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for PermAdmissibility-COL-05-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 81
[[35mlola[0m][I] fired transitions : 81
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 16 PermAdmissibility-COL-05-LTLCardinality-04
[[35mlola[0m][I] time limit : 597 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 93 (type FNDP) for PermAdmissibility-COL-05-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 83 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 27228
[[35mlola[0m][I] fired transitions : 81783
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 75 (type SKEL/SRCH) for PermAdmissibility-COL-05-LTLCardinality-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 57551
[[35mlola[0m][I] fired transitions : 465914
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 17 (type EXCL) for PermAdmissibility-COL-05-LTLCardinality-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 390718
[[35mlola[0m][I] fired transitions : 684667
[[35mlola[0m][I] time used : 4
[[35mlola[0m][I] memory pages used : 3
[[35mlola[0m][I] LAUNCH task # 9 (type EXCL) for 6 PermAdmissibility-COL-05-LTLCardinality-02
[[35mlola[0m][I] time limit : 1194 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 9 (type EXCL) for PermAdmissibility-COL-05-LTLCardinality-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 81
[[35mlola[0m][I] fired transitions : 81
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 PermAdmissibility-COL-05-LTLCardinality-00
[[35mlola[0m][I] time limit : 1791 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for PermAdmissibility-COL-05-LTLCardinality-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 81
[[35mlola[0m][I] fired transitions : 81
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 33 (type EXCL) for 32 PermAdmissibility-COL-05-LTLCardinality-08
[[35mlola[0m][I] time limit : 3583 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1/3583 1/2000 PermAdmissibility-COL-05-LTLCardinality-08 39466 m, 7893 m/sec, 267455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 18 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 6/3583 2/2000 PermAdmissibility-COL-05-LTLCardinality-08 194628 m, 31032 m/sec, 1580043 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 23 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 11/3583 3/2000 PermAdmissibility-COL-05-LTLCardinality-08 342775 m, 29629 m/sec, 2875824 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 28 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 16/3583 4/2000 PermAdmissibility-COL-05-LTLCardinality-08 481842 m, 27813 m/sec, 4262784 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 33 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 21/3583 5/2000 PermAdmissibility-COL-05-LTLCardinality-08 609348 m, 25501 m/sec, 5764570 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 38 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 26/3583 6/2000 PermAdmissibility-COL-05-LTLCardinality-08 733696 m, 24869 m/sec, 7250259 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 43 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 31/3583 7/2000 PermAdmissibility-COL-05-LTLCardinality-08 877097 m, 28680 m/sec, 8611003 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 48 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 36/3583 7/2000 PermAdmissibility-COL-05-LTLCardinality-08 1015066 m, 27593 m/sec, 10048724 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 53 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 41/3583 9/2000 PermAdmissibility-COL-05-LTLCardinality-08 1169566 m, 30900 m/sec, 11333313 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 58 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 46/3583 9/2000 PermAdmissibility-COL-05-LTLCardinality-08 1309151 m, 27917 m/sec, 12660999 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 63 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 51/3583 10/2000 PermAdmissibility-COL-05-LTLCardinality-08 1453613 m, 28892 m/sec, 13950056 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 68 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 56/3583 11/2000 PermAdmissibility-COL-05-LTLCardinality-08 1590642 m, 27405 m/sec, 15332046 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 73 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 61/3583 12/2000 PermAdmissibility-COL-05-LTLCardinality-08 1715925 m, 25056 m/sec, 16841104 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 78 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 66/3583 13/2000 PermAdmissibility-COL-05-LTLCardinality-08 1839770 m, 24769 m/sec, 18319761 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 83 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 71/3583 14/2000 PermAdmissibility-COL-05-LTLCardinality-08 1984717 m, 28989 m/sec, 19638625 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 88 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 76/3583 15/2000 PermAdmissibility-COL-05-LTLCardinality-08 2127135 m, 28483 m/sec, 21040159 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 93 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 81/3583 16/2000 PermAdmissibility-COL-05-LTLCardinality-08 2257841 m, 26141 m/sec, 22504542 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 98 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 86/3583 17/2000 PermAdmissibility-COL-05-LTLCardinality-08 2407685 m, 29968 m/sec, 23783663 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 103 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 91/3583 18/2000 PermAdmissibility-COL-05-LTLCardinality-08 2550812 m, 28625 m/sec, 25123597 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 108 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 96/3583 19/2000 PermAdmissibility-COL-05-LTLCardinality-08 2678782 m, 25594 m/sec, 26603564 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 113 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 101/3583 20/2000 PermAdmissibility-COL-05-LTLCardinality-08 2805347 m, 25313 m/sec, 28045565 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 118 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 106/3583 21/2000 PermAdmissibility-COL-05-LTLCardinality-08 2952382 m, 29407 m/sec, 29354450 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 123 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 111/3583 22/2000 PermAdmissibility-COL-05-LTLCardinality-08 3093469 m, 28217 m/sec, 30721601 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 128 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 116/3583 23/2000 PermAdmissibility-COL-05-LTLCardinality-08 3221112 m, 25528 m/sec, 32160891 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 133 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 121/3583 24/2000 PermAdmissibility-COL-05-LTLCardinality-08 3367652 m, 29308 m/sec, 33377946 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 138 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 126/3583 25/2000 PermAdmissibility-COL-05-LTLCardinality-08 3502759 m, 27021 m/sec, 34758740 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 143 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 131/3583 25/2000 PermAdmissibility-COL-05-LTLCardinality-08 3631414 m, 25731 m/sec, 36175171 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 148 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 136/3583 26/2000 PermAdmissibility-COL-05-LTLCardinality-08 3755542 m, 24825 m/sec, 37598476 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 153 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 141/3583 27/2000 PermAdmissibility-COL-05-LTLCardinality-08 3883698 m, 25631 m/sec, 38960967 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 158 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 146/3583 28/2000 PermAdmissibility-COL-05-LTLCardinality-08 4023846 m, 28029 m/sec, 40270428 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 163 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 151/3583 29/2000 PermAdmissibility-COL-05-LTLCardinality-08 4156684 m, 26567 m/sec, 41656507 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 168 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 156/3583 30/2000 PermAdmissibility-COL-05-LTLCardinality-08 4287315 m, 26126 m/sec, 43034317 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 173 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 161/3583 31/2000 PermAdmissibility-COL-05-LTLCardinality-08 4406693 m, 23875 m/sec, 44529193 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 178 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 166/3583 32/2000 PermAdmissibility-COL-05-LTLCardinality-08 4526769 m, 24015 m/sec, 45954832 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 183 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 171/3583 32/2000 PermAdmissibility-COL-05-LTLCardinality-08 4638449 m, 22336 m/sec, 47492002 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 188 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 176/3583 33/2000 PermAdmissibility-COL-05-LTLCardinality-08 4780676 m, 28445 m/sec, 48704370 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 193 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 181/3583 34/2000 PermAdmissibility-COL-05-LTLCardinality-08 4918965 m, 27657 m/sec, 50064063 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 198 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 186/3583 35/2000 PermAdmissibility-COL-05-LTLCardinality-08 5053878 m, 26982 m/sec, 51439679 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 203 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 191/3583 36/2000 PermAdmissibility-COL-05-LTLCardinality-08 5176926 m, 24609 m/sec, 52944491 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 208 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 196/3583 37/2000 PermAdmissibility-COL-05-LTLCardinality-08 5296672 m, 23949 m/sec, 54402871 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 213 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 201/3583 38/2000 PermAdmissibility-COL-05-LTLCardinality-08 5415046 m, 23674 m/sec, 55876589 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 218 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 206/3583 39/2000 PermAdmissibility-COL-05-LTLCardinality-08 5542608 m, 25512 m/sec, 57334281 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 223 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 211/3583 40/2000 PermAdmissibility-COL-05-LTLCardinality-08 5694814 m, 30441 m/sec, 58614293 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 228 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 216/3583 41/2000 PermAdmissibility-COL-05-LTLCardinality-08 5838605 m, 28758 m/sec, 59967577 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 233 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 221/3583 42/2000 PermAdmissibility-COL-05-LTLCardinality-08 5984556 m, 29190 m/sec, 61252944 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 238 secs. Pages in use: 42
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 226/3583 43/2000 PermAdmissibility-COL-05-LTLCardinality-08 6130900 m, 29268 m/sec, 62490893 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 243 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 231/3583 44/2000 PermAdmissibility-COL-05-LTLCardinality-08 6273888 m, 28597 m/sec, 63753082 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 248 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 236/3583 45/2000 PermAdmissibility-COL-05-LTLCardinality-08 6407006 m, 26623 m/sec, 65133234 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 253 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 241/3583 45/2000 PermAdmissibility-COL-05-LTLCardinality-08 6541484 m, 26895 m/sec, 66438468 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 258 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 246/3583 46/2000 PermAdmissibility-COL-05-LTLCardinality-08 6680138 m, 27730 m/sec, 67748095 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 263 secs. Pages in use: 46
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 251/3583 47/2000 PermAdmissibility-COL-05-LTLCardinality-08 6818561 m, 27684 m/sec, 69040439 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 268 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 256/3583 48/2000 PermAdmissibility-COL-05-LTLCardinality-08 6944145 m, 25116 m/sec, 70462720 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 273 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 261/3583 49/2000 PermAdmissibility-COL-05-LTLCardinality-08 7068102 m, 24791 m/sec, 71835894 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 278 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 266/3583 50/2000 PermAdmissibility-COL-05-LTLCardinality-08 7212031 m, 28785 m/sec, 73055555 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 283 secs. Pages in use: 50
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 271/3583 51/2000 PermAdmissibility-COL-05-LTLCardinality-08 7344633 m, 26520 m/sec, 74450876 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 288 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 276/3583 52/2000 PermAdmissibility-COL-05-LTLCardinality-08 7480218 m, 27117 m/sec, 75815729 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 293 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 281/3583 53/2000 PermAdmissibility-COL-05-LTLCardinality-08 7599893 m, 23935 m/sec, 77330930 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 298 secs. Pages in use: 53
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 286/3583 54/2000 PermAdmissibility-COL-05-LTLCardinality-08 7721937 m, 24408 m/sec, 78785611 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 303 secs. Pages in use: 54
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 291/3583 54/2000 PermAdmissibility-COL-05-LTLCardinality-08 7837788 m, 23170 m/sec, 80290341 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 308 secs. Pages in use: 54
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 296/3583 55/2000 PermAdmissibility-COL-05-LTLCardinality-08 7973619 m, 27166 m/sec, 81651029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 313 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 301/3583 56/2000 PermAdmissibility-COL-05-LTLCardinality-08 8120121 m, 29300 m/sec, 82988337 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 318 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 306/3583 57/2000 PermAdmissibility-COL-05-LTLCardinality-08 8253472 m, 26670 m/sec, 84467112 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 323 secs. Pages in use: 57
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 311/3583 58/2000 PermAdmissibility-COL-05-LTLCardinality-08 8382539 m, 25813 m/sec, 85909267 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 328 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 316/3583 59/2000 PermAdmissibility-COL-05-LTLCardinality-08 8524427 m, 28377 m/sec, 87296237 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 333 secs. Pages in use: 59
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 321/3583 60/2000 PermAdmissibility-COL-05-LTLCardinality-08 8672888 m, 29692 m/sec, 88503578 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 338 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 326/3583 61/2000 PermAdmissibility-COL-05-LTLCardinality-08 8808658 m, 27154 m/sec, 89899484 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 343 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 331/3583 62/2000 PermAdmissibility-COL-05-LTLCardinality-08 8935318 m, 25332 m/sec, 91330768 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 348 secs. Pages in use: 62
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 336/3583 63/2000 PermAdmissibility-COL-05-LTLCardinality-08 9083427 m, 29621 m/sec, 92656960 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 353 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 341/3583 64/2000 PermAdmissibility-COL-05-LTLCardinality-08 9235600 m, 30434 m/sec, 93904886 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 358 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 346/3583 65/2000 PermAdmissibility-COL-05-LTLCardinality-08 9381647 m, 29209 m/sec, 95068157 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 363 secs. Pages in use: 65
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 351/3583 66/2000 PermAdmissibility-COL-05-LTLCardinality-08 9519376 m, 27545 m/sec, 96399662 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 368 secs. Pages in use: 66
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 356/3583 67/2000 PermAdmissibility-COL-05-LTLCardinality-08 9646779 m, 25480 m/sec, 97804553 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 373 secs. Pages in use: 67
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 361/3583 68/2000 PermAdmissibility-COL-05-LTLCardinality-08 9794662 m, 29576 m/sec, 99074670 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 378 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 366/3583 69/2000 PermAdmissibility-COL-05-LTLCardinality-08 9931260 m, 27319 m/sec, 100486383 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 383 secs. Pages in use: 69
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 371/3583 70/2000 PermAdmissibility-COL-05-LTLCardinality-08 10081788 m, 30105 m/sec, 101735712 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 388 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 376/3583 71/2000 PermAdmissibility-COL-05-LTLCardinality-08 10217808 m, 27204 m/sec, 103106420 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 393 secs. Pages in use: 71
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 381/3583 72/2000 PermAdmissibility-COL-05-LTLCardinality-08 10355512 m, 27540 m/sec, 104435759 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 398 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 386/3583 73/2000 PermAdmissibility-COL-05-LTLCardinality-08 10497026 m, 28302 m/sec, 105761831 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 403 secs. Pages in use: 73
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 391/3583 74/2000 PermAdmissibility-COL-05-LTLCardinality-08 10637232 m, 28041 m/sec, 106975282 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 408 secs. Pages in use: 74
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 396/3583 75/2000 PermAdmissibility-COL-05-LTLCardinality-08 10775146 m, 27582 m/sec, 108272662 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 413 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 401/3583 75/2000 PermAdmissibility-COL-05-LTLCardinality-08 10902028 m, 25376 m/sec, 109654659 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 418 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 406/3583 76/2000 PermAdmissibility-COL-05-LTLCardinality-08 11038868 m, 27368 m/sec, 110874401 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 423 secs. Pages in use: 76
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 411/3583 77/2000 PermAdmissibility-COL-05-LTLCardinality-08 11176756 m, 27577 m/sec, 112180364 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 428 secs. Pages in use: 77
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 416/3583 78/2000 PermAdmissibility-COL-05-LTLCardinality-08 11305200 m, 25688 m/sec, 113560502 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 433 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 421/3583 79/2000 PermAdmissibility-COL-05-LTLCardinality-08 11429643 m, 24888 m/sec, 114946092 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 438 secs. Pages in use: 79
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 426/3583 80/2000 PermAdmissibility-COL-05-LTLCardinality-08 11557276 m, 25526 m/sec, 116235043 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 443 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 431/3583 81/2000 PermAdmissibility-COL-05-LTLCardinality-08 11697896 m, 28124 m/sec, 117543152 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 448 secs. Pages in use: 81
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 436/3583 82/2000 PermAdmissibility-COL-05-LTLCardinality-08 11831287 m, 26678 m/sec, 118935257 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 453 secs. Pages in use: 82
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 441/3583 83/2000 PermAdmissibility-COL-05-LTLCardinality-08 11954662 m, 24675 m/sec, 120383638 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 458 secs. Pages in use: 83
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 446/3583 84/2000 PermAdmissibility-COL-05-LTLCardinality-08 12085025 m, 26072 m/sec, 121773564 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 463 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 451/3583 85/2000 PermAdmissibility-COL-05-LTLCardinality-08 12237258 m, 30446 m/sec, 123007911 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 468 secs. Pages in use: 85
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 456/3583 86/2000 PermAdmissibility-COL-05-LTLCardinality-08 12385252 m, 29598 m/sec, 124249598 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 473 secs. Pages in use: 86
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 461/3583 87/2000 PermAdmissibility-COL-05-LTLCardinality-08 12532709 m, 29491 m/sec, 125403310 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 478 secs. Pages in use: 87
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 466/3583 88/2000 PermAdmissibility-COL-05-LTLCardinality-08 12671992 m, 27856 m/sec, 126649451 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 483 secs. Pages in use: 88
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 471/3583 88/2000 PermAdmissibility-COL-05-LTLCardinality-08 12811254 m, 27852 m/sec, 127840311 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 488 secs. Pages in use: 88
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 476/3583 89/2000 PermAdmissibility-COL-05-LTLCardinality-08 12951683 m, 28085 m/sec, 129053947 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 493 secs. Pages in use: 89
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 481/3583 90/2000 PermAdmissibility-COL-05-LTLCardinality-08 13080316 m, 25726 m/sec, 130387044 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 498 secs. Pages in use: 90
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 486/3583 91/2000 PermAdmissibility-COL-05-LTLCardinality-08 13219191 m, 27775 m/sec, 131566080 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 503 secs. Pages in use: 91
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 491/3583 92/2000 PermAdmissibility-COL-05-LTLCardinality-08 13357740 m, 27709 m/sec, 132823578 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 508 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 496/3583 93/2000 PermAdmissibility-COL-05-LTLCardinality-08 13485631 m, 25578 m/sec, 134213814 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 513 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 501/3583 94/2000 PermAdmissibility-COL-05-LTLCardinality-08 13611436 m, 25161 m/sec, 135603524 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 518 secs. Pages in use: 94
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 506/3583 95/2000 PermAdmissibility-COL-05-LTLCardinality-08 13739055 m, 25523 m/sec, 136958033 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 523 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 511/3583 96/2000 PermAdmissibility-COL-05-LTLCardinality-08 13886813 m, 29551 m/sec, 138249638 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 528 secs. Pages in use: 96
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 516/3583 97/2000 PermAdmissibility-COL-05-LTLCardinality-08 14018772 m, 26391 m/sec, 139666469 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 533 secs. Pages in use: 97
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 521/3583 98/2000 PermAdmissibility-COL-05-LTLCardinality-08 14169105 m, 30066 m/sec, 141025039 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 538 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 526/3583 99/2000 PermAdmissibility-COL-05-LTLCardinality-08 14324144 m, 31007 m/sec, 142288530 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 543 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 531/3583 100/2000 PermAdmissibility-COL-05-LTLCardinality-08 14463569 m, 27885 m/sec, 143688557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 548 secs. Pages in use: 100
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 536/3583 101/2000 PermAdmissibility-COL-05-LTLCardinality-08 14595107 m, 26307 m/sec, 145113216 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 553 secs. Pages in use: 101
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 541/3583 102/2000 PermAdmissibility-COL-05-LTLCardinality-08 14746440 m, 30266 m/sec, 146465040 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 558 secs. Pages in use: 102
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 546/3583 103/2000 PermAdmissibility-COL-05-LTLCardinality-08 14899911 m, 30694 m/sec, 147808358 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 563 secs. Pages in use: 103
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 551/3583 104/2000 PermAdmissibility-COL-05-LTLCardinality-08 15050615 m, 30140 m/sec, 149097124 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 568 secs. Pages in use: 104
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 556/3583 105/2000 PermAdmissibility-COL-05-LTLCardinality-08 15186590 m, 27195 m/sec, 150524957 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 573 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 561/3583 106/2000 PermAdmissibility-COL-05-LTLCardinality-08 15322009 m, 27083 m/sec, 151936235 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 578 secs. Pages in use: 106
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 566/3583 107/2000 PermAdmissibility-COL-05-LTLCardinality-08 15471451 m, 29888 m/sec, 153305530 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 583 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 571/3583 108/2000 PermAdmissibility-COL-05-LTLCardinality-08 15620059 m, 29721 m/sec, 154645518 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 588 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 576/3583 109/2000 PermAdmissibility-COL-05-LTLCardinality-08 15769624 m, 29913 m/sec, 155972718 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 593 secs. Pages in use: 109
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 581/3583 110/2000 PermAdmissibility-COL-05-LTLCardinality-08 15902718 m, 26618 m/sec, 157376638 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 598 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 586/3583 111/2000 PermAdmissibility-COL-05-LTLCardinality-08 16054311 m, 30318 m/sec, 158665364 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 603 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 591/3583 112/2000 PermAdmissibility-COL-05-LTLCardinality-08 16193715 m, 27880 m/sec, 160037985 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 608 secs. Pages in use: 112
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 596/3583 113/2000 PermAdmissibility-COL-05-LTLCardinality-08 16342928 m, 29842 m/sec, 161318846 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 613 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 601/3583 114/2000 PermAdmissibility-COL-05-LTLCardinality-08 16480475 m, 27509 m/sec, 162680082 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 618 secs. Pages in use: 114
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 606/3583 115/2000 PermAdmissibility-COL-05-LTLCardinality-08 16605390 m, 24983 m/sec, 164104816 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 623 secs. Pages in use: 115
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 611/3583 116/2000 PermAdmissibility-COL-05-LTLCardinality-08 16758706 m, 30663 m/sec, 165367128 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 628 secs. Pages in use: 116
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 616/3583 117/2000 PermAdmissibility-COL-05-LTLCardinality-08 16897913 m, 27841 m/sec, 166728281 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 633 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 621/3583 117/2000 PermAdmissibility-COL-05-LTLCardinality-08 17023356 m, 25088 m/sec, 168171275 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 638 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 626/3583 118/2000 PermAdmissibility-COL-05-LTLCardinality-08 17144690 m, 24266 m/sec, 169622670 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 643 secs. Pages in use: 118
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 631/3583 119/2000 PermAdmissibility-COL-05-LTLCardinality-08 17295016 m, 30065 m/sec, 170878276 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 648 secs. Pages in use: 119
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 636/3583 120/2000 PermAdmissibility-COL-05-LTLCardinality-08 17437713 m, 28539 m/sec, 172207544 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 653 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 641/3583 121/2000 PermAdmissibility-COL-05-LTLCardinality-08 17564519 m, 25361 m/sec, 173654695 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 658 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 646/3583 122/2000 PermAdmissibility-COL-05-LTLCardinality-08 17687794 m, 24655 m/sec, 175092459 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 663 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 651/3583 123/2000 PermAdmissibility-COL-05-LTLCardinality-08 17831145 m, 28670 m/sec, 176426847 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 668 secs. Pages in use: 123
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 656/3583 124/2000 PermAdmissibility-COL-05-LTLCardinality-08 17985007 m, 30772 m/sec, 177713048 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 673 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 661/3583 125/2000 PermAdmissibility-COL-05-LTLCardinality-08 18138490 m, 30696 m/sec, 178983676 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 678 secs. Pages in use: 125
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 666/3583 126/2000 PermAdmissibility-COL-05-LTLCardinality-08 18287122 m, 29726 m/sec, 180283536 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 683 secs. Pages in use: 126
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 671/3583 127/2000 PermAdmissibility-COL-05-LTLCardinality-08 18429760 m, 28527 m/sec, 181600966 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 688 secs. Pages in use: 127
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 676/3583 128/2000 PermAdmissibility-COL-05-LTLCardinality-08 18574491 m, 28946 m/sec, 182921362 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 693 secs. Pages in use: 128
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 681/3583 129/2000 PermAdmissibility-COL-05-LTLCardinality-08 18705043 m, 26110 m/sec, 184336832 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 698 secs. Pages in use: 129
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 686/3583 130/2000 PermAdmissibility-COL-05-LTLCardinality-08 18853060 m, 29603 m/sec, 185603719 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 703 secs. Pages in use: 130
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 691/3583 131/2000 PermAdmissibility-COL-05-LTLCardinality-08 18992037 m, 27795 m/sec, 186973938 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 708 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 696/3583 132/2000 PermAdmissibility-COL-05-LTLCardinality-08 19113957 m, 24384 m/sec, 188441207 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 713 secs. Pages in use: 132
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 701/3583 133/2000 PermAdmissibility-COL-05-LTLCardinality-08 19233387 m, 23886 m/sec, 189904314 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 718 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 706/3583 134/2000 PermAdmissibility-COL-05-LTLCardinality-08 19387284 m, 30779 m/sec, 191211181 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 723 secs. Pages in use: 134
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 711/3583 135/2000 PermAdmissibility-COL-05-LTLCardinality-08 19526697 m, 27882 m/sec, 192632097 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 728 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 716/3583 136/2000 PermAdmissibility-COL-05-LTLCardinality-08 19662232 m, 27107 m/sec, 193973423 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 733 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 721/3583 137/2000 PermAdmissibility-COL-05-LTLCardinality-08 19806855 m, 28924 m/sec, 195228202 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 738 secs. Pages in use: 137
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 726/3583 137/2000 PermAdmissibility-COL-05-LTLCardinality-08 19939342 m, 26497 m/sec, 196641860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 743 secs. Pages in use: 137
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 731/3583 138/2000 PermAdmissibility-COL-05-LTLCardinality-08 20077197 m, 27571 m/sec, 198007879 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 748 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 736/3583 139/2000 PermAdmissibility-COL-05-LTLCardinality-08 20196449 m, 23850 m/sec, 199521706 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 753 secs. Pages in use: 139
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 741/3583 140/2000 PermAdmissibility-COL-05-LTLCardinality-08 20318652 m, 24440 m/sec, 201047622 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 758 secs. Pages in use: 140
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 746/3583 141/2000 PermAdmissibility-COL-05-LTLCardinality-08 20437322 m, 23734 m/sec, 202532944 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 763 secs. Pages in use: 141
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 751/3583 142/2000 PermAdmissibility-COL-05-LTLCardinality-08 20552447 m, 23025 m/sec, 204033901 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 768 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 756/3583 142/2000 PermAdmissibility-COL-05-LTLCardinality-08 20668811 m, 23272 m/sec, 205472732 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 773 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 761/3583 143/2000 PermAdmissibility-COL-05-LTLCardinality-08 20811316 m, 28501 m/sec, 206726455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 778 secs. Pages in use: 143
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 766/3583 144/2000 PermAdmissibility-COL-05-LTLCardinality-08 20945724 m, 26881 m/sec, 208095935 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 783 secs. Pages in use: 144
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 771/3583 145/2000 PermAdmissibility-COL-05-LTLCardinality-08 21076395 m, 26134 m/sec, 209486554 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 788 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 776/3583 146/2000 PermAdmissibility-COL-05-LTLCardinality-08 21204688 m, 25658 m/sec, 210919866 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 793 secs. Pages in use: 146
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 781/3583 147/2000 PermAdmissibility-COL-05-LTLCardinality-08 21320966 m, 23255 m/sec, 212478860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 798 secs. Pages in use: 147
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 786/3583 148/2000 PermAdmissibility-COL-05-LTLCardinality-08 21438879 m, 23582 m/sec, 213953398 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 803 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 791/3583 149/2000 PermAdmissibility-COL-05-LTLCardinality-08 21553095 m, 22843 m/sec, 215447648 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 808 secs. Pages in use: 149
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 796/3583 149/2000 PermAdmissibility-COL-05-LTLCardinality-08 21664441 m, 22269 m/sec, 216913471 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 813 secs. Pages in use: 149
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 801/3583 150/2000 PermAdmissibility-COL-05-LTLCardinality-08 21806018 m, 28315 m/sec, 218153215 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 818 secs. Pages in use: 150
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 806/3583 151/2000 PermAdmissibility-COL-05-LTLCardinality-08 21942889 m, 27374 m/sec, 219490625 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 823 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 811/3583 152/2000 PermAdmissibility-COL-05-LTLCardinality-08 22073764 m, 26175 m/sec, 220878762 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 828 secs. Pages in use: 152
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 816/3583 153/2000 PermAdmissibility-COL-05-LTLCardinality-08 22201973 m, 25641 m/sec, 222286307 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 833 secs. Pages in use: 153
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 821/3583 154/2000 PermAdmissibility-COL-05-LTLCardinality-08 22319662 m, 23537 m/sec, 223823271 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 838 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 826/3583 155/2000 PermAdmissibility-COL-05-LTLCardinality-08 22435838 m, 23235 m/sec, 225303798 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 843 secs. Pages in use: 155
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 831/3583 155/2000 PermAdmissibility-COL-05-LTLCardinality-08 22550733 m, 22979 m/sec, 226798968 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 848 secs. Pages in use: 155
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 836/3583 156/2000 PermAdmissibility-COL-05-LTLCardinality-08 22655631 m, 20979 m/sec, 228357876 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 853 secs. Pages in use: 156
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 841/3583 157/2000 PermAdmissibility-COL-05-LTLCardinality-08 22802238 m, 29321 m/sec, 229524112 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 858 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 846/3583 158/2000 PermAdmissibility-COL-05-LTLCardinality-08 22939197 m, 27391 m/sec, 230873912 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 863 secs. Pages in use: 158
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 851/3583 159/2000 PermAdmissibility-COL-05-LTLCardinality-08 23072156 m, 26591 m/sec, 232257757 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 868 secs. Pages in use: 159
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 856/3583 160/2000 PermAdmissibility-COL-05-LTLCardinality-08 23200964 m, 25761 m/sec, 233679187 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 873 secs. Pages in use: 160
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 861/3583 161/2000 PermAdmissibility-COL-05-LTLCardinality-08 23319250 m, 23657 m/sec, 235221253 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 878 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 866/3583 161/2000 PermAdmissibility-COL-05-LTLCardinality-08 23435809 m, 23311 m/sec, 236698066 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 883 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 871/3583 162/2000 PermAdmissibility-COL-05-LTLCardinality-08 23551368 m, 23111 m/sec, 238188522 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 888 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 876/3583 163/2000 PermAdmissibility-COL-05-LTLCardinality-08 23657684 m, 21263 m/sec, 239760491 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 893 secs. Pages in use: 163
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 881/3583 164/2000 PermAdmissibility-COL-05-LTLCardinality-08 23802975 m, 29058 m/sec, 241047391 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 898 secs. Pages in use: 164
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 886/3583 165/2000 PermAdmissibility-COL-05-LTLCardinality-08 23948523 m, 29109 m/sec, 242389444 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 903 secs. Pages in use: 165
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 891/3583 166/2000 PermAdmissibility-COL-05-LTLCardinality-08 24078059 m, 25907 m/sec, 243856423 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 908 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 896/3583 167/2000 PermAdmissibility-COL-05-LTLCardinality-08 24203819 m, 25152 m/sec, 245319536 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 913 secs. Pages in use: 167
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 901/3583 168/2000 PermAdmissibility-COL-05-LTLCardinality-08 24344574 m, 28151 m/sec, 246570372 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 918 secs. Pages in use: 168
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 906/3583 169/2000 PermAdmissibility-COL-05-LTLCardinality-08 24484164 m, 27918 m/sec, 247933436 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 923 secs. Pages in use: 169
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 911/3583 170/2000 PermAdmissibility-COL-05-LTLCardinality-08 24619656 m, 27098 m/sec, 249305493 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 928 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 916/3583 170/2000 PermAdmissibility-COL-05-LTLCardinality-08 24742007 m, 24470 m/sec, 250836035 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 933 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 921/3583 171/2000 PermAdmissibility-COL-05-LTLCardinality-08 24863711 m, 24340 m/sec, 252308880 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 938 secs. Pages in use: 171
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 926/3583 172/2000 PermAdmissibility-COL-05-LTLCardinality-08 24983585 m, 23974 m/sec, 253755172 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 943 secs. Pages in use: 172
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 931/3583 173/2000 PermAdmissibility-COL-05-LTLCardinality-08 25128273 m, 28937 m/sec, 254998966 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 948 secs. Pages in use: 173
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 936/3583 174/2000 PermAdmissibility-COL-05-LTLCardinality-08 25262099 m, 26765 m/sec, 256371684 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 953 secs. Pages in use: 174
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 941/3583 175/2000 PermAdmissibility-COL-05-LTLCardinality-08 25389858 m, 25551 m/sec, 257817296 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 958 secs. Pages in use: 175
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 946/3583 176/2000 PermAdmissibility-COL-05-LTLCardinality-08 25511623 m, 24353 m/sec, 259314330 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 963 secs. Pages in use: 176
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 951/3583 177/2000 PermAdmissibility-COL-05-LTLCardinality-08 25631123 m, 23900 m/sec, 260786488 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 968 secs. Pages in use: 177
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 956/3583 177/2000 PermAdmissibility-COL-05-LTLCardinality-08 25763371 m, 26449 m/sec, 262110076 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 973 secs. Pages in use: 177
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 961/3583 178/2000 PermAdmissibility-COL-05-LTLCardinality-08 25899704 m, 27266 m/sec, 263451829 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 978 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 966/3583 179/2000 PermAdmissibility-COL-05-LTLCardinality-08 26030257 m, 26110 m/sec, 264854831 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 983 secs. Pages in use: 179
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 971/3583 180/2000 PermAdmissibility-COL-05-LTLCardinality-08 26167233 m, 27395 m/sec, 266191960 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 988 secs. Pages in use: 180
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 976/3583 181/2000 PermAdmissibility-COL-05-LTLCardinality-08 26285993 m, 23752 m/sec, 267693992 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 993 secs. Pages in use: 181
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 981/3583 182/2000 PermAdmissibility-COL-05-LTLCardinality-08 26406572 m, 24115 m/sec, 269209992 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 998 secs. Pages in use: 182
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 986/3583 183/2000 PermAdmissibility-COL-05-LTLCardinality-08 26523561 m, 23397 m/sec, 270677455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1003 secs. Pages in use: 183
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 991/3583 183/2000 PermAdmissibility-COL-05-LTLCardinality-08 26637600 m, 22807 m/sec, 272192996 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1008 secs. Pages in use: 183
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 996/3583 184/2000 PermAdmissibility-COL-05-LTLCardinality-08 26761152 m, 24710 m/sec, 273549677 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1013 secs. Pages in use: 184
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1001/3583 185/2000 PermAdmissibility-COL-05-LTLCardinality-08 26898702 m, 27510 m/sec, 274856748 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1018 secs. Pages in use: 185
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1006/3583 186/2000 PermAdmissibility-COL-05-LTLCardinality-08 27030392 m, 26338 m/sec, 276248931 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1023 secs. Pages in use: 186
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1011/3583 187/2000 PermAdmissibility-COL-05-LTLCardinality-08 27161443 m, 26210 m/sec, 277622462 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1028 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1016/3583 188/2000 PermAdmissibility-COL-05-LTLCardinality-08 27287063 m, 25124 m/sec, 279061436 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1033 secs. Pages in use: 188
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1021/3583 189/2000 PermAdmissibility-COL-05-LTLCardinality-08 27405531 m, 23693 m/sec, 280563726 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1038 secs. Pages in use: 189
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1026/3583 190/2000 PermAdmissibility-COL-05-LTLCardinality-08 27519809 m, 22855 m/sec, 282047576 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1043 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1031/3583 190/2000 PermAdmissibility-COL-05-LTLCardinality-08 27632958 m, 22629 m/sec, 283533188 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1048 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1036/3583 191/2000 PermAdmissibility-COL-05-LTLCardinality-08 27747957 m, 22999 m/sec, 284914973 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1053 secs. Pages in use: 191
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1041/3583 192/2000 PermAdmissibility-COL-05-LTLCardinality-08 27882870 m, 26982 m/sec, 286127447 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1058 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1046/3583 193/2000 PermAdmissibility-COL-05-LTLCardinality-08 28013707 m, 26167 m/sec, 287440263 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1063 secs. Pages in use: 193
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1051/3583 194/2000 PermAdmissibility-COL-05-LTLCardinality-08 28139963 m, 25251 m/sec, 288827090 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1068 secs. Pages in use: 194
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1056/3583 195/2000 PermAdmissibility-COL-05-LTLCardinality-08 28258514 m, 23710 m/sec, 290305547 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1073 secs. Pages in use: 195
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1061/3583 195/2000 PermAdmissibility-COL-05-LTLCardinality-08 28384328 m, 25162 m/sec, 291656662 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1078 secs. Pages in use: 195
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1066/3583 196/2000 PermAdmissibility-COL-05-LTLCardinality-08 28503758 m, 23886 m/sec, 293075856 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1083 secs. Pages in use: 196
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1071/3583 197/2000 PermAdmissibility-COL-05-LTLCardinality-08 28615753 m, 22399 m/sec, 294607441 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1088 secs. Pages in use: 197
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1076/3583 198/2000 PermAdmissibility-COL-05-LTLCardinality-08 28726205 m, 22090 m/sec, 296135408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1093 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1081/3583 199/2000 PermAdmissibility-COL-05-LTLCardinality-08 28834174 m, 21593 m/sec, 297661557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1098 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1086/3583 199/2000 PermAdmissibility-COL-05-LTLCardinality-08 28945167 m, 22198 m/sec, 299110058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1103 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1091/3583 200/2000 PermAdmissibility-COL-05-LTLCardinality-08 29053013 m, 21569 m/sec, 300582456 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1108 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1096/3583 201/2000 PermAdmissibility-COL-05-LTLCardinality-08 29154503 m, 20298 m/sec, 302136992 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1113 secs. Pages in use: 201
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1101/3583 201/2000 PermAdmissibility-COL-05-LTLCardinality-08 29261023 m, 21304 m/sec, 303541318 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1118 secs. Pages in use: 201
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1106/3583 202/2000 PermAdmissibility-COL-05-LTLCardinality-08 29396331 m, 27061 m/sec, 304758927 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1123 secs. Pages in use: 202
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1111/3583 203/2000 PermAdmissibility-COL-05-LTLCardinality-08 29528186 m, 26371 m/sec, 306071616 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1128 secs. Pages in use: 203
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1116/3583 204/2000 PermAdmissibility-COL-05-LTLCardinality-08 29654725 m, 25307 m/sec, 307459964 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1133 secs. Pages in use: 204
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1121/3583 205/2000 PermAdmissibility-COL-05-LTLCardinality-08 29772896 m, 23634 m/sec, 308903288 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1138 secs. Pages in use: 205
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1126/3583 206/2000 PermAdmissibility-COL-05-LTLCardinality-08 29899363 m, 25293 m/sec, 310278860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1143 secs. Pages in use: 206
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1131/3583 207/2000 PermAdmissibility-COL-05-LTLCardinality-08 30021261 m, 24379 m/sec, 311683631 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1148 secs. Pages in use: 207
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1136/3583 207/2000 PermAdmissibility-COL-05-LTLCardinality-08 30126623 m, 21072 m/sec, 313257486 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1153 secs. Pages in use: 207
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1141/3583 208/2000 PermAdmissibility-COL-05-LTLCardinality-08 30243037 m, 23282 m/sec, 314766303 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1158 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1146/3583 209/2000 PermAdmissibility-COL-05-LTLCardinality-08 30346767 m, 20746 m/sec, 316318468 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1163 secs. Pages in use: 209
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1151/3583 210/2000 PermAdmissibility-COL-05-LTLCardinality-08 30459374 m, 22521 m/sec, 317739535 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1168 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1156/3583 210/2000 PermAdmissibility-COL-05-LTLCardinality-08 30567986 m, 21722 m/sec, 319225947 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1173 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1161/3583 211/2000 PermAdmissibility-COL-05-LTLCardinality-08 30669583 m, 20319 m/sec, 320792603 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1178 secs. Pages in use: 211
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1166/3583 212/2000 PermAdmissibility-COL-05-LTLCardinality-08 30779509 m, 21985 m/sec, 322198473 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1183 secs. Pages in use: 212
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1171/3583 213/2000 PermAdmissibility-COL-05-LTLCardinality-08 30922413 m, 28580 m/sec, 323465382 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1188 secs. Pages in use: 213
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1176/3583 214/2000 PermAdmissibility-COL-05-LTLCardinality-08 31058105 m, 27138 m/sec, 324818053 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1193 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1181/3583 215/2000 PermAdmissibility-COL-05-LTLCardinality-08 31188053 m, 25989 m/sec, 326224993 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1198 secs. Pages in use: 215
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1186/3583 216/2000 PermAdmissibility-COL-05-LTLCardinality-08 31305988 m, 23587 m/sec, 327741272 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1203 secs. Pages in use: 216
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1191/3583 216/2000 PermAdmissibility-COL-05-LTLCardinality-08 31425014 m, 23805 m/sec, 329186081 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1208 secs. Pages in use: 216
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1196/3583 217/2000 PermAdmissibility-COL-05-LTLCardinality-08 31538396 m, 22676 m/sec, 330699980 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1213 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1201/3583 218/2000 PermAdmissibility-COL-05-LTLCardinality-08 31673462 m, 27013 m/sec, 331977101 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1218 secs. Pages in use: 218
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1206/3583 219/2000 PermAdmissibility-COL-05-LTLCardinality-08 31810438 m, 27395 m/sec, 333332385 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1223 secs. Pages in use: 219
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1211/3583 220/2000 PermAdmissibility-COL-05-LTLCardinality-08 31945038 m, 26920 m/sec, 334685672 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1228 secs. Pages in use: 220
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1216/3583 221/2000 PermAdmissibility-COL-05-LTLCardinality-08 32069964 m, 24985 m/sec, 336160716 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1233 secs. Pages in use: 221
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1221/3583 222/2000 PermAdmissibility-COL-05-LTLCardinality-08 32189426 m, 23892 m/sec, 337637832 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1238 secs. Pages in use: 222
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1226/3583 222/2000 PermAdmissibility-COL-05-LTLCardinality-08 32303713 m, 22857 m/sec, 339090876 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1243 secs. Pages in use: 222
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1231/3583 223/2000 PermAdmissibility-COL-05-LTLCardinality-08 32441161 m, 27489 m/sec, 340253538 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1248 secs. Pages in use: 223
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1236/3583 224/2000 PermAdmissibility-COL-05-LTLCardinality-08 32571960 m, 26159 m/sec, 341600270 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1253 secs. Pages in use: 224
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1241/3583 225/2000 PermAdmissibility-COL-05-LTLCardinality-08 32695644 m, 24736 m/sec, 343040327 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1258 secs. Pages in use: 225
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1246/3583 226/2000 PermAdmissibility-COL-05-LTLCardinality-08 32822518 m, 25374 m/sec, 344374860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1263 secs. Pages in use: 226
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1251/3583 227/2000 PermAdmissibility-COL-05-LTLCardinality-08 32940885 m, 23673 m/sec, 345851945 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1268 secs. Pages in use: 227
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1256/3583 228/2000 PermAdmissibility-COL-05-LTLCardinality-08 33055895 m, 23002 m/sec, 347359094 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1273 secs. Pages in use: 228
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1261/3583 228/2000 PermAdmissibility-COL-05-LTLCardinality-08 33168383 m, 22497 m/sec, 348836534 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1278 secs. Pages in use: 228
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1266/3583 229/2000 PermAdmissibility-COL-05-LTLCardinality-08 33277792 m, 21881 m/sec, 350328809 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1283 secs. Pages in use: 229
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1271/3583 230/2000 PermAdmissibility-COL-05-LTLCardinality-08 33382277 m, 20897 m/sec, 351818086 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1288 secs. Pages in use: 230
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1276/3583 231/2000 PermAdmissibility-COL-05-LTLCardinality-08 33520187 m, 27582 m/sec, 352984030 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1293 secs. Pages in use: 231
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1281/3583 232/2000 PermAdmissibility-COL-05-LTLCardinality-08 33649409 m, 25844 m/sec, 354336728 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1298 secs. Pages in use: 232
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1286/3583 233/2000 PermAdmissibility-COL-05-LTLCardinality-08 33780920 m, 26302 m/sec, 355625309 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1303 secs. Pages in use: 233
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1291/3583 233/2000 PermAdmissibility-COL-05-LTLCardinality-08 33902083 m, 24232 m/sec, 357094306 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1308 secs. Pages in use: 233
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1296/3583 234/2000 PermAdmissibility-COL-05-LTLCardinality-08 34019349 m, 23453 m/sec, 358533421 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1313 secs. Pages in use: 234
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1301/3583 235/2000 PermAdmissibility-COL-05-LTLCardinality-08 34136833 m, 23496 m/sec, 359895079 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1318 secs. Pages in use: 235
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1306/3583 236/2000 PermAdmissibility-COL-05-LTLCardinality-08 34271681 m, 26969 m/sec, 361099252 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1323 secs. Pages in use: 236
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1311/3583 237/2000 PermAdmissibility-COL-05-LTLCardinality-08 34400983 m, 25860 m/sec, 362406657 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1328 secs. Pages in use: 237
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1316/3583 238/2000 PermAdmissibility-COL-05-LTLCardinality-08 34527711 m, 25345 m/sec, 363719384 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1333 secs. Pages in use: 238
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1321/3583 239/2000 PermAdmissibility-COL-05-LTLCardinality-08 34654051 m, 25268 m/sec, 365072837 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1338 secs. Pages in use: 239
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1326/3583 239/2000 PermAdmissibility-COL-05-LTLCardinality-08 34771080 m, 23405 m/sec, 366568038 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1343 secs. Pages in use: 239
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1331/3583 240/2000 PermAdmissibility-COL-05-LTLCardinality-08 34883433 m, 22470 m/sec, 368040918 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1348 secs. Pages in use: 240
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1336/3583 241/2000 PermAdmissibility-COL-05-LTLCardinality-08 34999011 m, 23115 m/sec, 369452995 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1353 secs. Pages in use: 241
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1341/3583 242/2000 PermAdmissibility-COL-05-LTLCardinality-08 35105638 m, 21325 m/sec, 370986525 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1358 secs. Pages in use: 242
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1346/3583 243/2000 PermAdmissibility-COL-05-LTLCardinality-08 35236480 m, 26168 m/sec, 372176763 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1363 secs. Pages in use: 243
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1351/3583 243/2000 PermAdmissibility-COL-05-LTLCardinality-08 35366247 m, 25953 m/sec, 373456969 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1368 secs. Pages in use: 243
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1356/3583 244/2000 PermAdmissibility-COL-05-LTLCardinality-08 35493645 m, 25479 m/sec, 374731504 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1373 secs. Pages in use: 244
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1361/3583 245/2000 PermAdmissibility-COL-05-LTLCardinality-08 35624214 m, 26113 m/sec, 376018630 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1378 secs. Pages in use: 245
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1366/3583 246/2000 PermAdmissibility-COL-05-LTLCardinality-08 35739437 m, 23044 m/sec, 377489056 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1383 secs. Pages in use: 246
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1371/3583 247/2000 PermAdmissibility-COL-05-LTLCardinality-08 35857362 m, 23585 m/sec, 378946871 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1388 secs. Pages in use: 247
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1376/3583 248/2000 PermAdmissibility-COL-05-LTLCardinality-08 35970272 m, 22582 m/sec, 380379894 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1393 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1381/3583 248/2000 PermAdmissibility-COL-05-LTLCardinality-08 36081893 m, 22324 m/sec, 381831942 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1398 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1386/3583 249/2000 PermAdmissibility-COL-05-LTLCardinality-08 36199341 m, 23489 m/sec, 383198319 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1403 secs. Pages in use: 249
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1391/3583 250/2000 PermAdmissibility-COL-05-LTLCardinality-08 36339724 m, 28076 m/sec, 384461266 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1408 secs. Pages in use: 250
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1396/3583 251/2000 PermAdmissibility-COL-05-LTLCardinality-08 36474968 m, 27048 m/sec, 385808917 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1413 secs. Pages in use: 251
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1401/3583 252/2000 PermAdmissibility-COL-05-LTLCardinality-08 36603917 m, 25789 m/sec, 387213322 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1418 secs. Pages in use: 252
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1406/3583 253/2000 PermAdmissibility-COL-05-LTLCardinality-08 36722450 m, 23706 m/sec, 388723904 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1423 secs. Pages in use: 253
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1411/3583 254/2000 PermAdmissibility-COL-05-LTLCardinality-08 36840874 m, 23684 m/sec, 390158708 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1428 secs. Pages in use: 254
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1416/3583 254/2000 PermAdmissibility-COL-05-LTLCardinality-08 36952954 m, 22416 m/sec, 391675216 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1433 secs. Pages in use: 254
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1421/3583 255/2000 PermAdmissibility-COL-05-LTLCardinality-08 37089394 m, 27288 m/sec, 392911259 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1438 secs. Pages in use: 255
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1426/3583 256/2000 PermAdmissibility-COL-05-LTLCardinality-08 37229986 m, 28118 m/sec, 394219422 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1443 secs. Pages in use: 256
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1431/3583 257/2000 PermAdmissibility-COL-05-LTLCardinality-08 37358149 m, 25632 m/sec, 395650286 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1448 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1436/3583 258/2000 PermAdmissibility-COL-05-LTLCardinality-08 37480755 m, 24521 m/sec, 397112253 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1453 secs. Pages in use: 258
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1441/3583 259/2000 PermAdmissibility-COL-05-LTLCardinality-08 37594380 m, 22725 m/sec, 398598617 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1458 secs. Pages in use: 259
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1446/3583 260/2000 PermAdmissibility-COL-05-LTLCardinality-08 37730234 m, 27170 m/sec, 399825022 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1463 secs. Pages in use: 260
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1451/3583 261/2000 PermAdmissibility-COL-05-LTLCardinality-08 37866889 m, 27331 m/sec, 401143049 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1468 secs. Pages in use: 261
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1456/3583 262/2000 PermAdmissibility-COL-05-LTLCardinality-08 37998695 m, 26361 m/sec, 402539182 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1473 secs. Pages in use: 262
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1461/3583 262/2000 PermAdmissibility-COL-05-LTLCardinality-08 38119663 m, 24193 m/sec, 404011351 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1478 secs. Pages in use: 262
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-03: F true skeleton: state space / EG[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-05: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-10: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-12: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-15: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PermAdmissibility-COL-05-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 LTL EXCL 1466/3583 263/2000 PermAdmissibility-COL-05-LTLCardinality-08 38234486 m, 22964 m/sec, 405480631 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1483 secs. Pages in use: 263
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPermAdmissibility-COL-05-LTLCardinality-01: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mPermAdmissibility-COL-05-LTLCardinality-02: CONJ false LTL model checker[0m
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-05"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is PermAdmissibility-COL-05, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r269-smll-171654408200123"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-05.tgz
mv PermAdmissibility-COL-05 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;