About the Execution of LoLA for PermAdmissibility-COL-01
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 873.768 | 2012.00 | 5680.00 | 12.60 | FFTFFFTTFTFFTFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r269-smll-171654408200108.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is PermAdmissibility-COL-01, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r269-smll-171654408200108
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 584K
-rw-r--r-- 1 mcc users 9.6K Apr 12 09:14 CTLCardinality.txt
-rw-r--r-- 1 mcc users 111K Apr 12 09:14 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Apr 12 09:12 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Apr 12 09:12 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 23 07:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 23 07:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 12 09:27 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 144K Apr 12 09:27 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.3K Apr 12 09:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 71K Apr 12 09:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 07:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 54K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-00
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-01
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-02
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-03
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-04
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-05
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-06
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-07
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-08
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-09
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-10
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-11
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-12
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-13
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-14
FORMULA_NAME PermAdmissibility-COL-01-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717079385817
FORMULA PermAdmissibility-COL-01-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-COL-01-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-COL-01-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-COL-01-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-COL-01-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-COL-01-LTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-COL-01-LTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-COL-01-LTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-COL-01-LTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-COL-01-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-COL-01-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-COL-01-LTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-COL-01-LTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-COL-01-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-COL-01-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PermAdmissibility-COL-01-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mPermAdmissibility-COL-01-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mPermAdmissibility-COL-01-LTLFireability-01: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m] [1m[32mPermAdmissibility-COL-01-LTLFireability-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m] [1m[31mPermAdmissibility-COL-01-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mPermAdmissibility-COL-01-LTLFireability-04: CONJ false state space[0m
[[35mlola[0m] [1m[31mPermAdmissibility-COL-01-LTLFireability-05: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mPermAdmissibility-COL-01-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m] [1m[32mPermAdmissibility-COL-01-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mPermAdmissibility-COL-01-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mPermAdmissibility-COL-01-LTLFireability-09: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mPermAdmissibility-COL-01-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[31mPermAdmissibility-COL-01-LTLFireability-11: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[32mPermAdmissibility-COL-01-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mPermAdmissibility-COL-01-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m] [1m[31mPermAdmissibility-COL-01-LTLFireability-14: CONJ false findpath[0m
[[35mlola[0m] [1m[32mPermAdmissibility-COL-01-LTLFireability-15: LTL true LTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 2 secs. Pages in use: 2
BK_STOP 1717079387829
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 5 (type SKEL/CNST) for 3 PermAdmissibility-COL-01-LTLFireability-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 72 (type SKEL/CNST) for 58 PermAdmissibility-COL-01-LTLFireability-14
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 5 (type SKEL/CNST) for PermAdmissibility-COL-01-LTLFireability-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 72 (type SKEL/CNST) for PermAdmissibility-COL-01-LTLFireability-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 80 (type SKEL/FNDP) for 58 PermAdmissibility-COL-01-LTLFireability-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 81 (type SKEL/EQUN) for 58 PermAdmissibility-COL-01-LTLFireability-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 82 (type SKEL/SRCH) for 58 PermAdmissibility-COL-01-LTLFireability-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 76 (type SKEL/FNDP) for 12 PermAdmissibility-COL-01-LTLFireability-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 82 (type SKEL/SRCH) for PermAdmissibility-COL-01-LTLFireability-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 80 (type FNDP) for PermAdmissibility-COL-01-LTLFireability-14 (obsolete)
[[35mlola[0m][W] CANCELED task # 81 (type EQUN) for PermAdmissibility-COL-01-LTLFireability-14 (obsolete)
[[35mlola[0m][I] LAUNCH task # 77 (type SKEL/EQUN) for 12 PermAdmissibility-COL-01-LTLFireability-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 78 (type SKEL/SRCH) for 12 PermAdmissibility-COL-01-LTLFireability-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 76 (type SKEL/FNDP) for PermAdmissibility-COL-01-LTLFireability-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 77 (type EQUN) for PermAdmissibility-COL-01-LTLFireability-04 (obsolete)
[[35mlola[0m][W] CANCELED task # 78 (type SRCH) for PermAdmissibility-COL-01-LTLFireability-04 (obsolete)
[[35mlola[0m][I] FINISHED task # 80 (type SKEL/FNDP) for PermAdmissibility-COL-01-LTLFireability-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] Places: 208, Transitions: 1024
[[35mlola[0m][I] FINISHED task # 81 (type SKEL/EQUN) for PermAdmissibility-COL-01-LTLFireability-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 77 (type SKEL/EQUN) for PermAdmissibility-COL-01-LTLFireability-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] Rule S: 432 transitions removed,40 places removed
[[35mlola[0m][I] LAUNCH task # 20 (type EXCL) for 19 PermAdmissibility-COL-01-LTLFireability-05
[[35mlola[0m][I] time limit : 156 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 20 (type EXCL) for PermAdmissibility-COL-01-LTLFireability-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 17
[[35mlola[0m][I] fired transitions : 17
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 86 (type EXCL) for 12 PermAdmissibility-COL-01-LTLFireability-04
[[35mlola[0m][I] time limit : 163 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 84 (type FNDP) for 12 PermAdmissibility-COL-01-LTLFireability-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 85 (type EQUN) for 12 PermAdmissibility-COL-01-LTLFireability-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 86 (type EXCL) for PermAdmissibility-COL-01-LTLFireability-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 84 (type FNDP) for PermAdmissibility-COL-01-LTLFireability-04 (obsolete)
[[35mlola[0m][W] CANCELED task # 85 (type EQUN) for PermAdmissibility-COL-01-LTLFireability-04 (obsolete)
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 PermAdmissibility-COL-01-LTLFireability-09
[[35mlola[0m][I] time limit : 179 sec
[[35mlola[0m][I] memory limit: 2000 pages
[*** LOG ERROR #0001 ***] [2024-05-30 14:29:46] [status_logger] string pointer is null
[[35mlola[0m][I] LAUNCH task # 88 (type FNDP) for 51 PermAdmissibility-COL-01-LTLFireability-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 89 (type EQUN) for 51 PermAdmissibility-COL-01-LTLFireability-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 88 (type FNDP) for PermAdmissibility-COL-01-LTLFireability-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 89 (type EQUN) for PermAdmissibility-COL-01-LTLFireability-13 (obsolete)
[[35mlola[0m][I] FINISHED task # 85 (type EQUN) for PermAdmissibility-COL-01-LTLFireability-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 95 (type EQUN) for 41 PermAdmissibility-COL-01-LTLFireability-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 97 (type FNDP) for 58 PermAdmissibility-COL-01-LTLFireability-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 98 (type EQUN) for 58 PermAdmissibility-COL-01-LTLFireability-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 97 (type FNDP) for PermAdmissibility-COL-01-LTLFireability-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 98 (type EQUN) for PermAdmissibility-COL-01-LTLFireability-14 (obsolete)
[[35mlola[0m][I] FINISHED task # 98 (type EQUN) for PermAdmissibility-COL-01-LTLFireability-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 84 (type FNDP) for PermAdmissibility-COL-01-LTLFireability-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] findlow criterion satisfied
[[35mlola[0m][I] Time for checking findlow: 1
[[35mlola[0m][I] LAUNCH task # 104 (type SKEL/SRCH) for 6 PermAdmissibility-COL-01-LTLFireability-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 107 (type SKEL/EQUN) for 41 PermAdmissibility-COL-01-LTLFireability-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 104 (type SKEL/SRCH) for PermAdmissibility-COL-01-LTLFireability-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 18
[[35mlola[0m][I] fired transitions : 19
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 103 (type SKEL/SRCH) for 41 PermAdmissibility-COL-01-LTLFireability-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 103 (type SKEL/SRCH) for PermAdmissibility-COL-01-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 95 (type EQUN) for PermAdmissibility-COL-01-LTLFireability-11 (obsolete)
[[35mlola[0m][W] CANCELED task # 107 (type EQUN) for PermAdmissibility-COL-01-LTLFireability-11 (obsolete)
[[35mlola[0m][I] FINISHED task # 107 (type SKEL/EQUN) for PermAdmissibility-COL-01-LTLFireability-11
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 32 (type EXCL) for PermAdmissibility-COL-01-LTLFireability-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 88771
[[35mlola[0m][I] fired transitions : 225850
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 70 (type EXCL) for 69 PermAdmissibility-COL-01-LTLFireability-15
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 70 (type EXCL) for PermAdmissibility-COL-01-LTLFireability-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 9894
[[35mlola[0m][I] fired transitions : 17889
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 48 PermAdmissibility-COL-01-LTLFireability-12
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 49 (type EXCL) for PermAdmissibility-COL-01-LTLFireability-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 24945
[[35mlola[0m][I] fired transitions : 116772
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 44 (type EXCL) for 41 PermAdmissibility-COL-01-LTLFireability-11
[[35mlola[0m][I] time limit : 449 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 44 (type EXCL) for PermAdmissibility-COL-01-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 17
[[35mlola[0m][I] fired transitions : 17
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 PermAdmissibility-COL-01-LTLFireability-08
[[35mlola[0m][I] time limit : 514 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for PermAdmissibility-COL-01-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 19
[[35mlola[0m][I] fired transitions : 19
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 PermAdmissibility-COL-01-LTLFireability-07
[[35mlola[0m][I] time limit : 599 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 26 (type EXCL) for PermAdmissibility-COL-01-LTLFireability-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 PermAdmissibility-COL-01-LTLFireability-06
[[35mlola[0m][I] time limit : 719 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for PermAdmissibility-COL-01-LTLFireability-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 105
[[35mlola[0m][I] fired transitions : 104
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 PermAdmissibility-COL-01-LTLFireability-03
[[35mlola[0m][I] time limit : 899 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for PermAdmissibility-COL-01-LTLFireability-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 17
[[35mlola[0m][I] fired transitions : 17
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 PermAdmissibility-COL-01-LTLFireability-00
[[35mlola[0m][I] time limit : 1199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for PermAdmissibility-COL-01-LTLFireability-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 17
[[35mlola[0m][I] fired transitions : 17
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 34 PermAdmissibility-COL-01-LTLFireability-10
[[35mlola[0m][I] time limit : 1799 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for PermAdmissibility-COL-01-LTLFireability-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1467
[[35mlola[0m][I] fired transitions : 1589
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-01"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is PermAdmissibility-COL-01, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r269-smll-171654408200108"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-01.tgz
mv PermAdmissibility-COL-01 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;