About the Execution of LoLA for ParamProductionCell-PT-4
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 948.516 | 50239.00 | 51843.00 | 308.50 | FFFTFFFFTFTFFTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r269-smll-171654408000044.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is ParamProductionCell-PT-4, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r269-smll-171654408000044
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 684K
-rw-r--r-- 1 mcc users 8.9K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 84K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Apr 23 07:41 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 23 07:41 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 23 07:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 23 07:41 LTLFireability.xml
-rw-r--r-- 1 mcc users 18K Apr 12 20:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 161K Apr 12 20:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.4K Apr 12 20:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 55K Apr 12 20:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 23 07:41 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:41 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 2 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 174K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-00
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-01
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-02
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-03
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-04
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-05
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-06
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-07
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-08
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-09
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-10
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-11
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-12
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-13
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-14
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717054617324
FORMULA ParamProductionCell-PT-4-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-4-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-4-LTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-4-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-4-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-4-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-4-LTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-4-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-4-LTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-4-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-4-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-4-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-4-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-4-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-4-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-4-LTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mParamProductionCell-PT-4-LTLFireability-00: CONJ false state space[0m
[[35mlola[0m] [1m[31mParamProductionCell-PT-4-LTLFireability-01: LTL false LTL model checker[0m
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[[35mlola[0m] [1m[31mParamProductionCell-PT-4-LTLFireability-04: CONJ false preprocessing[0m
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[[35mlola[0m] [1m[31mParamProductionCell-PT-4-LTLFireability-15: CONJ false LTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 50 secs. Pages in use: 34
BK_STOP 1717054667563
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 19 (type CNST) for 16 ParamProductionCell-PT-4-LTLFireability-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 79 (type EXCL) for 0 ParamProductionCell-PT-4-LTLFireability-00
[[35mlola[0m][I] time limit : 138 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 77 (type FNDP) for 0 ParamProductionCell-PT-4-LTLFireability-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 78 (type EQUN) for 0 ParamProductionCell-PT-4-LTLFireability-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 19 (type CNST) for ParamProductionCell-PT-4-LTLFireability-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 79 (type EXCL) for ParamProductionCell-PT-4-LTLFireability-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 58
[[35mlola[0m][I] fired transitions : 57
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 77 (type FNDP) for ParamProductionCell-PT-4-LTLFireability-00 (obsolete)
[[35mlola[0m][W] CANCELED task # 78 (type EQUN) for ParamProductionCell-PT-4-LTLFireability-00 (obsolete)
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 ParamProductionCell-PT-4-LTLFireability-10
[[35mlola[0m][I] time limit : 171 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 77 (type FNDP) for ParamProductionCell-PT-4-LTLFireability-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 78 (type EQUN) for ParamProductionCell-PT-4-LTLFireability-00
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mParamProductionCell-PT-4-LTLFireability-00: CONJ false state space[0m
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[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-14: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-15: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 5/199 7/2000 ParamProductionCell-PT-4-LTLFireability-10 905063 m, 181012 m/sec, 3389438 t fired, .
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[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-14: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-15: CONJ 0 3 0 0 3 0 0 0
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[[35mlola[0m][.] 43 LTL EXCL 10/199 13/2000 ParamProductionCell-PT-4-LTLFireability-10 1835339 m, 186055 m/sec, 7138773 t fired, .
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[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-14: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] ParamProductionCell-PT-4-LTLFireability-15: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 15/199 19/2000 ParamProductionCell-PT-4-LTLFireability-10 2658716 m, 164675 m/sec, 10791023 t fired, .
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[[35mlola[0m][.] 43 LTL EXCL 20/199 23/2000 ParamProductionCell-PT-4-LTLFireability-10 3250306 m, 118318 m/sec, 14522789 t fired, .
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[[35mlola[0m][.] 43 LTL EXCL 25/199 26/2000 ParamProductionCell-PT-4-LTLFireability-10 3789084 m, 107755 m/sec, 18345469 t fired, .
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[[35mlola[0m][.] 43 LTL EXCL 30/199 29/2000 ParamProductionCell-PT-4-LTLFireability-10 4304380 m, 103059 m/sec, 22273417 t fired, .
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[[35mlola[0m][.] 43 LTL EXCL 35/199 33/2000 ParamProductionCell-PT-4-LTLFireability-10 4795555 m, 98235 m/sec, 26303603 t fired, .
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[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 5010900
[[35mlola[0m][I] fired transitions : 29886119
[[35mlola[0m][I] time used : 39
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[[35mlola[0m][I] LAUNCH task # 72 (type EXCL) for 65 ParamProductionCell-PT-4-LTLFireability-15
[[35mlola[0m][I] time limit : 209 sec
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[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 ParamProductionCell-PT-4-LTLFireability-11
[[35mlola[0m][I] time limit : 323 sec
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[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 ParamProductionCell-PT-4-LTLFireability-08
[[35mlola[0m][I] time limit : 356 sec
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[[35mlola[0m][.] 37 LTL EXCL 1/356 1/2000 ParamProductionCell-PT-4-LTLFireability-08 61542 m, 12308 m/sec, 121989 t fired, .
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[[35mlola[0m][.] 37 LTL EXCL 6/356 8/2000 ParamProductionCell-PT-4-LTLFireability-08 1081998 m, 204091 m/sec, 4106275 t fired, .
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[[35mlola[0m][I] LAUNCH task # 28 (type EXCL) for 27 ParamProductionCell-PT-4-LTLFireability-05
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[[35mlola[0m][I] FINISHED task # 28 (type EXCL) for ParamProductionCell-PT-4-LTLFireability-05
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[[35mlola[0m][I] markings : 50432
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[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] time limit : 591 sec
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[[35mlola[0m][I] FINISHED task # 8 (type EXCL) for ParamProductionCell-PT-4-LTLFireability-01
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[[35mlola[0m][I] time limit : 1183 sec
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[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 16656
[[35mlola[0m][I] fired transitions : 21062
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 48 ParamProductionCell-PT-4-LTLFireability-12
[[35mlola[0m][I] time limit : 1775 sec
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[[35mlola[0m][I] FINISHED task # 49 (type EXCL) for ParamProductionCell-PT-4-LTLFireability-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 273
[[35mlola[0m][I] fired transitions : 273
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 51 ParamProductionCell-PT-4-LTLFireability-13
[[35mlola[0m][I] time limit : 3551 sec
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[[35mlola[0m][I] FINISHED task # 52 (type EXCL) for ParamProductionCell-PT-4-LTLFireability-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 127678
[[35mlola[0m][I] fired transitions : 282470
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-4"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is ParamProductionCell-PT-4, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r269-smll-171654408000044"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-4.tgz
mv ParamProductionCell-PT-4 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;