Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r269-smll-171654408000026.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is ParamProductionCell-PT-2, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r269-smll-171654408000026
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 776K
-rw-r--r-- 1 mcc users 11K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 99K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.6K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Apr 23 07:41 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Apr 23 07:41 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Apr 23 07:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Apr 23 07:41 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Apr 12 20:28 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 152K Apr 12 20:28 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 19K Apr 12 20:27 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 133K Apr 12 20:27 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:41 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:41 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 2 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 174K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2024-00
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2024-01
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2024-02
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2024-03
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2024-04
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2024-05
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2024-06
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2024-07
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2024-08
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2024-09
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2024-10
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2024-11
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2023-12
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2023-13
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2023-14
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717053478846

FORMULA ParamProductionCell-PT-2-CTLFireability-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-2-CTLFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-2-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-2-CTLFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-2-CTLFireability-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-2-CTLFireability-2023-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-2-CTLFireability-2023-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-2-CTLFireability-2023-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-2-CTLFireability-2023-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-2-CTLFireability-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-2-CTLFireability-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-2-CTLFireability-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-2-CTLFireability-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-2-CTLFireability-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-2-CTLFireability-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-2-CTLFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[lola] FINAL RESULTS
[lola]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola] ParamProductionCell-PT-2-CTLFireability-2024-00: CTL true CTL model checker
[lola] ParamProductionCell-PT-2-CTLFireability-2024-01: CTL true CTL model checker
[lola] ParamProductionCell-PT-2-CTLFireability-2024-02: CTL false CTL model checker
[lola] ParamProductionCell-PT-2-CTLFireability-2024-03: CONJ false CTL model checker
[lola] ParamProductionCell-PT-2-CTLFireability-2024-04: AFAG false CTL model checker
[lola] ParamProductionCell-PT-2-CTLFireability-2024-05: CTL true CTL model checker
[lola] ParamProductionCell-PT-2-CTLFireability-2024-06: CTL false CTL model checker
[lola] ParamProductionCell-PT-2-CTLFireability-2024-07: CTL true CTL model checker
[lola] ParamProductionCell-PT-2-CTLFireability-2024-08: DISJ true findpath
[lola] ParamProductionCell-PT-2-CTLFireability-2024-09: EXEU false state space / EXEU
[lola] ParamProductionCell-PT-2-CTLFireability-2024-10: CTL false CTL model checker
[lola] ParamProductionCell-PT-2-CTLFireability-2024-11: AG false findpath
[lola] ParamProductionCell-PT-2-CTLFireability-2023-12: CTL false CTL model checker
[lola] ParamProductionCell-PT-2-CTLFireability-2023-13: CTL true CTL model checker
[lola] ParamProductionCell-PT-2-CTLFireability-2023-14: CTL false CTL model checker
[lola] ParamProductionCell-PT-2-CTLFireability-2023-15: CTL true CTL model checker
[lola]
[lola] Time elapsed: 39 secs. Pages in use: 2

BK_STOP 1717053517914

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from CTLFireability.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 14 (type EXCL) for 9 ParamProductionCell-PT-2-CTLFireability-2024-03
[lola][I] time limit : 115 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 14 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-2024-03
[lola][I] result : true
[lola][I] markings : 238
[lola][I] fired transitions : 476
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 7 (type EXCL) for 6 ParamProductionCell-PT-2-CTLFireability-2024-02
[lola][I] time limit : 127 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 7 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-2024-02
[lola][I] result : false
[lola][I] markings : 375
[lola][I] fired transitions : 421
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 34 (type EXCL) for 33 ParamProductionCell-PT-2-CTLFireability-2024-07
[lola][I] time limit : 132 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 71 (type EQUN) for 36 ParamProductionCell-PT-2-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 73 (type EQUN) for 36 ParamProductionCell-PT-2-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 74 (type FNDP) for 36 ParamProductionCell-PT-2-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 74 (type FNDP) for ParamProductionCell-PT-2-CTLFireability-2024-08
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 71 (type EQUN) for ParamProductionCell-PT-2-CTLFireability-2024-08 (obsolete)
[lola][W] CANCELED task # 73 (type EQUN) for ParamProductionCell-PT-2-CTLFireability-2024-08 (obsolete)
[lola][I] LAUNCH task # 79 (type EQUN) for 43 ParamProductionCell-PT-2-CTLFireability-2024-09
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 81 (type FNDP) for 49 ParamProductionCell-PT-2-CTLFireability-2024-11
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 82 (type EQUN) for 49 ParamProductionCell-PT-2-CTLFireability-2024-11
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 81 (type FNDP) for ParamProductionCell-PT-2-CTLFireability-2024-11
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 82 (type EQUN) for ParamProductionCell-PT-2-CTLFireability-2024-11 (obsolete)
[lola][I] FINISHED task # 71 (type EQUN) for ParamProductionCell-PT-2-CTLFireability-2024-08
[lola][I] result : unknown
[lola][I] FINISHED task # 34 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-2024-07
[lola][I] result : true
[lola][I] markings : 221192
[lola][I] fired transitions : 1247454
[lola][I] time used : 2
[lola][I] memory pages used : 2
[lola][I] LAUNCH task # 77 (type EXCL) for 43 ParamProductionCell-PT-2-CTLFireability-2024-09
[lola][I] time limit : 297 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 77 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-2024-09
[lola][I] result : false
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 79 (type EQUN) for ParamProductionCell-PT-2-CTLFireability-2024-09 (obsolete)
[lola][I] LAUNCH task # 62 (type EXCL) for 61 ParamProductionCell-PT-2-CTLFireability-2023-15
[lola][I] time limit : 324 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 62 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-2023-15
[lola][I] result : true
[lola][I] markings : 349874
[lola][I] fired transitions : 1944530
[lola][I] time used : 3
[lola][I] memory pages used : 2
[lola][I] LAUNCH task # 59 (type EXCL) for 58 ParamProductionCell-PT-2-CTLFireability-2023-14
[lola][I] time limit : 356 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 59 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-2023-14
[lola][I] result : false
[lola][I] markings : 374
[lola][I] fired transitions : 956
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 56 (type EXCL) for 55 ParamProductionCell-PT-2-CTLFireability-2023-13
[lola][I] time limit : 396 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-07: CTL true CTL model checker
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-08: DISJ true findpath
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-09: EXEU false state space / EXEU
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-11: AG false findpath
[lola][.] ParamProductionCell-PT-2-CTLFireability-2023-14: CTL false CTL model checker
[lola][.] ParamProductionCell-PT-2-CTLFireability-2023-15: CTL true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-03: CONJ 0 1 0 0 5 0 0 3
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-04: AFAG 0 1 0 0 1 0 0 0
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] ParamProductionCell-PT-2-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] ParamProductionCell-PT-2-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 56 CTL EXCL 0/396 1/2000 ParamProductionCell-PT-2-CTLFireability-2023-13 14575 m, 2915 m/sec, 37579 t fired, .
[lola][.]
[lola][.] Time elapsed: 33 secs. Pages in use: 2
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] FINISHED task # 73 (type EQUN) for ParamProductionCell-PT-2-CTLFireability-2024-08
[lola][I] result : unknown
[lola][I] FINISHED task # 56 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-2023-13
[lola][I] result : true
[lola][I] markings : 295265
[lola][I] fired transitions : 1357748
[lola][I] time used : 2
[lola][I] memory pages used : 2
[lola][I] LAUNCH task # 53 (type EXCL) for 52 ParamProductionCell-PT-2-CTLFireability-2023-12
[lola][I] time limit : 445 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 53 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-2023-12
[lola][I] result : false
[lola][I] markings : 776
[lola][I] fired transitions : 1948
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 47 (type EXCL) for 46 ParamProductionCell-PT-2-CTLFireability-2024-10
[lola][I] time limit : 509 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-07: CTL true CTL model checker
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-08: DISJ true findpath
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-09: EXEU false state space / EXEU
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-11: AG false findpath
[lola][.] ParamProductionCell-PT-2-CTLFireability-2023-12: CTL false CTL model checker
[lola][.] ParamProductionCell-PT-2-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] ParamProductionCell-PT-2-CTLFireability-2023-14: CTL false CTL model checker
[lola][.] ParamProductionCell-PT-2-CTLFireability-2023-15: CTL true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-03: CONJ 0 1 0 0 5 0 0 3
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-04: AFAG 0 1 0 0 1 0 0 0
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] ParamProductionCell-PT-2-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 47 CTL EXCL 3/509 2/2000 ParamProductionCell-PT-2-CTLFireability-2024-10 344001 m, 68800 m/sec, 2439321 t fired, .
[lola][.]
[lola][.] Time elapsed: 38 secs. Pages in use: 2
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] FINISHED task # 47 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-2024-10
[lola][I] result : false
[lola][I] markings : 349874
[lola][I] fired transitions : 2987273
[lola][I] time used : 4
[lola][I] memory pages used : 2
[lola][I] LAUNCH task # 22 (type EXCL) for 9 ParamProductionCell-PT-2-CTLFireability-2024-03
[lola][I] time limit : 593 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 22 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-2024-03
[lola][I] result : false
[lola][I] markings : 1046
[lola][I] fired transitions : 1666
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 4 (type EXCL) for 3 ParamProductionCell-PT-2-CTLFireability-2024-01
[lola][I] time limit : 712 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 4 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-2024-01
[lola][I] result : true
[lola][I] markings : 1025
[lola][I] fired transitions : 2181
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 25 (type EXCL) for 24 ParamProductionCell-PT-2-CTLFireability-2024-04
[lola][I] time limit : 890 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 25 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-2024-04
[lola][I] result : false
[lola][I] markings : 335
[lola][I] fired transitions : 676
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 1 (type EXCL) for 0 ParamProductionCell-PT-2-CTLFireability-2024-00
[lola][I] time limit : 1187 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 1 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-2024-00
[lola][I] result : true
[lola][I] markings : 12692
[lola][I] fired transitions : 45105
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 31 (type EXCL) for 30 ParamProductionCell-PT-2-CTLFireability-2024-06
[lola][I] time limit : 1780 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 31 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-2024-06
[lola][I] result : false
[lola][I] markings : 154
[lola][I] fired transitions : 153
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 28 (type EXCL) for 27 ParamProductionCell-PT-2-CTLFireability-2024-05
[lola][I] time limit : 3561 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 28 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-2024-05
[lola][I] result : true
[lola][I] markings : 83565
[lola][I] fired transitions : 487543
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] Portfolio finished: no open formulas

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-2"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is ParamProductionCell-PT-2, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r269-smll-171654408000026"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-2.tgz
mv ParamProductionCell-PT-2 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;