Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r269-smll-171654407900011.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is ParamProductionCell-PT-0, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r269-smll-171654407900011
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 580K
-rw-r--r-- 1 mcc users 7.6K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.7K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Apr 23 07:41 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 23 07:41 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Apr 23 07:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 23 07:41 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 12 20:33 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 113K Apr 12 20:33 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Apr 12 20:32 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 53K Apr 12 20:32 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 23 07:41 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:41 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 2 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 149K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-00
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-01
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-02
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-03
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-04
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-05
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-06
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-07
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-08
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-09
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-10
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-11
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-12
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-13
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-14
FORMULA_NAME ParamProductionCell-PT-0-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1717051589031

FORMULA ParamProductionCell-PT-0-LTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-LTLCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-LTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-LTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-LTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-LTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-LTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-LTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-LTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-LTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-LTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-LTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-LTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-LTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-LTLCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-LTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[lola] FINAL RESULTS
[lola]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola] ParamProductionCell-PT-0-LTLCardinality-00: LTL false LTL model checker
[lola] ParamProductionCell-PT-0-LTLCardinality-01: AG false findpath
[lola] ParamProductionCell-PT-0-LTLCardinality-02: LTL true LTL model checker
[lola] ParamProductionCell-PT-0-LTLCardinality-03: LTL true LTL model checker
[lola] ParamProductionCell-PT-0-LTLCardinality-04: CONJ false LTL model checker
[lola] ParamProductionCell-PT-0-LTLCardinality-05: LTL true LTL model checker
[lola] ParamProductionCell-PT-0-LTLCardinality-06: LTL true LTL model checker
[lola] ParamProductionCell-PT-0-LTLCardinality-07: CONJ false LTL model checker
[lola] ParamProductionCell-PT-0-LTLCardinality-08: CONJ false LTL model checker
[lola] ParamProductionCell-PT-0-LTLCardinality-09: LTL false LTL model checker
[lola] ParamProductionCell-PT-0-LTLCardinality-10: LTL true LTL model checker
[lola] ParamProductionCell-PT-0-LTLCardinality-11: INITIAL true preprocessing
[lola] ParamProductionCell-PT-0-LTLCardinality-12: AG false findpath
[lola] ParamProductionCell-PT-0-LTLCardinality-13: LTL/CTL true LTL model checker
[lola] ParamProductionCell-PT-0-LTLCardinality-14: INITIAL true preprocessing
[lola] ParamProductionCell-PT-0-LTLCardinality-15: LTL true LTL model checker
[lola]
[lola] Time elapsed: 41 secs. Pages in use: 1

BK_STOP 1717051630515

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from LTLCardinality.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 39 (type CNST) for 36 ParamProductionCell-PT-0-LTLCardinality-08
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 15 (type CNST) for 12 ParamProductionCell-PT-0-LTLCardinality-04
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 39 (type CNST) for ParamProductionCell-PT-0-LTLCardinality-08
[lola][I] result : true
[lola][I] FINISHED task # 15 (type CNST) for ParamProductionCell-PT-0-LTLCardinality-04
[lola][I] result : true
[lola][I] LAUNCH task # 54 (type CNST) for 53 ParamProductionCell-PT-0-LTLCardinality-11
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 63 (type CNST) for 62 ParamProductionCell-PT-0-LTLCardinality-14
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 63 (type CNST) for ParamProductionCell-PT-0-LTLCardinality-14
[lola][I] result : true
[lola][I] LAUNCH task # 1 (type EXCL) for 0 ParamProductionCell-PT-0-LTLCardinality-00
[lola][I] time limit : 169 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 54 (type CNST) for ParamProductionCell-PT-0-LTLCardinality-11
[lola][I] result : true
[lola][I] FINISHED task # 1 (type EXCL) for ParamProductionCell-PT-0-LTLCardinality-00
[lola][I] result : false
[lola][I] markings : 431
[lola][I] fired transitions : 432
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 43 (type EXCL) for 36 ParamProductionCell-PT-0-LTLCardinality-08
[lola][I] time limit : 197 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 43 (type EXCL) for ParamProductionCell-PT-0-LTLCardinality-08
[lola][I] result : false
[lola][I] markings : 430
[lola][I] fired transitions : 430
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 60 (type EXCL) for 59 ParamProductionCell-PT-0-LTLCardinality-13
[lola][I] time limit : 237 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 69 (type FNDP) for 56 ParamProductionCell-PT-0-LTLCardinality-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 70 (type EQUN) for 56 ParamProductionCell-PT-0-LTLCardinality-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 60 (type EXCL) for ParamProductionCell-PT-0-LTLCardinality-13
[lola][I] result : true
[lola][I] markings : 2
[lola][I] fired transitions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 66 (type EXCL) for 65 ParamProductionCell-PT-0-LTLCardinality-15
[lola][I] time limit : 273 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 73 (type FNDP) for 3 ParamProductionCell-PT-0-LTLCardinality-01
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 69 (type FNDP) for ParamProductionCell-PT-0-LTLCardinality-12
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] FINISHED task # 73 (type FNDP) for ParamProductionCell-PT-0-LTLCardinality-01
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 70 (type EQUN) for ParamProductionCell-PT-0-LTLCardinality-12 (obsolete)
[lola][I] FINISHED task # 66 (type EXCL) for ParamProductionCell-PT-0-LTLCardinality-15
[lola][I] result : true
[lola][I] markings : 2373
[lola][I] fired transitions : 6303
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 34 (type EXCL) for 29 ParamProductionCell-PT-0-LTLCardinality-07
[lola][I] time limit : 355 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 34 (type EXCL) for ParamProductionCell-PT-0-LTLCardinality-07
[lola][I] result : false
[lola][I] markings : 430
[lola][I] fired transitions : 430
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 21 (type EXCL) for 12 ParamProductionCell-PT-0-LTLCardinality-04
[lola][I] time limit : 444 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 21 (type EXCL) for ParamProductionCell-PT-0-LTLCardinality-04
[lola][I] result : false
[lola][I] markings : 430
[lola][I] fired transitions : 430
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 10 (type EXCL) for 9 ParamProductionCell-PT-0-LTLCardinality-03
[lola][I] time limit : 593 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 10 (type EXCL) for ParamProductionCell-PT-0-LTLCardinality-03
[lola][I] result : true
[lola][I] markings : 2
[lola][I] fired transitions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 7 (type EXCL) for 6 ParamProductionCell-PT-0-LTLCardinality-02
[lola][I] time limit : 711 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 7 (type EXCL) for ParamProductionCell-PT-0-LTLCardinality-02
[lola][I] result : true
[lola][I] markings : 2
[lola][I] fired transitions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 48 (type EXCL) for 47 ParamProductionCell-PT-0-LTLCardinality-09
[lola][I] time limit : 889 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 48 (type EXCL) for ParamProductionCell-PT-0-LTLCardinality-09
[lola][I] result : false
[lola][I] markings : 184
[lola][I] fired transitions : 185
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 27 (type EXCL) for 26 ParamProductionCell-PT-0-LTLCardinality-06
[lola][I] time limit : 1186 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 27 (type EXCL) for ParamProductionCell-PT-0-LTLCardinality-06
[lola][I] result : true
[lola][I] markings : 2081
[lola][I] fired transitions : 2448
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 24 (type EXCL) for 23 ParamProductionCell-PT-0-LTLCardinality-05
[lola][I] time limit : 1779 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 24 (type EXCL) for ParamProductionCell-PT-0-LTLCardinality-05
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 51 (type EXCL) for 50 ParamProductionCell-PT-0-LTLCardinality-10
[lola][I] time limit : 3559 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 51 (type EXCL) for ParamProductionCell-PT-0-LTLCardinality-10
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] Portfolio finished: no open formulas

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-0"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is ParamProductionCell-PT-0, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r269-smll-171654407900011"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-0.tgz
mv ParamProductionCell-PT-0 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;