About the Execution of LoLA for PGCD-PT-D04N025
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16193.088 | 322179.00 | 314231.00 | 1117.20 | [undef] | Cannot compute |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r247-tall-171654354100770.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is PGCD-PT-D04N025, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r247-tall-171654354100770
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 412K
-rw-r--r-- 1 mcc users 7.5K Apr 11 15:35 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K Apr 11 15:35 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Apr 11 15:26 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Apr 11 15:26 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 6 10:02 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 6 10:02 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 6 10:02 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 6 10:02 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.7K Apr 11 15:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 98K Apr 11 15:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.8K Apr 11 15:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 57K Apr 11 15:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 6 10:02 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 6 10:02 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 9.3K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-00
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-01
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-02
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-03
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-04
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-05
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-06
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-07
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-08
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-09
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-10
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-11
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-12
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-13
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-14
FORMULA_NAME PGCD-PT-D04N025-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717104095877
BK_STOP 1717104418056
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 38 PGCD-PT-D04N025-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 149 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 41 (type EXCL) for PGCD-PT-D04N025-CTLFireability-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 PGCD-PT-D04N025-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 63 (type EQUN) for 45 PGCD-PT-D04N025-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 65 (type EQUN) for 45 PGCD-PT-D04N025-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 69 (type EQUN) for 51 PGCD-PT-D04N025-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 65 (type EQUN) for PGCD-PT-D04N025-CTLFireability-2024-11
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 75 (type EQUN) for 27 PGCD-PT-D04N025-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 63 (type EQUN) for PGCD-PT-D04N025-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 71 (type EQUN) for 51 PGCD-PT-D04N025-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 71 (type EQUN) for PGCD-PT-D04N025-CTLFireability-2024-13
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 75 (type EQUN) for PGCD-PT-D04N025-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 69 (type EQUN) for PGCD-PT-D04N025-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 5/199 12/2000 PGCD-PT-D04N025-CTLFireability-2024-01 2724678 m, 544935 m/sec, 9891522 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 10/199 14/2000 PGCD-PT-D04N025-CTLFireability-2024-01 3161494 m, 87363 m/sec, 20465940 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 15/199 20/2000 PGCD-PT-D04N025-CTLFireability-2024-01 4693248 m, 306350 m/sec, 29687874 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 16 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 20/199 28/2000 PGCD-PT-D04N025-CTLFireability-2024-01 6537723 m, 368895 m/sec, 37781558 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 21 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 25/199 36/2000 PGCD-PT-D04N025-CTLFireability-2024-01 8334537 m, 359362 m/sec, 45755854 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 26 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 30/199 43/2000 PGCD-PT-D04N025-CTLFireability-2024-01 9996475 m, 332387 m/sec, 53391983 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 31 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 35/199 50/2000 PGCD-PT-D04N025-CTLFireability-2024-01 11702580 m, 341221 m/sec, 61172408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 36 secs. Pages in use: 50
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 40/199 57/2000 PGCD-PT-D04N025-CTLFireability-2024-01 13415472 m, 342578 m/sec, 68881941 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 41 secs. Pages in use: 57
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 45/199 64/2000 PGCD-PT-D04N025-CTLFireability-2024-01 15031949 m, 323295 m/sec, 76476298 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 46 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 50/199 70/2000 PGCD-PT-D04N025-CTLFireability-2024-01 16621194 m, 317849 m/sec, 84116733 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 51 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 55/199 77/2000 PGCD-PT-D04N025-CTLFireability-2024-01 18246116 m, 324984 m/sec, 91677681 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 56 secs. Pages in use: 77
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 60/199 84/2000 PGCD-PT-D04N025-CTLFireability-2024-01 19874923 m, 325761 m/sec, 99401341 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 61 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 65/199 90/2000 PGCD-PT-D04N025-CTLFireability-2024-01 21428019 m, 310619 m/sec, 106704752 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 66 secs. Pages in use: 90
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 70/199 97/2000 PGCD-PT-D04N025-CTLFireability-2024-01 23044333 m, 323262 m/sec, 114013726 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 71 secs. Pages in use: 97
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 75/199 104/2000 PGCD-PT-D04N025-CTLFireability-2024-01 24552331 m, 301599 m/sec, 121125980 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 76 secs. Pages in use: 104
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 80/199 110/2000 PGCD-PT-D04N025-CTLFireability-2024-01 26101363 m, 309806 m/sec, 128702841 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 81 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 85/199 117/2000 PGCD-PT-D04N025-CTLFireability-2024-01 27671037 m, 313934 m/sec, 135960047 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 86 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 90/199 123/2000 PGCD-PT-D04N025-CTLFireability-2024-01 29205194 m, 306831 m/sec, 143170038 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 91 secs. Pages in use: 123
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 95/199 130/2000 PGCD-PT-D04N025-CTLFireability-2024-01 30776794 m, 314320 m/sec, 150531305 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 96 secs. Pages in use: 130
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 100/199 136/2000 PGCD-PT-D04N025-CTLFireability-2024-01 32271293 m, 298899 m/sec, 157575832 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 101 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 105/199 142/2000 PGCD-PT-D04N025-CTLFireability-2024-01 33772034 m, 300148 m/sec, 164683200 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 106 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 110/199 148/2000 PGCD-PT-D04N025-CTLFireability-2024-01 35218875 m, 289368 m/sec, 171822029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 111 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 115/199 154/2000 PGCD-PT-D04N025-CTLFireability-2024-01 36659822 m, 288189 m/sec, 179005135 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 116 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 120/199 161/2000 PGCD-PT-D04N025-CTLFireability-2024-01 38150799 m, 298195 m/sec, 186140357 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 121 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 125/199 167/2000 PGCD-PT-D04N025-CTLFireability-2024-01 39592807 m, 288401 m/sec, 193437776 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 126 secs. Pages in use: 167
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 130/199 173/2000 PGCD-PT-D04N025-CTLFireability-2024-01 41115452 m, 304529 m/sec, 200755284 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 131 secs. Pages in use: 173
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 135/199 179/2000 PGCD-PT-D04N025-CTLFireability-2024-01 42639509 m, 304811 m/sec, 207983021 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 136 secs. Pages in use: 179
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 140/199 186/2000 PGCD-PT-D04N025-CTLFireability-2024-01 44090034 m, 290105 m/sec, 215029562 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 141 secs. Pages in use: 186
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 145/199 191/2000 PGCD-PT-D04N025-CTLFireability-2024-01 45489021 m, 279797 m/sec, 221788835 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 146 secs. Pages in use: 191
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 150/199 198/2000 PGCD-PT-D04N025-CTLFireability-2024-01 46940885 m, 290372 m/sec, 228968052 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 151 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 155/199 204/2000 PGCD-PT-D04N025-CTLFireability-2024-01 48484333 m, 308689 m/sec, 236326036 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 156 secs. Pages in use: 204
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 160/199 210/2000 PGCD-PT-D04N025-CTLFireability-2024-01 49937625 m, 290658 m/sec, 243647801 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 161 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 165/199 216/2000 PGCD-PT-D04N025-CTLFireability-2024-01 51405184 m, 293511 m/sec, 250620278 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 166 secs. Pages in use: 216
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 170/199 222/2000 PGCD-PT-D04N025-CTLFireability-2024-01 52811739 m, 281311 m/sec, 257532043 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 171 secs. Pages in use: 222
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 175/199 228/2000 PGCD-PT-D04N025-CTLFireability-2024-01 54196896 m, 277031 m/sec, 264629232 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 176 secs. Pages in use: 228
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 180/199 234/2000 PGCD-PT-D04N025-CTLFireability-2024-01 55593851 m, 279391 m/sec, 271686609 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 181 secs. Pages in use: 234
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 185/199 240/2000 PGCD-PT-D04N025-CTLFireability-2024-01 56960555 m, 273340 m/sec, 278677731 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 186 secs. Pages in use: 240
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 190/199 245/2000 PGCD-PT-D04N025-CTLFireability-2024-01 58248916 m, 257672 m/sec, 285726478 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 191 secs. Pages in use: 245
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 195/199 251/2000 PGCD-PT-D04N025-CTLFireability-2024-01 59680113 m, 286239 m/sec, 292853570 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 196 secs. Pages in use: 251
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 4 (type EXCL) for PGCD-PT-D04N025-CTLFireability-2024-01 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 201 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 58 (type EXCL) for 57 PGCD-PT-D04N025-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 PGCD-PT-D04N025-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 3399 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 58 (type EXCL) for PGCD-PT-D04N025-CTLFireability-2024-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] CANCELED task # 4 (type EXCL) for PGCD-PT-D04N025-CTLFireability-2024-01 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 206 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 54 PGCD-PT-D04N025-CTLFireability-2024-14
[[35mlola[0m][I] time limit : 212 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 5/212 10/2000 PGCD-PT-D04N025-CTLFireability-2024-14 2265005 m, 453001 m/sec, 9203053 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 211 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 55 (type EXCL) for PGCD-PT-D04N025-CTLFireability-2024-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3622277
[[35mlola[0m][I] fired transitions : 15153425
[[35mlola[0m][I] time used : 8
[[35mlola[0m][I] memory pages used : 16
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 48 PGCD-PT-D04N025-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 225 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 2/225 3/2000 PGCD-PT-D04N025-CTLFireability-2024-12 603393 m, 120678 m/sec, 2409790 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 216 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 7/225 13/2000 PGCD-PT-D04N025-CTLFireability-2024-12 2899169 m, 459155 m/sec, 11871119 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 221 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 12/225 22/2000 PGCD-PT-D04N025-CTLFireability-2024-12 5142115 m, 448589 m/sec, 20069245 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 226 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 17/225 31/2000 PGCD-PT-D04N025-CTLFireability-2024-12 7254566 m, 422490 m/sec, 27690523 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 231 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 22/225 39/2000 PGCD-PT-D04N025-CTLFireability-2024-12 9220358 m, 393158 m/sec, 34937466 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 236 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 27/225 47/2000 PGCD-PT-D04N025-CTLFireability-2024-12 11117643 m, 379457 m/sec, 42031911 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 241 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 32/225 55/2000 PGCD-PT-D04N025-CTLFireability-2024-12 13031694 m, 382810 m/sec, 49093264 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 246 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 37/225 63/2000 PGCD-PT-D04N025-CTLFireability-2024-12 14915663 m, 376793 m/sec, 56120256 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 251 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 42/225 71/2000 PGCD-PT-D04N025-CTLFireability-2024-12 16781043 m, 373076 m/sec, 63126692 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 256 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 47/225 79/2000 PGCD-PT-D04N025-CTLFireability-2024-12 18649853 m, 373762 m/sec, 70036022 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 261 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 52/225 87/2000 PGCD-PT-D04N025-CTLFireability-2024-12 20515769 m, 373183 m/sec, 77045288 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 266 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 57/225 94/2000 PGCD-PT-D04N025-CTLFireability-2024-12 22318254 m, 360497 m/sec, 83806378 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 271 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 62/225 102/2000 PGCD-PT-D04N025-CTLFireability-2024-12 24065852 m, 349519 m/sec, 90334324 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 276 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 67/225 109/2000 PGCD-PT-D04N025-CTLFireability-2024-12 25869334 m, 360696 m/sec, 97158569 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 281 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 72/225 117/2000 PGCD-PT-D04N025-CTLFireability-2024-12 27644707 m, 355074 m/sec, 103840589 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 286 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 77/225 124/2000 PGCD-PT-D04N025-CTLFireability-2024-12 29413848 m, 353828 m/sec, 110491106 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 291 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 82/225 131/2000 PGCD-PT-D04N025-CTLFireability-2024-12 31192357 m, 355701 m/sec, 117142439 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 296 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 87/225 139/2000 PGCD-PT-D04N025-CTLFireability-2024-12 32943509 m, 350230 m/sec, 123717080 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 301 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-PT-D04N025-CTLFireability-2024-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-09: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-11: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-PT-D04N025-CTLFireability-2024-13: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 CTL EXCL 92/225 146/2000 PGCD-PT-D04N025-CTLFireability-2024-12 34668166 m, 344931 m/sec, 130283438 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 306 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 405 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PGCD-PT-D04N025"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is PGCD-PT-D04N025, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r247-tall-171654354100770"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PGCD-PT-D04N025.tgz
mv PGCD-PT-D04N025 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;