About the Execution of LoLA for PGCD-COL-D05N025
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 0.000 | 418561.00 | 0.00 | 0.00 | ?F?????????F?FF? | normal |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r247-tall-171654354000732.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is PGCD-COL-D05N025, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r247-tall-171654354000732
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 424K
-rw-r--r-- 1 mcc users 6.8K Apr 11 15:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K Apr 11 15:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Apr 11 15:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Apr 11 15:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 6 10:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 6 10:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 6 10:01 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 6 10:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.1K Apr 11 15:30 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 101K Apr 11 15:30 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.0K Apr 11 15:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 76K Apr 11 15:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 6 10:01 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 6 10:01 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 11K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-00
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-01
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-02
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-03
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-04
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-05
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-06
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-07
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-08
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-09
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-10
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-11
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-12
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-13
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-14
FORMULA_NAME PGCD-COL-D05N025-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717103518894
FORMULA PGCD-COL-D05N025-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-COL-D05N025-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-COL-D05N025-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-COL-D05N025-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717103937455
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 64 (type SKEL/CNST) for 33 PGCD-COL-D05N025-LTLFireability-11
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 64 (type SKEL/CNST) for PGCD-COL-D05N025-LTLFireability-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] Places: 18, Transitions: 18
[[35mlola[0m][W] findlow criterion violated for transition 2
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][W] findlow criterion violated for 2 clusters
[[35mlola[0m][I] Time for checking findlow: 0
[[35mlola[0m][I] LAUNCH task # 66 (type SKEL/SRCH) for 50 PGCD-COL-D05N025-LTLFireability-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 65 (type SKEL/SRCH) for 43 PGCD-COL-D05N025-LTLFireability-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 67 (type SKEL/SRCH) for 50 PGCD-COL-D05N025-LTLFireability-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 66 (type SKEL/SRCH) for PGCD-COL-D05N025-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 65 (type SKEL/SRCH) for PGCD-COL-D05N025-LTLFireability-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 67 (type SKEL/SRCH) for PGCD-COL-D05N025-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 36 (type CNST) for 33 PGCD-COL-D05N025-LTLFireability-11
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 33 PGCD-COL-D05N025-LTLFireability-11
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 36 (type CNST) for PGCD-COL-D05N025-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for PGCD-COL-D05N025-LTLFireability-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 59 (type EXCL) for 50 PGCD-COL-D05N025-LTLFireability-14
[[35mlola[0m][I] time limit : 199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 72 (type EQUN) for 9 PGCD-COL-D05N025-LTLFireability-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 74 (type FNDP) for 3 PGCD-COL-D05N025-LTLFireability-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 75 (type EQUN) for 3 PGCD-COL-D05N025-LTLFireability-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 59 (type EXCL) for PGCD-COL-D05N025-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 107
[[35mlola[0m][I] fired transitions : 107
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 43 PGCD-COL-D05N025-LTLFireability-13
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for PGCD-COL-D05N025-LTLFireability-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 107
[[35mlola[0m][I] fired transitions : 107
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 40 PGCD-COL-D05N025-LTLFireability-12
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 74 (type FNDP) for PGCD-COL-D05N025-LTLFireability-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 75 (type EQUN) for PGCD-COL-D05N025-LTLFireability-01 (obsolete)
[[35mlola[0m][I] FINISHED task # 75 (type EQUN) for PGCD-COL-D05N025-LTLFireability-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 72 (type EQUN) for PGCD-COL-D05N025-LTLFireability-03
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 41 (type EXCL) for PGCD-COL-D05N025-LTLFireability-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 70556
[[35mlola[0m][I] fired transitions : 111900
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 PGCD-COL-D05N025-LTLFireability-08
[[35mlola[0m][I] time limit : 327 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 25 (type EXCL) for PGCD-COL-D05N025-LTLFireability-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 PGCD-COL-D05N025-LTLFireability-06
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for PGCD-COL-D05N025-LTLFireability-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 107
[[35mlola[0m][I] fired transitions : 107
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 PGCD-COL-D05N025-LTLFireability-05
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPGCD-COL-D05N025-LTLFireability-01: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPGCD-COL-D05N025-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-COL-D05N025-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mPGCD-COL-D05N025-LTLFireability-11: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mPGCD-COL-D05N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mPGCD-COL-D05N025-LTLFireability-13: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPGCD-COL-D05N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 5/399 21/2000 PGCD-COL-D05N025-LTLFireability-05 3206779 m, 641355 m/sec, 6878884 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPGCD-COL-D05N025-LTLFireability-01: AG false findpath[0m
[[35mlola[0m][.] [1m[31mPGCD-COL-D05N025-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-COL-D05N025-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mPGCD-COL-D05N025-LTLFireability-11: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mPGCD-COL-D05N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mPGCD-COL-D05N025-LTLFireability-13: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mPGCD-COL-D05N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D05N025-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 10/399 33/2000 PGCD-COL-D05N025-LTLFireability-05 4966072 m, 351858 m/sec, 12011705 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
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[[35mlola[0m][.] 22 LTL EXCL 5/3194 21/2000 PGCD-COL-D05N025-LTLFireability-07 3208468 m, 641693 m/sec, 6883960 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 407 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PGCD-COL-D05N025"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is PGCD-COL-D05N025, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r247-tall-171654354000732"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PGCD-COL-D05N025.tgz
mv PGCD-COL-D05N025 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;