About the Execution of LoLA for PGCD-COL-D04N050
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16208.500 | 680939.00 | 699130.00 | 2100.90 | ????F????TT????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r247-tall-171654354000722.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is PGCD-COL-D04N050, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r247-tall-171654354000722
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 368K
-rw-r--r-- 1 mcc users 6.0K Apr 11 15:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 66K Apr 11 15:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Apr 11 15:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K Apr 11 15:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 6 10:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K May 6 10:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 6 10:01 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 6 10:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.9K Apr 11 15:36 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 92K Apr 11 15:36 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 4.8K Apr 11 15:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 36K Apr 11 15:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 6 10:01 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 6 10:01 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 11K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-00
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-01
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-02
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-03
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-04
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-05
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-06
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-07
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-08
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-09
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-10
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-11
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-12
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-13
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-14
FORMULA_NAME PGCD-COL-D04N050-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717103021765
FORMULA PGCD-COL-D04N050-CTLFireability-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-COL-D04N050-CTLFireability-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-COL-D04N050-CTLFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717103702704
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 64 (type SKEL/EQUN) for 12 PGCD-COL-D04N050-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 62 (type SKEL/SRCH) for 12 PGCD-COL-D04N050-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 62 (type SKEL/SRCH) for PGCD-COL-D04N050-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 64 (type EQUN) for PGCD-COL-D04N050-CTLFireability-2024-04 (obsolete)
[[35mlola[0m][I] Places: 15, Transitions: 15
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 66 (type EXCL) for 12 PGCD-COL-D04N050-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 171 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 68 (type EQUN) for 12 PGCD-COL-D04N050-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 66 (type EXCL) for PGCD-COL-D04N050-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 68 (type EQUN) for PGCD-COL-D04N050-CTLFireability-2024-04 (obsolete)
[[35mlola[0m][W] findlow criterion violated for transition 2
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 PGCD-COL-D04N050-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[*** LOG ERROR #0001 ***] [2024-05-30 21:03:42] [status_logger] string pointer is null
[[35mlola[0m][I] FINISHED task # 32 (type EXCL) for PGCD-COL-D04N050-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 252
[[35mlola[0m][I] fired transitions : 252
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 40 PGCD-COL-D04N050-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 43 (type EXCL) for PGCD-COL-D04N050-CTLFireability-2024-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 10
[[35mlola[0m][I] fired transitions : 19
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 PGCD-COL-D04N050-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 35 (type EXCL) for PGCD-COL-D04N050-CTLFireability-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 254
[[35mlola[0m][I] fired transitions : 506
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 PGCD-COL-D04N050-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 64 (type SKEL/EQUN) for PGCD-COL-D04N050-CTLFireability-2024-04
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 68 (type EQUN) for PGCD-COL-D04N050-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][W] findlow criterion violated for 2 clusters
[[35mlola[0m][I] Time for checking findlow: 0
[[35mlola[0m][I] LAUNCH task # 69 (type FNDP) for 57 PGCD-COL-D04N050-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 70 (type EQUN) for 57 PGCD-COL-D04N050-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 26 (type EXCL) for PGCD-COL-D04N050-CTLFireability-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2280
[[35mlola[0m][I] fired transitions : 7660
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 51 PGCD-COL-D04N050-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 52 (type EXCL) for PGCD-COL-D04N050-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 40 PGCD-COL-D04N050-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 299 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 49 (type EXCL) for PGCD-COL-D04N050-CTLFireability-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 PGCD-COL-D04N050-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for PGCD-COL-D04N050-CTLFireability-2024-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 2019
[[35mlola[0m][I] fired transitions : 2043
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 PGCD-COL-D04N050-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for PGCD-COL-D04N050-CTLFireability-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 PGCD-COL-D04N050-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 449 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for PGCD-COL-D04N050-CTLFireability-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 95
[[35mlola[0m][I] fired transitions : 102
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 54 PGCD-COL-D04N050-CTLFireability-2024-14
[[35mlola[0m][I] time limit : 514 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 69 (type FNDP) for PGCD-COL-D04N050-CTLFireability-2024-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 70 (type EQUN) for PGCD-COL-D04N050-CTLFireability-2024-15 (obsolete)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mPGCD-COL-D04N050-CTLFireability-2024-02: CTL false CTL model checker[0m
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[[35mlola[0m][.] [1m[31mPGCD-COL-D04N050-CTLFireability-2024-04: CONJ false state space /EXEF[0m
[[35mlola[0m][.] [1m[31mPGCD-COL-D04N050-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mPGCD-COL-D04N050-CTLFireability-2024-07: CTL true CTL model checker[0m
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[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-COL-D04N050-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D04N050-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D04N050-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D04N050-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D04N050-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D04N050-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 5/599 7/2000 PGCD-COL-D04N050-CTLFireability-2024-14 1432676 m, 286535 m/sec, 5482830 t fired, .
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[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] PGCD-COL-D04N050-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D04N050-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D04N050-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D04N050-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D04N050-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D04N050-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 10/599 11/2000 PGCD-COL-D04N050-CTLFireability-2024-14 2573857 m, 228236 m/sec, 10459828 t fired, .
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[[35mlola[0m][.] PGCD-COL-D04N050-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] PGCD-COL-D04N050-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] PGCD-COL-D04N050-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 15/599 16/2000 PGCD-COL-D04N050-CTLFireability-2024-14 3601383 m, 205505 m/sec, 15120999 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 20/599 20/2000 PGCD-COL-D04N050-CTLFireability-2024-14 4589360 m, 197595 m/sec, 19643755 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 25/599 24/2000 PGCD-COL-D04N050-CTLFireability-2024-14 5509191 m, 183966 m/sec, 23961576 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 30/599 27/2000 PGCD-COL-D04N050-CTLFireability-2024-14 6426343 m, 183430 m/sec, 28255720 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 35/599 31/2000 PGCD-COL-D04N050-CTLFireability-2024-14 7306837 m, 176098 m/sec, 32495317 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 40/599 35/2000 PGCD-COL-D04N050-CTLFireability-2024-14 8188828 m, 176398 m/sec, 36727591 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 60/599 49/2000 PGCD-COL-D04N050-CTLFireability-2024-14 11569693 m, 163689 m/sec, 53139854 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 80/599 63/2000 PGCD-COL-D04N050-CTLFireability-2024-14 14795102 m, 159840 m/sec, 69067697 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 205/599 139/2000 PGCD-COL-D04N050-CTLFireability-2024-14 32918579 m, 110520 m/sec, 161268071 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 290/599 180/2000 PGCD-COL-D04N050-CTLFireability-2024-14 42725604 m, 115436 m/sec, 212495618 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 375/599 222/2000 PGCD-COL-D04N050-CTLFireability-2024-14 52848440 m, 117180 m/sec, 266022174 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 455/599 265/2000 PGCD-COL-D04N050-CTLFireability-2024-14 62946034 m, 129211 m/sec, 319732681 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 480/599 276/2000 PGCD-COL-D04N050-CTLFireability-2024-14 65601595 m, 99002 m/sec, 333971002 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 485/599 278/2000 PGCD-COL-D04N050-CTLFireability-2024-14 66203776 m, 120436 m/sec, 337178184 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 490/599 280/2000 PGCD-COL-D04N050-CTLFireability-2024-14 66661810 m, 91606 m/sec, 339623214 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 495/599 282/2000 PGCD-COL-D04N050-CTLFireability-2024-14 67129563 m, 93550 m/sec, 342154591 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 500/599 285/2000 PGCD-COL-D04N050-CTLFireability-2024-14 67724012 m, 118889 m/sec, 345348151 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 525/599 297/2000 PGCD-COL-D04N050-CTLFireability-2024-14 70585646 m, 122963 m/sec, 360633612 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 565/599 316/2000 PGCD-COL-D04N050-CTLFireability-2024-14 75208734 m, 123763 m/sec, 385403653 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 575/599 321/2000 PGCD-COL-D04N050-CTLFireability-2024-14 76388011 m, 117244 m/sec, 391782999 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 580/599 324/2000 PGCD-COL-D04N050-CTLFireability-2024-14 76996673 m, 121732 m/sec, 395039391 t fired, .
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[[35mlola[0m][.] 55 CTL EXCL 585/599 326/2000 PGCD-COL-D04N050-CTLFireability-2024-14 77575566 m, 115778 m/sec, 398209193 t fired, .
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[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for PGCD-COL-D04N050-CTLFireability-2024-01
[[35mlola[0m][I] result : true
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[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for PGCD-COL-D04N050-CTLFireability-2024-11
[[35mlola[0m][I] result : false
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[[35mlola[0m][.] 1 CTL EXCL 5/1497 6/2000 PGCD-COL-D04N050-CTLFireability-2024-00 1197750 m, 239550 m/sec, 7851386 t fired, .
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[[35mlola[0m][.] 1 CTL EXCL 10/1497 9/2000 PGCD-COL-D04N050-CTLFireability-2024-00 2132538 m, 186957 m/sec, 14565867 t fired, .
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[[35mlola[0m][.] 1 CTL EXCL 15/1497 13/2000 PGCD-COL-D04N050-CTLFireability-2024-00 3008307 m, 175153 m/sec, 21045194 t fired, .
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[[35mlola[0m][.] 1 CTL EXCL 20/1497 17/2000 PGCD-COL-D04N050-CTLFireability-2024-00 3836003 m, 165539 m/sec, 27252737 t fired, .
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[[35mlola[0m][.] 1 CTL EXCL 25/1497 20/2000 PGCD-COL-D04N050-CTLFireability-2024-00 4642479 m, 161295 m/sec, 33343003 t fired, .
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[[35mlola[0m][.] 1 CTL EXCL 30/1497 23/2000 PGCD-COL-D04N050-CTLFireability-2024-00 5412042 m, 153912 m/sec, 39258830 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 401 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PGCD-COL-D04N050"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is PGCD-COL-D04N050, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r247-tall-171654354000722"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PGCD-COL-D04N050.tgz
mv PGCD-COL-D04N050 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;