About the Execution of LoLA for NoC3x3-PT-7B
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
0.000 | 1794090.00 | 0.00 | 0.00 | ?????FF?F??????? | normal |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r247-tall-171654353800659.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is NoC3x3-PT-7B, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r247-tall-171654353800659
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.4M
-rw-r--r-- 1 mcc users 7.8K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K May 19 07:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 19 16:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 19 07:24 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 19 18:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 12 06:55 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 106K Apr 12 06:55 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.1K Apr 12 06:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 79K Apr 12 06:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:41 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 23 07:41 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 2.0M May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-00
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-01
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-02
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-03
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-04
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-05
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-06
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-07
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-08
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-09
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-10
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-11
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-12
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-13
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-14
FORMULA_NAME NoC3x3-PT-7B-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717098213829
FORMULA NoC3x3-PT-7B-LTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-7B-LTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-7B-LTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717100007919
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 27 (type CNST) for 26 NoC3x3-PT-7B-LTLCardinality-06
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 27 (type CNST) for NoC3x3-PT-7B-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-05: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 740 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 24 (type CNST) for 23 NoC3x3-PT-7B-LTLCardinality-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 24 (type CNST) for NoC3x3-PT-7B-LTLCardinality-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 35 (type CNST) for 32 NoC3x3-PT-7B-LTLCardinality-08
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 35 (type CNST) for NoC3x3-PT-7B-LTLCardinality-08
[[35mlola[0m][I] result : false
[*** LOG ERROR #0001 ***] [2024-05-30 19:55:55] [status_logger] string pointer is null
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 NoC3x3-PT-7B-LTLCardinality-00
[[35mlola[0m][I] time limit : 190 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 67 (type EQUN) for 3 NoC3x3-PT-7B-LTLCardinality-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 0/190 1/2000 NoC3x3-PT-7B-LTLCardinality-00 128 m, 25 m/sec, 240 t fired, .
[[35mlola[0m][.] 67 EF STEQ 0/2855 0/5 NoC3x3-PT-7B-LTLCardinality-01 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 745 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 67 (type EQUN) for NoC3x3-PT-7B-LTLCardinality-01
[[35mlola[0m][I] result : true
[*** LOG ERROR #0002 ***] [2024-05-30 19:56:01] [status_logger] string pointer is null
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 5/190 1/2000 NoC3x3-PT-7B-LTLCardinality-00 66698 m, 13314 m/sec, 174634 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 750 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 10/190 2/2000 NoC3x3-PT-7B-LTLCardinality-00 116274 m, 9915 m/sec, 300108 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 755 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 15/190 5/2000 NoC3x3-PT-7B-LTLCardinality-00 417715 m, 60288 m/sec, 1081092 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 760 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 20/190 9/2000 NoC3x3-PT-7B-LTLCardinality-00 820542 m, 80565 m/sec, 2123414 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 765 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 25/190 14/2000 NoC3x3-PT-7B-LTLCardinality-00 1216141 m, 79119 m/sec, 3144763 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 770 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 30/190 16/2000 NoC3x3-PT-7B-LTLCardinality-00 1415579 m, 39887 m/sec, 3662692 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 775 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 35/190 17/2000 NoC3x3-PT-7B-LTLCardinality-00 1588926 m, 34669 m/sec, 4110881 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 780 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 40/190 18/2000 NoC3x3-PT-7B-LTLCardinality-00 1759805 m, 34175 m/sec, 4553350 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 785 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 45/190 19/2000 NoC3x3-PT-7B-LTLCardinality-00 1927962 m, 33631 m/sec, 4986079 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 790 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 50/190 20/2000 NoC3x3-PT-7B-LTLCardinality-00 2095508 m, 33509 m/sec, 5419331 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 795 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 55/190 21/2000 NoC3x3-PT-7B-LTLCardinality-00 2256194 m, 32137 m/sec, 5835425 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 800 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 60/190 22/2000 NoC3x3-PT-7B-LTLCardinality-00 2420685 m, 32898 m/sec, 6261145 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 805 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 65/190 23/2000 NoC3x3-PT-7B-LTLCardinality-00 2584460 m, 32755 m/sec, 6684289 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 810 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 70/190 24/2000 NoC3x3-PT-7B-LTLCardinality-00 2746372 m, 32382 m/sec, 7102974 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 815 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 75/190 25/2000 NoC3x3-PT-7B-LTLCardinality-00 2906823 m, 32090 m/sec, 7515212 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 820 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 80/190 28/2000 NoC3x3-PT-7B-LTLCardinality-00 3200379 m, 58711 m/sec, 8276748 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 825 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 85/190 32/2000 NoC3x3-PT-7B-LTLCardinality-00 3593208 m, 78565 m/sec, 9293051 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 830 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 90/190 37/2000 NoC3x3-PT-7B-LTLCardinality-00 3988631 m, 79084 m/sec, 10315316 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 835 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 95/190 39/2000 NoC3x3-PT-7B-LTLCardinality-00 4315666 m, 65407 m/sec, 11160936 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 840 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 100/190 41/2000 NoC3x3-PT-7B-LTLCardinality-00 4639176 m, 64702 m/sec, 11996861 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 845 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 105/190 43/2000 NoC3x3-PT-7B-LTLCardinality-00 4865716 m, 45308 m/sec, 12582536 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 850 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 110/190 44/2000 NoC3x3-PT-7B-LTLCardinality-00 5082737 m, 43404 m/sec, 13144785 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 855 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 115/190 46/2000 NoC3x3-PT-7B-LTLCardinality-00 5297971 m, 43046 m/sec, 13702749 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 860 secs. Pages in use: 46
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 120/190 47/2000 NoC3x3-PT-7B-LTLCardinality-00 5476585 m, 35722 m/sec, 14162702 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 865 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 125/190 51/2000 NoC3x3-PT-7B-LTLCardinality-00 5809351 m, 66553 m/sec, 15021977 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 870 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 130/190 52/2000 NoC3x3-PT-7B-LTLCardinality-00 5968063 m, 31742 m/sec, 15434980 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 875 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 135/190 53/2000 NoC3x3-PT-7B-LTLCardinality-00 6124107 m, 31208 m/sec, 15838868 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 880 secs. Pages in use: 53
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 140/190 56/2000 NoC3x3-PT-7B-LTLCardinality-00 6433528 m, 61884 m/sec, 16639792 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 885 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 145/190 57/2000 NoC3x3-PT-7B-LTLCardinality-00 6644165 m, 42127 m/sec, 17184040 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 890 secs. Pages in use: 57
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 150/190 60/2000 NoC3x3-PT-7B-LTLCardinality-00 6974167 m, 66000 m/sec, 17943754 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 895 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 155/190 63/2000 NoC3x3-PT-7B-LTLCardinality-00 7349167 m, 75000 m/sec, 18797350 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 900 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 160/190 64/2000 NoC3x3-PT-7B-LTLCardinality-00 7605412 m, 51249 m/sec, 19482235 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 905 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 165/190 67/2000 NoC3x3-PT-7B-LTLCardinality-00 7893932 m, 57704 m/sec, 20210537 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 910 secs. Pages in use: 67
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 170/190 69/2000 NoC3x3-PT-7B-LTLCardinality-00 8183302 m, 57874 m/sec, 20951713 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 915 secs. Pages in use: 69
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 175/190 70/2000 NoC3x3-PT-7B-LTLCardinality-00 8422486 m, 47836 m/sec, 21643691 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 920 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 180/190 72/2000 NoC3x3-PT-7B-LTLCardinality-00 8641342 m, 43771 m/sec, 22293481 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 925 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 185/190 74/2000 NoC3x3-PT-7B-LTLCardinality-00 8893342 m, 50400 m/sec, 23091245 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 930 secs. Pages in use: 74
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 190/190 77/2000 NoC3x3-PT-7B-LTLCardinality-00 9287218 m, 78775 m/sec, 23957511 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 935 secs. Pages in use: 77
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 1 (type EXCL) for NoC3x3-PT-7B-LTLCardinality-00 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 940 secs. Pages in use: 79
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 62 (type EXCL) for 61 NoC3x3-PT-7B-LTLCardinality-15
[[35mlola[0m][I] time limit : 190 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 NoC3x3-PT-7B-LTLCardinality-00
[[35mlola[0m][I] time limit : 2660 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 62 (type EXCL) for NoC3x3-PT-7B-LTLCardinality-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 45
[[35mlola[0m][I] fired transitions : 45
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 5/190 3/5 NoC3x3-PT-7B-LTLCardinality-00 251126 m, -1807218 m/sec, 648677 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 945 secs. Pages in use: 82
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 1 (type EXCL) for NoC3x3-PT-7B-LTLCardinality-00 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 950 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 59 (type EXCL) for 58 NoC3x3-PT-7B-LTLCardinality-14
[[35mlola[0m][I] time limit : 203 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 59 (type EXCL) for NoC3x3-PT-7B-LTLCardinality-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 56 (type EXCL) for 55 NoC3x3-PT-7B-LTLCardinality-13
[[35mlola[0m][I] time limit : 220 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 5/220 5/2000 NoC3x3-PT-7B-LTLCardinality-13 198967 m, 39793 m/sec, 229900 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 955 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 10/220 9/2000 NoC3x3-PT-7B-LTLCardinality-13 381670 m, 36540 m/sec, 468702 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 960 secs. Pages in use: 88
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 15/220 13/2000 NoC3x3-PT-7B-LTLCardinality-13 564675 m, 36601 m/sec, 706386 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 965 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 20/220 17/2000 NoC3x3-PT-7B-LTLCardinality-13 747122 m, 36489 m/sec, 944231 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 970 secs. Pages in use: 96
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 25/220 20/2000 NoC3x3-PT-7B-LTLCardinality-13 927792 m, 36134 m/sec, 1183023 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 975 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 30/220 24/2000 NoC3x3-PT-7B-LTLCardinality-13 1110793 m, 36600 m/sec, 1420545 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 980 secs. Pages in use: 103
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 35/220 28/2000 NoC3x3-PT-7B-LTLCardinality-13 1299693 m, 37780 m/sec, 1656501 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 985 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 40/220 33/2000 NoC3x3-PT-7B-LTLCardinality-13 1508943 m, 41850 m/sec, 1885286 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 990 secs. Pages in use: 112
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 45/220 39/2000 NoC3x3-PT-7B-LTLCardinality-13 1719522 m, 42115 m/sec, 2109880 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 995 secs. Pages in use: 118
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 50/220 46/2000 NoC3x3-PT-7B-LTLCardinality-13 1928614 m, 41818 m/sec, 2333061 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1000 secs. Pages in use: 125
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 55/220 52/2000 NoC3x3-PT-7B-LTLCardinality-13 2135902 m, 41457 m/sec, 2554380 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1005 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 60/220 57/2000 NoC3x3-PT-7B-LTLCardinality-13 2343551 m, 41529 m/sec, 2776019 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1010 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 65/220 63/2000 NoC3x3-PT-7B-LTLCardinality-13 2551079 m, 41505 m/sec, 2997531 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1015 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 70/220 69/2000 NoC3x3-PT-7B-LTLCardinality-13 2757562 m, 41296 m/sec, 3217925 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1020 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 75/220 75/2000 NoC3x3-PT-7B-LTLCardinality-13 2964190 m, 41325 m/sec, 3438508 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1025 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 80/220 81/2000 NoC3x3-PT-7B-LTLCardinality-13 3170643 m, 41290 m/sec, 3658859 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1030 secs. Pages in use: 160
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 85/220 87/2000 NoC3x3-PT-7B-LTLCardinality-13 3376961 m, 41263 m/sec, 3879121 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1035 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 90/220 93/2000 NoC3x3-PT-7B-LTLCardinality-13 3573702 m, 39348 m/sec, 4105229 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1040 secs. Pages in use: 172
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 95/220 102/2000 NoC3x3-PT-7B-LTLCardinality-13 3782767 m, 41813 m/sec, 4324493 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1045 secs. Pages in use: 181
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 100/220 111/2000 NoC3x3-PT-7B-LTLCardinality-13 3989838 m, 41414 m/sec, 4541655 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1050 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 105/220 120/2000 NoC3x3-PT-7B-LTLCardinality-13 4184423 m, 38917 m/sec, 4758537 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1055 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 110/220 126/2000 NoC3x3-PT-7B-LTLCardinality-13 4389635 m, 41042 m/sec, 4976511 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1060 secs. Pages in use: 205
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 115/220 129/2000 NoC3x3-PT-7B-LTLCardinality-13 4602487 m, 42570 m/sec, 5204772 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1065 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 120/220 133/2000 NoC3x3-PT-7B-LTLCardinality-13 4811558 m, 41814 m/sec, 5435156 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1070 secs. Pages in use: 212
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 125/220 137/2000 NoC3x3-PT-7B-LTLCardinality-13 5017807 m, 41249 m/sec, 5667205 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1075 secs. Pages in use: 216
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 130/220 140/2000 NoC3x3-PT-7B-LTLCardinality-13 5219263 m, 40291 m/sec, 5900303 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1080 secs. Pages in use: 219
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 135/220 144/2000 NoC3x3-PT-7B-LTLCardinality-13 5433308 m, 42809 m/sec, 6129533 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1085 secs. Pages in use: 223
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 140/220 148/2000 NoC3x3-PT-7B-LTLCardinality-13 5647286 m, 42795 m/sec, 6359004 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1090 secs. Pages in use: 227
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 145/220 152/2000 NoC3x3-PT-7B-LTLCardinality-13 5861187 m, 42780 m/sec, 6588392 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1095 secs. Pages in use: 231
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 150/220 156/2000 NoC3x3-PT-7B-LTLCardinality-13 6075024 m, 42767 m/sec, 6817390 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1100 secs. Pages in use: 235
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 155/220 159/2000 NoC3x3-PT-7B-LTLCardinality-13 6288576 m, 42710 m/sec, 7046740 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1105 secs. Pages in use: 238
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 160/220 163/2000 NoC3x3-PT-7B-LTLCardinality-13 6502701 m, 42825 m/sec, 7276382 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1110 secs. Pages in use: 242
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 165/220 167/2000 NoC3x3-PT-7B-LTLCardinality-13 6716818 m, 42823 m/sec, 7505690 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1115 secs. Pages in use: 246
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 170/220 171/2000 NoC3x3-PT-7B-LTLCardinality-13 6930749 m, 42786 m/sec, 7735094 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1120 secs. Pages in use: 250
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 175/220 175/2000 NoC3x3-PT-7B-LTLCardinality-13 7143856 m, 42621 m/sec, 7963683 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1125 secs. Pages in use: 254
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 180/220 179/2000 NoC3x3-PT-7B-LTLCardinality-13 7357116 m, 42652 m/sec, 8192062 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1130 secs. Pages in use: 258
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 185/220 182/2000 NoC3x3-PT-7B-LTLCardinality-13 7569866 m, 42550 m/sec, 8420564 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1135 secs. Pages in use: 261
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 190/220 186/2000 NoC3x3-PT-7B-LTLCardinality-13 7782886 m, 42604 m/sec, 8648997 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1140 secs. Pages in use: 265
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 195/220 190/2000 NoC3x3-PT-7B-LTLCardinality-13 7996670 m, 42756 m/sec, 8877962 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1145 secs. Pages in use: 269
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 200/220 193/2000 NoC3x3-PT-7B-LTLCardinality-13 8199118 m, 40489 m/sec, 9104048 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1150 secs. Pages in use: 272
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 205/220 196/2000 NoC3x3-PT-7B-LTLCardinality-13 8394387 m, 39053 m/sec, 9323583 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1155 secs. Pages in use: 275
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 210/220 199/2000 NoC3x3-PT-7B-LTLCardinality-13 8587389 m, 38600 m/sec, 9540666 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1160 secs. Pages in use: 278
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 215/220 203/2000 NoC3x3-PT-7B-LTLCardinality-13 8776361 m, 37794 m/sec, 9760931 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1165 secs. Pages in use: 282
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 220/220 207/2000 NoC3x3-PT-7B-LTLCardinality-13 8987573 m, 42242 m/sec, 9987469 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1170 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 56 (type EXCL) for NoC3x3-PT-7B-LTLCardinality-13 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1175 secs. Pages in use: 289
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 53 (type EXCL) for 52 NoC3x3-PT-7B-LTLCardinality-12
[[35mlola[0m][I] time limit : 220 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 56 (type EXCL) for 55 NoC3x3-PT-7B-LTLCardinality-13
[[35mlola[0m][I] time limit : 2425 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 53 (type EXCL) for NoC3x3-PT-7B-LTLCardinality-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 LTL EXCL 5/220 5/5 NoC3x3-PT-7B-LTLCardinality-13 197840 m, -1757946 m/sec, 228014 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1180 secs. Pages in use: 294
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 56 (type EXCL) for NoC3x3-PT-7B-LTLCardinality-13 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1185 secs. Pages in use: 294
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 NoC3x3-PT-7B-LTLCardinality-11
[[35mlola[0m][I] time limit : 241 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 50 (type EXCL) for NoC3x3-PT-7B-LTLCardinality-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 NoC3x3-PT-7B-LTLCardinality-10
[[35mlola[0m][I] time limit : 268 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for NoC3x3-PT-7B-LTLCardinality-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 30 (type EXCL) for 29 NoC3x3-PT-7B-LTLCardinality-07
[[35mlola[0m][I] time limit : 301 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 30 (type EXCL) for NoC3x3-PT-7B-LTLCardinality-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 45
[[35mlola[0m][I] fired transitions : 45
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 21 (type EXCL) for 16 NoC3x3-PT-7B-LTLCardinality-04
[[35mlola[0m][I] time limit : 345 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 21 (type EXCL) for NoC3x3-PT-7B-LTLCardinality-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 16 NoC3x3-PT-7B-LTLCardinality-04
[[35mlola[0m][I] time limit : 402 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for NoC3x3-PT-7B-LTLCardinality-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 45
[[35mlola[0m][I] fired transitions : 45
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL) for 13 NoC3x3-PT-7B-LTLCardinality-03
[[35mlola[0m][I] time limit : 483 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 LTL EXCL 5/483 4/2000 NoC3x3-PT-7B-LTLCardinality-03 172132 m, 34426 m/sec, 239718 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1190 secs. Pages in use: 294
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 LTL EXCL 10/483 8/2000 NoC3x3-PT-7B-LTLCardinality-03 354216 m, 36416 m/sec, 477430 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1195 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 LTL EXCL 15/483 12/2000 NoC3x3-PT-7B-LTLCardinality-03 534762 m, 36109 m/sec, 714650 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1200 secs. Pages in use: 301
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 LTL EXCL 20/483 16/2000 NoC3x3-PT-7B-LTLCardinality-03 718489 m, 36745 m/sec, 950899 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1205 secs. Pages in use: 305
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 LTL EXCL 25/483 19/2000 NoC3x3-PT-7B-LTLCardinality-03 898247 m, 35951 m/sec, 1188671 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1210 secs. Pages in use: 308
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 LTL EXCL 30/483 23/2000 NoC3x3-PT-7B-LTLCardinality-03 1078581 m, 36066 m/sec, 1425768 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1215 secs. Pages in use: 312
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 LTL EXCL 35/483 28/2000 NoC3x3-PT-7B-LTLCardinality-03 1270810 m, 38445 m/sec, 1659180 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1220 secs. Pages in use: 317
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 LTL EXCL 40/483 33/2000 NoC3x3-PT-7B-LTLCardinality-03 1484394 m, 42716 m/sec, 1885578 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1225 secs. Pages in use: 322
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 14 (type EXCL) for NoC3x3-PT-7B-LTLCardinality-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1489113
[[35mlola[0m][I] fired transitions : 1890641
[[35mlola[0m][I] time used : 40
[[35mlola[0m][I] memory pages used : 33
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 NoC3x3-PT-7B-LTLCardinality-02
[[35mlola[0m][I] time limit : 593 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 5/593 5/2000 NoC3x3-PT-7B-LTLCardinality-02 194383 m, 38876 m/sec, 223219 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1230 secs. Pages in use: 322
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 10/593 9/2000 NoC3x3-PT-7B-LTLCardinality-02 375624 m, 36248 m/sec, 459882 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1235 secs. Pages in use: 322
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 15/593 12/2000 NoC3x3-PT-7B-LTLCardinality-02 555473 m, 35969 m/sec, 696849 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1240 secs. Pages in use: 322
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 20/593 16/2000 NoC3x3-PT-7B-LTLCardinality-02 739261 m, 36757 m/sec, 932329 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1245 secs. Pages in use: 322
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 25/593 20/2000 NoC3x3-PT-7B-LTLCardinality-02 917951 m, 35738 m/sec, 1168770 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1250 secs. Pages in use: 322
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 30/593 24/2000 NoC3x3-PT-7B-LTLCardinality-02 1096780 m, 35765 m/sec, 1404949 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1255 secs. Pages in use: 322
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 35/593 28/2000 NoC3x3-PT-7B-LTLCardinality-02 1286576 m, 37959 m/sec, 1637477 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1260 secs. Pages in use: 322
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 40/593 33/2000 NoC3x3-PT-7B-LTLCardinality-02 1489053 m, 40495 m/sec, 1864667 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1265 secs. Pages in use: 322
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 45/593 39/2000 NoC3x3-PT-7B-LTLCardinality-02 1696821 m, 41553 m/sec, 2085706 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1270 secs. Pages in use: 328
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 50/593 45/2000 NoC3x3-PT-7B-LTLCardinality-02 1904393 m, 41514 m/sec, 2307250 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1275 secs. Pages in use: 334
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 55/593 51/2000 NoC3x3-PT-7B-LTLCardinality-02 2110636 m, 41248 m/sec, 2527413 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1280 secs. Pages in use: 340
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 60/593 57/2000 NoC3x3-PT-7B-LTLCardinality-02 2316068 m, 41086 m/sec, 2746711 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1285 secs. Pages in use: 346
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 65/593 62/2000 NoC3x3-PT-7B-LTLCardinality-02 2522089 m, 41204 m/sec, 2966594 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1290 secs. Pages in use: 351
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 70/593 68/2000 NoC3x3-PT-7B-LTLCardinality-02 2727407 m, 41063 m/sec, 3185751 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1295 secs. Pages in use: 357
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 75/593 74/2000 NoC3x3-PT-7B-LTLCardinality-02 2932621 m, 41042 m/sec, 3404807 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1300 secs. Pages in use: 363
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 80/593 80/2000 NoC3x3-PT-7B-LTLCardinality-02 3137748 m, 41025 m/sec, 3623770 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1305 secs. Pages in use: 369
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 85/593 86/2000 NoC3x3-PT-7B-LTLCardinality-02 3342289 m, 40908 m/sec, 3842139 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1310 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 90/593 91/2000 NoC3x3-PT-7B-LTLCardinality-02 3537627 m, 39067 m/sec, 4064983 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1315 secs. Pages in use: 380
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 95/593 101/2000 NoC3x3-PT-7B-LTLCardinality-02 3742712 m, 41017 m/sec, 4282458 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1320 secs. Pages in use: 390
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 100/593 110/2000 NoC3x3-PT-7B-LTLCardinality-02 3947071 m, 40871 m/sec, 4496777 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1325 secs. Pages in use: 399
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 105/593 119/2000 NoC3x3-PT-7B-LTLCardinality-02 4148198 m, 40225 m/sec, 4711598 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1330 secs. Pages in use: 408
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 110/593 125/2000 NoC3x3-PT-7B-LTLCardinality-02 4341532 m, 38666 m/sec, 4924773 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1335 secs. Pages in use: 414
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 115/593 128/2000 NoC3x3-PT-7B-LTLCardinality-02 4552412 m, 42176 m/sec, 5150958 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1340 secs. Pages in use: 417
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 120/593 132/2000 NoC3x3-PT-7B-LTLCardinality-02 4761000 m, 41717 m/sec, 5377983 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1345 secs. Pages in use: 421
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 125/593 136/2000 NoC3x3-PT-7B-LTLCardinality-02 4964952 m, 40790 m/sec, 5607543 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1350 secs. Pages in use: 425
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 130/593 139/2000 NoC3x3-PT-7B-LTLCardinality-02 5163102 m, 39630 m/sec, 5838492 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1355 secs. Pages in use: 428
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 135/593 143/2000 NoC3x3-PT-7B-LTLCardinality-02 5373503 m, 42080 m/sec, 6065352 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1360 secs. Pages in use: 432
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 140/593 147/2000 NoC3x3-PT-7B-LTLCardinality-02 5584766 m, 42252 m/sec, 6291958 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1365 secs. Pages in use: 436
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 145/593 151/2000 NoC3x3-PT-7B-LTLCardinality-02 5796519 m, 42350 m/sec, 6519079 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1370 secs. Pages in use: 440
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 150/593 154/2000 NoC3x3-PT-7B-LTLCardinality-02 6008767 m, 42449 m/sec, 6746373 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1375 secs. Pages in use: 443
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 155/593 158/2000 NoC3x3-PT-7B-LTLCardinality-02 6220174 m, 42281 m/sec, 6973463 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1380 secs. Pages in use: 447
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 160/593 162/2000 NoC3x3-PT-7B-LTLCardinality-02 6432122 m, 42389 m/sec, 7200450 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1385 secs. Pages in use: 451
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 165/593 166/2000 NoC3x3-PT-7B-LTLCardinality-02 6643525 m, 42280 m/sec, 7427208 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1390 secs. Pages in use: 455
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 170/593 170/2000 NoC3x3-PT-7B-LTLCardinality-02 6855530 m, 42401 m/sec, 7654589 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1395 secs. Pages in use: 459
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 175/593 173/2000 NoC3x3-PT-7B-LTLCardinality-02 7067439 m, 42381 m/sec, 7881558 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1400 secs. Pages in use: 462
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 180/593 177/2000 NoC3x3-PT-7B-LTLCardinality-02 7278924 m, 42297 m/sec, 8108367 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1405 secs. Pages in use: 466
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 185/593 181/2000 NoC3x3-PT-7B-LTLCardinality-02 7490067 m, 42228 m/sec, 8335099 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1410 secs. Pages in use: 470
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 190/593 185/2000 NoC3x3-PT-7B-LTLCardinality-02 7702559 m, 42498 m/sec, 8562427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1415 secs. Pages in use: 474
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 195/593 188/2000 NoC3x3-PT-7B-LTLCardinality-02 7914233 m, 42334 m/sec, 8789768 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1420 secs. Pages in use: 477
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 200/593 192/2000 NoC3x3-PT-7B-LTLCardinality-02 8119272 m, 41007 m/sec, 9014339 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1425 secs. Pages in use: 481
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 205/593 195/2000 NoC3x3-PT-7B-LTLCardinality-02 8316382 m, 39422 m/sec, 9236131 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1430 secs. Pages in use: 484
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 210/593 198/2000 NoC3x3-PT-7B-LTLCardinality-02 8507842 m, 38292 m/sec, 9451527 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1435 secs. Pages in use: 487
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 215/593 201/2000 NoC3x3-PT-7B-LTLCardinality-02 8698986 m, 38228 m/sec, 9666347 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1440 secs. Pages in use: 490
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 220/593 205/2000 NoC3x3-PT-7B-LTLCardinality-02 8897459 m, 39694 m/sec, 9890817 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1445 secs. Pages in use: 494
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 225/593 209/2000 NoC3x3-PT-7B-LTLCardinality-02 9107664 m, 42041 m/sec, 10116293 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1450 secs. Pages in use: 498
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 230/593 212/2000 NoC3x3-PT-7B-LTLCardinality-02 9318112 m, 42089 m/sec, 10341694 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1455 secs. Pages in use: 501
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 235/593 216/2000 NoC3x3-PT-7B-LTLCardinality-02 9527787 m, 41935 m/sec, 10566619 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1460 secs. Pages in use: 505
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 240/593 220/2000 NoC3x3-PT-7B-LTLCardinality-02 9737837 m, 42010 m/sec, 10791916 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1465 secs. Pages in use: 509
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 245/593 224/2000 NoC3x3-PT-7B-LTLCardinality-02 9946840 m, 41800 m/sec, 11015789 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1470 secs. Pages in use: 513
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 250/593 227/2000 NoC3x3-PT-7B-LTLCardinality-02 10145878 m, 39807 m/sec, 11229403 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1475 secs. Pages in use: 516
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 255/593 231/2000 NoC3x3-PT-7B-LTLCardinality-02 10344278 m, 39680 m/sec, 11442015 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1480 secs. Pages in use: 520
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 260/593 234/2000 NoC3x3-PT-7B-LTLCardinality-02 10542636 m, 39671 m/sec, 11654587 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1485 secs. Pages in use: 523
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 265/593 238/2000 NoC3x3-PT-7B-LTLCardinality-02 10738930 m, 39258 m/sec, 11865271 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1490 secs. Pages in use: 527
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 270/593 241/2000 NoC3x3-PT-7B-LTLCardinality-02 10936305 m, 39475 m/sec, 12076482 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1495 secs. Pages in use: 530
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 275/593 244/2000 NoC3x3-PT-7B-LTLCardinality-02 11134355 m, 39610 m/sec, 12289370 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1500 secs. Pages in use: 533
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 280/593 248/2000 NoC3x3-PT-7B-LTLCardinality-02 11332917 m, 39712 m/sec, 12501819 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1505 secs. Pages in use: 537
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 285/593 251/2000 NoC3x3-PT-7B-LTLCardinality-02 11531266 m, 39669 m/sec, 12714711 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1510 secs. Pages in use: 540
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 290/593 255/2000 NoC3x3-PT-7B-LTLCardinality-02 11729928 m, 39732 m/sec, 12927593 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1515 secs. Pages in use: 544
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 295/593 258/2000 NoC3x3-PT-7B-LTLCardinality-02 11928403 m, 39695 m/sec, 13140618 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1520 secs. Pages in use: 547
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 300/593 262/2000 NoC3x3-PT-7B-LTLCardinality-02 12127213 m, 39762 m/sec, 13353658 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1525 secs. Pages in use: 551
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 305/593 265/2000 NoC3x3-PT-7B-LTLCardinality-02 12326336 m, 39824 m/sec, 13567035 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1530 secs. Pages in use: 554
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 310/593 269/2000 NoC3x3-PT-7B-LTLCardinality-02 12525149 m, 39762 m/sec, 13780397 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1535 secs. Pages in use: 558
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 315/593 272/2000 NoC3x3-PT-7B-LTLCardinality-02 12724364 m, 39843 m/sec, 13993893 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1540 secs. Pages in use: 561
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 320/593 276/2000 NoC3x3-PT-7B-LTLCardinality-02 12923550 m, 39837 m/sec, 14207659 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1545 secs. Pages in use: 565
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 325/593 279/2000 NoC3x3-PT-7B-LTLCardinality-02 13123145 m, 39919 m/sec, 14421544 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1550 secs. Pages in use: 568
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 330/593 283/2000 NoC3x3-PT-7B-LTLCardinality-02 13322756 m, 39922 m/sec, 14635755 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1555 secs. Pages in use: 572
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 335/593 286/2000 NoC3x3-PT-7B-LTLCardinality-02 13528445 m, 41137 m/sec, 14856114 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1560 secs. Pages in use: 575
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 340/593 290/2000 NoC3x3-PT-7B-LTLCardinality-02 13732559 m, 40822 m/sec, 15075107 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1565 secs. Pages in use: 579
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 345/593 294/2000 NoC3x3-PT-7B-LTLCardinality-02 13938757 m, 41239 m/sec, 15296016 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1570 secs. Pages in use: 583
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 350/593 297/2000 NoC3x3-PT-7B-LTLCardinality-02 14142533 m, 40755 m/sec, 15514657 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1575 secs. Pages in use: 586
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 355/593 301/2000 NoC3x3-PT-7B-LTLCardinality-02 14348641 m, 41221 m/sec, 15735449 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1580 secs. Pages in use: 590
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 360/593 305/2000 NoC3x3-PT-7B-LTLCardinality-02 14552476 m, 40767 m/sec, 15954174 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1585 secs. Pages in use: 594
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 365/593 308/2000 NoC3x3-PT-7B-LTLCardinality-02 14760744 m, 41653 m/sec, 16177242 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1590 secs. Pages in use: 597
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 370/593 312/2000 NoC3x3-PT-7B-LTLCardinality-02 14963545 m, 40560 m/sec, 16394857 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1595 secs. Pages in use: 601
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 375/593 316/2000 NoC3x3-PT-7B-LTLCardinality-02 15169319 m, 41154 m/sec, 16615303 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1600 secs. Pages in use: 605
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 380/593 319/2000 NoC3x3-PT-7B-LTLCardinality-02 15371495 m, 40435 m/sec, 16832249 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1605 secs. Pages in use: 608
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 385/593 323/2000 NoC3x3-PT-7B-LTLCardinality-02 15572013 m, 40103 m/sec, 17047112 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1610 secs. Pages in use: 612
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 390/593 326/2000 NoC3x3-PT-7B-LTLCardinality-02 15774409 m, 40479 m/sec, 17270160 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1615 secs. Pages in use: 615
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 395/593 330/2000 NoC3x3-PT-7B-LTLCardinality-02 15976027 m, 40323 m/sec, 17497788 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1620 secs. Pages in use: 619
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 400/593 333/2000 NoC3x3-PT-7B-LTLCardinality-02 16178813 m, 40557 m/sec, 17725450 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1625 secs. Pages in use: 622
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 405/593 337/2000 NoC3x3-PT-7B-LTLCardinality-02 16380844 m, 40406 m/sec, 17952923 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1630 secs. Pages in use: 626
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 410/593 340/2000 NoC3x3-PT-7B-LTLCardinality-02 16576172 m, 39065 m/sec, 18181544 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1635 secs. Pages in use: 629
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 415/593 344/2000 NoC3x3-PT-7B-LTLCardinality-02 16785619 m, 41889 m/sec, 18405890 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1640 secs. Pages in use: 633
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 420/593 348/2000 NoC3x3-PT-7B-LTLCardinality-02 16995761 m, 42028 m/sec, 18631290 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1645 secs. Pages in use: 637
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 425/593 352/2000 NoC3x3-PT-7B-LTLCardinality-02 17205921 m, 42032 m/sec, 18856725 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1650 secs. Pages in use: 641
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 430/593 355/2000 NoC3x3-PT-7B-LTLCardinality-02 17415750 m, 41965 m/sec, 19081461 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1655 secs. Pages in use: 644
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 435/593 359/2000 NoC3x3-PT-7B-LTLCardinality-02 17624817 m, 41813 m/sec, 19306056 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1660 secs. Pages in use: 648
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 440/593 363/2000 NoC3x3-PT-7B-LTLCardinality-02 17835144 m, 42065 m/sec, 19531325 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1665 secs. Pages in use: 652
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 445/593 367/2000 NoC3x3-PT-7B-LTLCardinality-02 18045964 m, 42164 m/sec, 19757456 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1670 secs. Pages in use: 656
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 450/593 370/2000 NoC3x3-PT-7B-LTLCardinality-02 18257142 m, 42235 m/sec, 19983949 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1675 secs. Pages in use: 659
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 455/593 374/2000 NoC3x3-PT-7B-LTLCardinality-02 18468319 m, 42235 m/sec, 20210150 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1680 secs. Pages in use: 663
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 460/593 378/2000 NoC3x3-PT-7B-LTLCardinality-02 18679138 m, 42163 m/sec, 20436252 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1685 secs. Pages in use: 667
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 465/593 382/2000 NoC3x3-PT-7B-LTLCardinality-02 18890234 m, 42219 m/sec, 20662696 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1690 secs. Pages in use: 671
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 470/593 386/2000 NoC3x3-PT-7B-LTLCardinality-02 19101194 m, 42192 m/sec, 20888636 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1695 secs. Pages in use: 675
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 475/593 389/2000 NoC3x3-PT-7B-LTLCardinality-02 19305894 m, 40940 m/sec, 21112508 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1700 secs. Pages in use: 678
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 480/593 391/2000 NoC3x3-PT-7B-LTLCardinality-02 19498723 m, 38565 m/sec, 21338308 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1705 secs. Pages in use: 680
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 485/593 394/2000 NoC3x3-PT-7B-LTLCardinality-02 19706223 m, 41500 m/sec, 21562610 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1710 secs. Pages in use: 683
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 490/593 398/2000 NoC3x3-PT-7B-LTLCardinality-02 19915319 m, 41819 m/sec, 21786889 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1715 secs. Pages in use: 687
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 495/593 402/2000 NoC3x3-PT-7B-LTLCardinality-02 20123950 m, 41726 m/sec, 22011133 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1720 secs. Pages in use: 691
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 500/593 405/2000 NoC3x3-PT-7B-LTLCardinality-02 20325534 m, 40316 m/sec, 22237188 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1725 secs. Pages in use: 694
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 505/593 409/2000 NoC3x3-PT-7B-LTLCardinality-02 20526666 m, 40226 m/sec, 22464295 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1730 secs. Pages in use: 698
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 510/593 413/2000 NoC3x3-PT-7B-LTLCardinality-02 20728570 m, 40380 m/sec, 22691668 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1735 secs. Pages in use: 702
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 515/593 416/2000 NoC3x3-PT-7B-LTLCardinality-02 20929935 m, 40273 m/sec, 22917817 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1740 secs. Pages in use: 705
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 520/593 420/2000 NoC3x3-PT-7B-LTLCardinality-02 21131909 m, 40394 m/sec, 23145217 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1745 secs. Pages in use: 709
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 525/593 422/2000 NoC3x3-PT-7B-LTLCardinality-02 21286574 m, 30933 m/sec, 23319001 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1750 secs. Pages in use: 711
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 530/593 423/2000 NoC3x3-PT-7B-LTLCardinality-02 21323049 m, 7295 m/sec, 23360315 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1755 secs. Pages in use: 712
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-08: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-7B-LTLCardinality-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-7B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-00: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-7B-LTLCardinality-13: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 566/593 423/2000 NoC3x3-PT-7B-LTLCardinality-02 21331642 m, 1718 m/sec, 23369587 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1793 secs. Pages in use: 712
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 407 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="NoC3x3-PT-7B"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is NoC3x3-PT-7B, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r247-tall-171654353800659"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/NoC3x3-PT-7B.tgz
mv NoC3x3-PT-7B execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;