About the Execution of LoLA for NoC3x3-PT-3B
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16206.972 | 905624.00 | 903754.00 | 2407.90 | ?????F?????????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r247-tall-171654353700596.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is NoC3x3-PT-3B, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r247-tall-171654353700596
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 920K
-rw-r--r-- 1 mcc users 5.4K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 54K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.1K May 19 07:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 19 16:11 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 19 07:24 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 19 18:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.9K Apr 12 07:27 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 74K Apr 12 07:27 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Apr 12 07:26 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 39K Apr 12 07:26 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:41 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 23 07:41 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 581K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-00
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-01
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-02
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-03
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-04
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-05
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-06
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-07
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-08
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-09
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-10
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-11
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-12
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-13
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-14
FORMULA_NAME NoC3x3-PT-3B-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717087349775
FORMULA NoC3x3-PT-3B-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717088255399
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 63 (type EXCL) for 23 NoC3x3-PT-3B-LTLFireability-05
[[35mlola[0m][I] time limit : 179 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 61 (type FNDP) for 23 NoC3x3-PT-3B-LTLFireability-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 62 (type EQUN) for 23 NoC3x3-PT-3B-LTLFireability-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 63 (type EXCL) for NoC3x3-PT-3B-LTLFireability-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 61 (type FNDP) for NoC3x3-PT-3B-LTLFireability-05 (obsolete)
[[35mlola[0m][W] CANCELED task # 62 (type EQUN) for NoC3x3-PT-3B-LTLFireability-05 (obsolete)
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 NoC3x3-PT-3B-LTLFireability-07
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 68 (type EQUN) for 0 NoC3x3-PT-3B-LTLFireability-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 73 (type EQUN) for 3 NoC3x3-PT-3B-LTLFireability-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 61 (type FNDP) for NoC3x3-PT-3B-LTLFireability-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 68 (type EQUN) for NoC3x3-PT-3B-LTLFireability-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 62 (type EQUN) for NoC3x3-PT-3B-LTLFireability-05
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 73 (type EQUN) for NoC3x3-PT-3B-LTLFireability-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 4/211 3/2000 NoC3x3-PT-3B-LTLFireability-07 329164 m, 65832 m/sec, 634170 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 9/211 8/2000 NoC3x3-PT-3B-LTLFireability-07 815781 m, 97323 m/sec, 1568948 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 14/211 11/2000 NoC3x3-PT-3B-LTLFireability-07 1302867 m, 97417 m/sec, 2503189 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 16 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 19/211 15/2000 NoC3x3-PT-3B-LTLFireability-07 1827478 m, 104922 m/sec, 3511131 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 21 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 24/211 18/2000 NoC3x3-PT-3B-LTLFireability-07 2313188 m, 97142 m/sec, 4442939 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 26 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 29/211 22/2000 NoC3x3-PT-3B-LTLFireability-07 2789466 m, 95255 m/sec, 5356305 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 31 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 34/211 25/2000 NoC3x3-PT-3B-LTLFireability-07 3237977 m, 89702 m/sec, 6207187 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 36 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 39/211 28/2000 NoC3x3-PT-3B-LTLFireability-07 3733620 m, 99128 m/sec, 7146387 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 41 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 44/211 32/2000 NoC3x3-PT-3B-LTLFireability-07 4218723 m, 97020 m/sec, 8076618 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 46 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 49/211 35/2000 NoC3x3-PT-3B-LTLFireability-07 4704149 m, 97085 m/sec, 9008696 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 51 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 54/211 38/2000 NoC3x3-PT-3B-LTLFireability-07 5205845 m, 100339 m/sec, 9971649 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 56 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 59/211 41/2000 NoC3x3-PT-3B-LTLFireability-07 5648878 m, 88606 m/sec, 10816623 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 61 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 64/211 44/2000 NoC3x3-PT-3B-LTLFireability-07 6117131 m, 93650 m/sec, 11697750 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 66 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 69/211 48/2000 NoC3x3-PT-3B-LTLFireability-07 6623572 m, 101288 m/sec, 12669910 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 71 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 74/211 51/2000 NoC3x3-PT-3B-LTLFireability-07 7119725 m, 99230 m/sec, 13622106 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 76 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 79/211 55/2000 NoC3x3-PT-3B-LTLFireability-07 7597652 m, 95585 m/sec, 14539008 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 81 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 84/211 58/2000 NoC3x3-PT-3B-LTLFireability-07 8069064 m, 94282 m/sec, 15443981 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 86 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 89/211 61/2000 NoC3x3-PT-3B-LTLFireability-07 8524422 m, 91071 m/sec, 16312549 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 91 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 94/211 65/2000 NoC3x3-PT-3B-LTLFireability-07 8966936 m, 88502 m/sec, 17182583 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 96 secs. Pages in use: 65
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 99/211 68/2000 NoC3x3-PT-3B-LTLFireability-07 9442988 m, 95210 m/sec, 18096666 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 101 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 104/211 71/2000 NoC3x3-PT-3B-LTLFireability-07 9926465 m, 96695 m/sec, 19024024 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 106 secs. Pages in use: 71
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 109/211 74/2000 NoC3x3-PT-3B-LTLFireability-07 10447712 m, 104249 m/sec, 20025931 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 111 secs. Pages in use: 74
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 114/211 78/2000 NoC3x3-PT-3B-LTLFireability-07 10934723 m, 97402 m/sec, 20960439 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 116 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 119/211 81/2000 NoC3x3-PT-3B-LTLFireability-07 11416280 m, 96311 m/sec, 21884233 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 121 secs. Pages in use: 81
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 124/211 84/2000 NoC3x3-PT-3B-LTLFireability-07 11889182 m, 94580 m/sec, 22792332 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 126 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 129/211 88/2000 NoC3x3-PT-3B-LTLFireability-07 12362153 m, 94594 m/sec, 23700583 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 131 secs. Pages in use: 88
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 134/211 91/2000 NoC3x3-PT-3B-LTLFireability-07 12854448 m, 98459 m/sec, 24645088 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 136 secs. Pages in use: 91
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 139/211 94/2000 NoC3x3-PT-3B-LTLFireability-07 13358858 m, 100882 m/sec, 25613658 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 141 secs. Pages in use: 94
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 144/211 97/2000 NoC3x3-PT-3B-LTLFireability-07 13756580 m, 79544 m/sec, 26439612 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 146 secs. Pages in use: 97
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 149/211 100/2000 NoC3x3-PT-3B-LTLFireability-07 14141680 m, 77020 m/sec, 27277967 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 151 secs. Pages in use: 100
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 154/211 102/2000 NoC3x3-PT-3B-LTLFireability-07 14488382 m, 69340 m/sec, 28133615 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 156 secs. Pages in use: 102
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 159/211 107/2000 NoC3x3-PT-3B-LTLFireability-07 15009770 m, 104277 m/sec, 29145787 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 161 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 164/211 110/2000 NoC3x3-PT-3B-LTLFireability-07 15496158 m, 97277 m/sec, 30079526 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 166 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 169/211 114/2000 NoC3x3-PT-3B-LTLFireability-07 15978617 m, 96491 m/sec, 31005244 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 171 secs. Pages in use: 114
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 174/211 117/2000 NoC3x3-PT-3B-LTLFireability-07 16465635 m, 97403 m/sec, 31939496 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 176 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 179/211 121/2000 NoC3x3-PT-3B-LTLFireability-07 16984983 m, 103869 m/sec, 32937364 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 181 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 184/211 124/2000 NoC3x3-PT-3B-LTLFireability-07 17418950 m, 86793 m/sec, 33766022 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 186 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 189/211 128/2000 NoC3x3-PT-3B-LTLFireability-07 17871643 m, 90538 m/sec, 34616267 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 191 secs. Pages in use: 128
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 194/211 131/2000 NoC3x3-PT-3B-LTLFireability-07 18397157 m, 105102 m/sec, 35624845 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 196 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 199/211 134/2000 NoC3x3-PT-3B-LTLFireability-07 18882435 m, 97055 m/sec, 36555671 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 201 secs. Pages in use: 134
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 204/211 137/2000 NoC3x3-PT-3B-LTLFireability-07 19366603 m, 96833 m/sec, 37484916 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 206 secs. Pages in use: 137
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 209/211 140/2000 NoC3x3-PT-3B-LTLFireability-07 19844345 m, 95548 m/sec, 38402052 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 211 secs. Pages in use: 140
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 34 (type EXCL) for NoC3x3-PT-3B-LTLFireability-07 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 216 secs. Pages in use: 143
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 58 (type EXCL) for 57 NoC3x3-PT-3B-LTLFireability-15
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 NoC3x3-PT-3B-LTLFireability-07
[[35mlola[0m][I] time limit : 3384 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 58 (type EXCL) for NoC3x3-PT-3B-LTLFireability-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 37
[[35mlola[0m][I] fired transitions : 37
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 5/211 5/5 NoC3x3-PT-3B-LTLFireability-07 534229 m, -3862023 m/sec, 1028190 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 221 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 34 (type EXCL) for NoC3x3-PT-3B-LTLFireability-07 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 226 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 54 NoC3x3-PT-3B-LTLFireability-14
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 55 (type EXCL) for NoC3x3-PT-3B-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 37
[[35mlola[0m][I] fired transitions : 37
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 51 NoC3x3-PT-3B-LTLFireability-13
[[35mlola[0m][I] time limit : 241 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 52 (type EXCL) for NoC3x3-PT-3B-LTLFireability-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 37
[[35mlola[0m][I] fired transitions : 37
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 NoC3x3-PT-3B-LTLFireability-11
[[35mlola[0m][I] time limit : 259 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for NoC3x3-PT-3B-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 38
[[35mlola[0m][I] fired transitions : 38
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 NoC3x3-PT-3B-LTLFireability-10
[[35mlola[0m][I] time limit : 281 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 43 (type EXCL) for NoC3x3-PT-3B-LTLFireability-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 37
[[35mlola[0m][I] fired transitions : 37
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 NoC3x3-PT-3B-LTLFireability-08
[[35mlola[0m][I] time limit : 306 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for NoC3x3-PT-3B-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 37
[[35mlola[0m][I] fired transitions : 37
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 NoC3x3-PT-3B-LTLFireability-06
[[35mlola[0m][I] time limit : 337 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 5/337 9/2000 NoC3x3-PT-3B-LTLFireability-06 611676 m, 122335 m/sec, 693037 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 231 secs. Pages in use: 152
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 10/337 18/2000 NoC3x3-PT-3B-LTLFireability-06 1205989 m, 118862 m/sec, 1383356 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 236 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 15/337 23/2000 NoC3x3-PT-3B-LTLFireability-06 1597425 m, 78287 m/sec, 2181393 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 241 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 20/337 24/2000 NoC3x3-PT-3B-LTLFireability-06 1759122 m, 32339 m/sec, 3055595 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 246 secs. Pages in use: 167
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 25/337 25/2000 NoC3x3-PT-3B-LTLFireability-06 1924427 m, 33061 m/sec, 3929653 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 251 secs. Pages in use: 168
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 30/337 27/2000 NoC3x3-PT-3B-LTLFireability-06 2054334 m, 25981 m/sec, 4797619 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 256 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 35/337 28/2000 NoC3x3-PT-3B-LTLFireability-06 2223860 m, 33905 m/sec, 5669175 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 261 secs. Pages in use: 171
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 40/337 29/2000 NoC3x3-PT-3B-LTLFireability-06 2384088 m, 32045 m/sec, 6534761 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 266 secs. Pages in use: 172
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 45/337 31/2000 NoC3x3-PT-3B-LTLFireability-06 2546705 m, 32523 m/sec, 7398870 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 271 secs. Pages in use: 174
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 50/337 32/2000 NoC3x3-PT-3B-LTLFireability-06 2675262 m, 25711 m/sec, 8258812 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 276 secs. Pages in use: 175
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 55/337 33/2000 NoC3x3-PT-3B-LTLFireability-06 2830733 m, 31094 m/sec, 9132527 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 281 secs. Pages in use: 176
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 60/337 34/2000 NoC3x3-PT-3B-LTLFireability-06 2961123 m, 26078 m/sec, 9996752 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 286 secs. Pages in use: 177
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 65/337 36/2000 NoC3x3-PT-3B-LTLFireability-06 3104537 m, 28682 m/sec, 10870328 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 291 secs. Pages in use: 179
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 70/337 37/2000 NoC3x3-PT-3B-LTLFireability-06 3220244 m, 23141 m/sec, 11727447 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 296 secs. Pages in use: 180
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 75/337 38/2000 NoC3x3-PT-3B-LTLFireability-06 3344528 m, 24856 m/sec, 12595264 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 301 secs. Pages in use: 181
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 80/337 39/2000 NoC3x3-PT-3B-LTLFireability-06 3493965 m, 29887 m/sec, 13456925 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 306 secs. Pages in use: 182
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 85/337 40/2000 NoC3x3-PT-3B-LTLFireability-06 3623661 m, 25939 m/sec, 14319640 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 311 secs. Pages in use: 183
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 90/337 41/2000 NoC3x3-PT-3B-LTLFireability-06 3764770 m, 28221 m/sec, 15189101 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 316 secs. Pages in use: 184
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 95/337 42/2000 NoC3x3-PT-3B-LTLFireability-06 3869923 m, 21030 m/sec, 16041906 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 321 secs. Pages in use: 185
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 100/337 43/2000 NoC3x3-PT-3B-LTLFireability-06 4003763 m, 26768 m/sec, 16909334 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 326 secs. Pages in use: 186
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 105/337 45/2000 NoC3x3-PT-3B-LTLFireability-06 4168934 m, 33034 m/sec, 17774062 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 331 secs. Pages in use: 188
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 110/337 46/2000 NoC3x3-PT-3B-LTLFireability-06 4339098 m, 34032 m/sec, 18645067 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 336 secs. Pages in use: 189
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 115/337 47/2000 NoC3x3-PT-3B-LTLFireability-06 4477380 m, 27656 m/sec, 19509028 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 341 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 120/337 49/2000 NoC3x3-PT-3B-LTLFireability-06 4625052 m, 29534 m/sec, 20372665 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 346 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 125/337 50/2000 NoC3x3-PT-3B-LTLFireability-06 4789298 m, 32849 m/sec, 21232354 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 351 secs. Pages in use: 193
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 130/337 52/2000 NoC3x3-PT-3B-LTLFireability-06 4958501 m, 33840 m/sec, 22094868 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 356 secs. Pages in use: 195
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 135/337 53/2000 NoC3x3-PT-3B-LTLFireability-06 5094283 m, 27156 m/sec, 22945422 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 361 secs. Pages in use: 196
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 140/337 54/2000 NoC3x3-PT-3B-LTLFireability-06 5237216 m, 28586 m/sec, 23800848 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 366 secs. Pages in use: 197
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 145/337 55/2000 NoC3x3-PT-3B-LTLFireability-06 5404799 m, 33516 m/sec, 24662197 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 371 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 150/337 57/2000 NoC3x3-PT-3B-LTLFireability-06 5575338 m, 34107 m/sec, 25526385 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 376 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 155/337 58/2000 NoC3x3-PT-3B-LTLFireability-06 5711228 m, 27178 m/sec, 26381124 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 381 secs. Pages in use: 201
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 160/337 59/2000 NoC3x3-PT-3B-LTLFireability-06 5855432 m, 28840 m/sec, 27242017 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 386 secs. Pages in use: 202
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 165/337 61/2000 NoC3x3-PT-3B-LTLFireability-06 6021251 m, 33163 m/sec, 28100756 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 391 secs. Pages in use: 204
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 170/337 62/2000 NoC3x3-PT-3B-LTLFireability-06 6192180 m, 34185 m/sec, 28962631 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 396 secs. Pages in use: 205
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 175/337 63/2000 NoC3x3-PT-3B-LTLFireability-06 6327554 m, 27074 m/sec, 29816701 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 401 secs. Pages in use: 206
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 180/337 65/2000 NoC3x3-PT-3B-LTLFireability-06 6473237 m, 29136 m/sec, 30674860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 406 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 185/337 66/2000 NoC3x3-PT-3B-LTLFireability-06 6635661 m, 32484 m/sec, 31531295 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 411 secs. Pages in use: 209
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 190/337 67/2000 NoC3x3-PT-3B-LTLFireability-06 6806673 m, 34202 m/sec, 32390457 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 416 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 195/337 69/2000 NoC3x3-PT-3B-LTLFireability-06 6941733 m, 27012 m/sec, 33236784 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 421 secs. Pages in use: 212
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 200/337 70/2000 NoC3x3-PT-3B-LTLFireability-06 7086107 m, 28874 m/sec, 34091461 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 426 secs. Pages in use: 213
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 205/337 71/2000 NoC3x3-PT-3B-LTLFireability-06 7236618 m, 30102 m/sec, 34945460 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 431 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 210/337 72/2000 NoC3x3-PT-3B-LTLFireability-06 7367092 m, 26094 m/sec, 35806101 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 436 secs. Pages in use: 215
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 215/337 73/2000 NoC3x3-PT-3B-LTLFireability-06 7505513 m, 27684 m/sec, 36666319 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 441 secs. Pages in use: 216
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 220/337 74/2000 NoC3x3-PT-3B-LTLFireability-06 7610405 m, 20978 m/sec, 37509874 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 446 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 225/337 75/2000 NoC3x3-PT-3B-LTLFireability-06 7739648 m, 25848 m/sec, 38363920 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 451 secs. Pages in use: 218
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 230/337 77/2000 NoC3x3-PT-3B-LTLFireability-06 7873711 m, 26812 m/sec, 39205213 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 456 secs. Pages in use: 220
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 235/337 78/2000 NoC3x3-PT-3B-LTLFireability-06 8016035 m, 28464 m/sec, 40048938 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 461 secs. Pages in use: 221
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 240/337 79/2000 NoC3x3-PT-3B-LTLFireability-06 8149324 m, 26657 m/sec, 40900681 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 466 secs. Pages in use: 222
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 245/337 80/2000 NoC3x3-PT-3B-LTLFireability-06 8256631 m, 21461 m/sec, 41743668 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 471 secs. Pages in use: 223
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 250/337 81/2000 NoC3x3-PT-3B-LTLFireability-06 8387544 m, 26182 m/sec, 42599337 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 476 secs. Pages in use: 224
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 255/337 82/2000 NoC3x3-PT-3B-LTLFireability-06 8522041 m, 26899 m/sec, 43454425 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 481 secs. Pages in use: 225
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 260/337 83/2000 NoC3x3-PT-3B-LTLFireability-06 8665263 m, 28644 m/sec, 44313076 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 486 secs. Pages in use: 226
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 265/337 84/2000 NoC3x3-PT-3B-LTLFireability-06 8790193 m, 24986 m/sec, 45152025 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 491 secs. Pages in use: 227
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 270/337 85/2000 NoC3x3-PT-3B-LTLFireability-06 8899772 m, 21915 m/sec, 45996724 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 496 secs. Pages in use: 228
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 275/337 87/2000 NoC3x3-PT-3B-LTLFireability-06 9037763 m, 27598 m/sec, 46862981 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 501 secs. Pages in use: 230
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 280/337 88/2000 NoC3x3-PT-3B-LTLFireability-06 9183653 m, 29178 m/sec, 47746724 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 506 secs. Pages in use: 231
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 285/337 89/2000 NoC3x3-PT-3B-LTLFireability-06 9340025 m, 31274 m/sec, 48615869 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 511 secs. Pages in use: 232
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 290/337 91/2000 NoC3x3-PT-3B-LTLFireability-06 9506072 m, 33209 m/sec, 49487866 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 516 secs. Pages in use: 234
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 295/337 92/2000 NoC3x3-PT-3B-LTLFireability-06 9648275 m, 28440 m/sec, 50349831 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 521 secs. Pages in use: 235
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 300/337 93/2000 NoC3x3-PT-3B-LTLFireability-06 9788488 m, 28042 m/sec, 51206743 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 526 secs. Pages in use: 236
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 305/337 94/2000 NoC3x3-PT-3B-LTLFireability-06 9915161 m, 25334 m/sec, 52063981 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 531 secs. Pages in use: 237
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 310/337 96/2000 NoC3x3-PT-3B-LTLFireability-06 10036237 m, 24215 m/sec, 52922559 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 536 secs. Pages in use: 239
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 315/337 97/2000 NoC3x3-PT-3B-LTLFireability-06 10155499 m, 23852 m/sec, 53781356 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 541 secs. Pages in use: 240
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 320/337 98/2000 NoC3x3-PT-3B-LTLFireability-06 10294026 m, 27705 m/sec, 54639195 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 546 secs. Pages in use: 241
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 325/337 99/2000 NoC3x3-PT-3B-LTLFireability-06 10432958 m, 27786 m/sec, 55499131 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 551 secs. Pages in use: 242
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 330/337 100/2000 NoC3x3-PT-3B-LTLFireability-06 10548852 m, 23178 m/sec, 56362856 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 556 secs. Pages in use: 243
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 LTL EXCL 335/337 101/2000 NoC3x3-PT-3B-LTLFireability-06 10669829 m, 24195 m/sec, 57219139 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 561 secs. Pages in use: 244
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 31 (type EXCL) for NoC3x3-PT-3B-LTLFireability-06 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 566 secs. Pages in use: 245
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 18 (type EXCL) for 17 NoC3x3-PT-3B-LTLFireability-03
[[35mlola[0m][I] time limit : 337 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 NoC3x3-PT-3B-LTLFireability-06
[[35mlola[0m][I] time limit : 3034 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 18 (type EXCL) for NoC3x3-PT-3B-LTLFireability-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1685
[[35mlola[0m][I] fired transitions : 1850
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] CANCELED task # 31 (type EXCL) for NoC3x3-PT-3B-LTLFireability-06 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-01: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 571 secs. Pages in use: 250
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 10 NoC3x3-PT-3B-LTLFireability-02
[[35mlola[0m][I] time limit : 378 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for NoC3x3-PT-3B-LTLFireability-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 8 (type EXCL) for 3 NoC3x3-PT-3B-LTLFireability-01
[[35mlola[0m][I] time limit : 432 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 8 (type EXCL) for NoC3x3-PT-3B-LTLFireability-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 65 (type EXCL) for 0 NoC3x3-PT-3B-LTLFireability-00
[[35mlola[0m][I] time limit : 504 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 65 (type EXCL) for NoC3x3-PT-3B-LTLFireability-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 70 (type EXCL) for 3 NoC3x3-PT-3B-LTLFireability-01
[[35mlola[0m][I] time limit : 605 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 70 (type EXCL) for NoC3x3-PT-3B-LTLFireability-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 21 (type EXCL) for 20 NoC3x3-PT-3B-LTLFireability-04
[[35mlola[0m][I] time limit : 757 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 21 (type EXCL) for NoC3x3-PT-3B-LTLFireability-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 48 NoC3x3-PT-3B-LTLFireability-12
[[35mlola[0m][I] time limit : 1009 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 5/1009 5/2000 NoC3x3-PT-3B-LTLFireability-12 537004 m, 107400 m/sec, 994000 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 576 secs. Pages in use: 250
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 10/1009 9/2000 NoC3x3-PT-3B-LTLFireability-12 1056217 m, 103842 m/sec, 2035794 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 581 secs. Pages in use: 254
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 15/1009 14/2000 NoC3x3-PT-3B-LTLFireability-12 1617007 m, 112158 m/sec, 3095081 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 586 secs. Pages in use: 259
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 20/1009 18/2000 NoC3x3-PT-3B-LTLFireability-12 2126757 m, 101950 m/sec, 4137006 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 591 secs. Pages in use: 263
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 25/1009 21/2000 NoC3x3-PT-3B-LTLFireability-12 2602595 m, 95167 m/sec, 5203489 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 596 secs. Pages in use: 266
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 30/1009 25/2000 NoC3x3-PT-3B-LTLFireability-12 3075823 m, 94645 m/sec, 6194368 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 601 secs. Pages in use: 270
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 35/1009 29/2000 NoC3x3-PT-3B-LTLFireability-12 3581386 m, 101112 m/sec, 7204710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 606 secs. Pages in use: 274
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 40/1009 34/2000 NoC3x3-PT-3B-LTLFireability-12 4157324 m, 115187 m/sec, 8297286 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 611 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 45/1009 38/2000 NoC3x3-PT-3B-LTLFireability-12 4659287 m, 100392 m/sec, 9306481 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 616 secs. Pages in use: 283
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 50/1009 42/2000 NoC3x3-PT-3B-LTLFireability-12 5199997 m, 108142 m/sec, 10413641 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 621 secs. Pages in use: 287
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 55/1009 46/2000 NoC3x3-PT-3B-LTLFireability-12 5603523 m, 80705 m/sec, 11379610 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 626 secs. Pages in use: 291
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 60/1009 50/2000 NoC3x3-PT-3B-LTLFireability-12 6125723 m, 104440 m/sec, 12379932 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 631 secs. Pages in use: 295
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 65/1009 54/2000 NoC3x3-PT-3B-LTLFireability-12 6649694 m, 104794 m/sec, 13482841 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 636 secs. Pages in use: 299
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 70/1009 58/2000 NoC3x3-PT-3B-LTLFireability-12 7105239 m, 91109 m/sec, 14416846 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 641 secs. Pages in use: 303
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 75/1009 62/2000 NoC3x3-PT-3B-LTLFireability-12 7578843 m, 94720 m/sec, 15391489 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 646 secs. Pages in use: 307
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 80/1009 66/2000 NoC3x3-PT-3B-LTLFireability-12 8051233 m, 94478 m/sec, 16339779 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 651 secs. Pages in use: 311
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 85/1009 69/2000 NoC3x3-PT-3B-LTLFireability-12 8489082 m, 87569 m/sec, 17234124 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 656 secs. Pages in use: 314
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 90/1009 73/2000 NoC3x3-PT-3B-LTLFireability-12 8925658 m, 87315 m/sec, 18145656 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 661 secs. Pages in use: 318
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 95/1009 76/2000 NoC3x3-PT-3B-LTLFireability-12 9394610 m, 93790 m/sec, 19103466 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 666 secs. Pages in use: 321
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 100/1009 80/2000 NoC3x3-PT-3B-LTLFireability-12 9830870 m, 87252 m/sec, 19988217 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 671 secs. Pages in use: 325
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 105/1009 83/2000 NoC3x3-PT-3B-LTLFireability-12 10270860 m, 87998 m/sec, 20899675 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 676 secs. Pages in use: 328
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 110/1009 87/2000 NoC3x3-PT-3B-LTLFireability-12 10744286 m, 94685 m/sec, 21865952 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 681 secs. Pages in use: 332
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 115/1009 90/2000 NoC3x3-PT-3B-LTLFireability-12 11178354 m, 86813 m/sec, 22751226 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 686 secs. Pages in use: 335
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 120/1009 94/2000 NoC3x3-PT-3B-LTLFireability-12 11620966 m, 88522 m/sec, 23653723 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 691 secs. Pages in use: 339
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 125/1009 98/2000 NoC3x3-PT-3B-LTLFireability-12 12106027 m, 97012 m/sec, 24638991 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 696 secs. Pages in use: 343
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 130/1009 101/2000 NoC3x3-PT-3B-LTLFireability-12 12548148 m, 88424 m/sec, 25536111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 701 secs. Pages in use: 346
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 135/1009 104/2000 NoC3x3-PT-3B-LTLFireability-12 12990811 m, 88532 m/sec, 26445206 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 706 secs. Pages in use: 349
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 140/1009 108/2000 NoC3x3-PT-3B-LTLFireability-12 13458960 m, 93629 m/sec, 27410454 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 711 secs. Pages in use: 353
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 145/1009 112/2000 NoC3x3-PT-3B-LTLFireability-12 13932276 m, 94663 m/sec, 28359628 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 716 secs. Pages in use: 357
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 150/1009 115/2000 NoC3x3-PT-3B-LTLFireability-12 14376322 m, 88809 m/sec, 29265641 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 721 secs. Pages in use: 360
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 155/1009 119/2000 NoC3x3-PT-3B-LTLFireability-12 14816376 m, 88010 m/sec, 30185761 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 726 secs. Pages in use: 364
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 160/1009 123/2000 NoC3x3-PT-3B-LTLFireability-12 15291475 m, 95019 m/sec, 31155466 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 731 secs. Pages in use: 368
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 165/1009 126/2000 NoC3x3-PT-3B-LTLFireability-12 15740203 m, 89745 m/sec, 32056954 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 736 secs. Pages in use: 371
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 170/1009 130/2000 NoC3x3-PT-3B-LTLFireability-12 16162522 m, 84463 m/sec, 33023864 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 741 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 175/1009 134/2000 NoC3x3-PT-3B-LTLFireability-12 16685029 m, 104501 m/sec, 34121401 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 746 secs. Pages in use: 379
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 180/1009 138/2000 NoC3x3-PT-3B-LTLFireability-12 17181874 m, 99369 m/sec, 35224872 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 751 secs. Pages in use: 383
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 185/1009 141/2000 NoC3x3-PT-3B-LTLFireability-12 17628751 m, 89375 m/sec, 36224253 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 756 secs. Pages in use: 386
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 190/1009 145/2000 NoC3x3-PT-3B-LTLFireability-12 18117397 m, 97729 m/sec, 37288307 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 761 secs. Pages in use: 390
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 195/1009 149/2000 NoC3x3-PT-3B-LTLFireability-12 18649479 m, 106416 m/sec, 38350748 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 766 secs. Pages in use: 394
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 200/1009 153/2000 NoC3x3-PT-3B-LTLFireability-12 19071576 m, 84419 m/sec, 39343102 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 771 secs. Pages in use: 398
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 205/1009 156/2000 NoC3x3-PT-3B-LTLFireability-12 19447537 m, 75192 m/sec, 40229001 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 776 secs. Pages in use: 401
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 210/1009 159/2000 NoC3x3-PT-3B-LTLFireability-12 19866589 m, 83810 m/sec, 41174269 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 781 secs. Pages in use: 404
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 215/1009 162/2000 NoC3x3-PT-3B-LTLFireability-12 20273315 m, 81345 m/sec, 42124850 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 786 secs. Pages in use: 407
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 220/1009 167/2000 NoC3x3-PT-3B-LTLFireability-12 20771455 m, 99628 m/sec, 43097817 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 791 secs. Pages in use: 412
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 225/1009 170/2000 NoC3x3-PT-3B-LTLFireability-12 21246206 m, 94950 m/sec, 44128312 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 796 secs. Pages in use: 415
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 230/1009 174/2000 NoC3x3-PT-3B-LTLFireability-12 21710673 m, 92893 m/sec, 45155171 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 801 secs. Pages in use: 419
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 235/1009 177/2000 NoC3x3-PT-3B-LTLFireability-12 22155889 m, 89043 m/sec, 46222791 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 806 secs. Pages in use: 422
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 240/1009 181/2000 NoC3x3-PT-3B-LTLFireability-12 22603187 m, 89459 m/sec, 47314199 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 811 secs. Pages in use: 426
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 245/1009 185/2000 NoC3x3-PT-3B-LTLFireability-12 23058546 m, 91071 m/sec, 48339641 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 816 secs. Pages in use: 430
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 250/1009 189/2000 NoC3x3-PT-3B-LTLFireability-12 23561554 m, 100601 m/sec, 49342929 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 821 secs. Pages in use: 434
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 255/1009 193/2000 NoC3x3-PT-3B-LTLFireability-12 24130583 m, 113805 m/sec, 50426459 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 826 secs. Pages in use: 438
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 260/1009 197/2000 NoC3x3-PT-3B-LTLFireability-12 24648767 m, 103636 m/sec, 51423688 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 831 secs. Pages in use: 442
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 265/1009 201/2000 NoC3x3-PT-3B-LTLFireability-12 25170066 m, 104259 m/sec, 52530051 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 836 secs. Pages in use: 446
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 270/1009 205/2000 NoC3x3-PT-3B-LTLFireability-12 25568284 m, 79643 m/sec, 53484757 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 841 secs. Pages in use: 450
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 275/1009 209/2000 NoC3x3-PT-3B-LTLFireability-12 26100546 m, 106452 m/sec, 54476044 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 846 secs. Pages in use: 454
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 280/1009 213/2000 NoC3x3-PT-3B-LTLFireability-12 26634612 m, 106813 m/sec, 55549497 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 851 secs. Pages in use: 458
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 285/1009 217/2000 NoC3x3-PT-3B-LTLFireability-12 27169018 m, 106881 m/sec, 56556368 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 856 secs. Pages in use: 462
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 290/1009 222/2000 NoC3x3-PT-3B-LTLFireability-12 27673809 m, 100958 m/sec, 57587591 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 861 secs. Pages in use: 467
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 295/1009 225/2000 NoC3x3-PT-3B-LTLFireability-12 28111980 m, 87634 m/sec, 58622865 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 866 secs. Pages in use: 470
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 300/1009 229/2000 NoC3x3-PT-3B-LTLFireability-12 28597838 m, 97171 m/sec, 59608373 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 871 secs. Pages in use: 474
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 305/1009 233/2000 NoC3x3-PT-3B-LTLFireability-12 29086481 m, 97728 m/sec, 60601092 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 876 secs. Pages in use: 478
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 310/1009 237/2000 NoC3x3-PT-3B-LTLFireability-12 29613762 m, 105456 m/sec, 61694269 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 881 secs. Pages in use: 482
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 315/1009 241/2000 NoC3x3-PT-3B-LTLFireability-12 30060337 m, 89315 m/sec, 62616927 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 886 secs. Pages in use: 486
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 320/1009 244/2000 NoC3x3-PT-3B-LTLFireability-12 30416687 m, 71270 m/sec, 63336461 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 891 secs. Pages in use: 489
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-00: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-01: CONJ false state space / EG[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-3B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-02: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-06: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-3B-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 333/1009 245/2000 NoC3x3-PT-3B-LTLFireability-12 30566488 m, 29960 m/sec, 63664382 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 904 secs. Pages in use: 490
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 406 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="NoC3x3-PT-3B"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is NoC3x3-PT-3B, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r247-tall-171654353700596"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/NoC3x3-PT-3B.tgz
mv NoC3x3-PT-3B execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;