About the Execution of LoLA for NoC3x3-PT-2B
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 0.000 | 1572275.00 | 0.00 | 0.00 | F???????????F?F? | normal |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r247-tall-171654353700580.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is NoC3x3-PT-2B, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r247-tall-171654353700580
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1008K
-rw-r--r-- 1 mcc users 8.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 97K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K May 19 07:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K May 19 16:11 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 19 07:24 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 19 18:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.0K Apr 12 06:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 69K Apr 12 06:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Apr 12 06:55 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 102K Apr 12 06:55 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:41 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 23 07:41 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 548K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-00
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-01
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-02
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-03
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-04
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-05
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-06
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-07
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-08
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-09
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-10
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-11
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-12
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-13
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-14
FORMULA_NAME NoC3x3-PT-2B-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717086279860
FORMULA NoC3x3-PT-2B-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-2B-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-2B-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717087852135
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 21 (type CNST) for 18 NoC3x3-PT-2B-LTLFireability-06
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 56 (type CNST) for 53 NoC3x3-PT-2B-LTLFireability-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 21 (type CNST) for NoC3x3-PT-2B-LTLFireability-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 56 (type CNST) for NoC3x3-PT-2B-LTLFireability-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 63 (type EXCL) for 44 NoC3x3-PT-2B-LTLFireability-12
[[35mlola[0m][I] time limit : 199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 61 (type FNDP) for 44 NoC3x3-PT-2B-LTLFireability-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 62 (type EQUN) for 44 NoC3x3-PT-2B-LTLFireability-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 61 (type FNDP) for NoC3x3-PT-2B-LTLFireability-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 62 (type EQUN) for NoC3x3-PT-2B-LTLFireability-12 (obsolete)
[[35mlola[0m][W] CANCELED task # 63 (type EXCL) for NoC3x3-PT-2B-LTLFireability-12 (obsolete)
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 NoC3x3-PT-2B-LTLFireability-00
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for NoC3x3-PT-2B-LTLFireability-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1085
[[35mlola[0m][I] fired transitions : 1648
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 NoC3x3-PT-2B-LTLFireability-14
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 51 (type EXCL) for NoC3x3-PT-2B-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 43
[[35mlola[0m][I] fired transitions : 43
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 58 (type EXCL) for 53 NoC3x3-PT-2B-LTLFireability-15
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 62 (type EQUN) for NoC3x3-PT-2B-LTLFireability-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 4/257 8/2000 NoC3x3-PT-2B-LTLFireability-15 398128 m, 79625 m/sec, 459525 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 9/257 17/2000 NoC3x3-PT-2B-LTLFireability-15 973565 m, 115087 m/sec, 1136512 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 14/257 26/2000 NoC3x3-PT-2B-LTLFireability-15 1514266 m, 108140 m/sec, 1804760 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 16 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 19/257 35/2000 NoC3x3-PT-2B-LTLFireability-15 2057189 m, 108584 m/sec, 2443845 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 21 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 24/257 43/2000 NoC3x3-PT-2B-LTLFireability-15 2597651 m, 108092 m/sec, 3080360 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 26 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 29/257 52/2000 NoC3x3-PT-2B-LTLFireability-15 3158549 m, 112179 m/sec, 3740611 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 31 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 34/257 61/2000 NoC3x3-PT-2B-LTLFireability-15 3734617 m, 115213 m/sec, 4418652 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 36 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 39/257 72/2000 NoC3x3-PT-2B-LTLFireability-15 4356655 m, 124407 m/sec, 5149073 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 41 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 44/257 82/2000 NoC3x3-PT-2B-LTLFireability-15 4957213 m, 120111 m/sec, 5865878 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 46 secs. Pages in use: 82
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 49/257 91/2000 NoC3x3-PT-2B-LTLFireability-15 5544741 m, 117505 m/sec, 6569208 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 51 secs. Pages in use: 91
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 54/257 100/2000 NoC3x3-PT-2B-LTLFireability-15 6126719 m, 116395 m/sec, 7258211 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 56 secs. Pages in use: 100
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 59/257 109/2000 NoC3x3-PT-2B-LTLFireability-15 6689982 m, 112652 m/sec, 7951365 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 61 secs. Pages in use: 109
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 64/257 118/2000 NoC3x3-PT-2B-LTLFireability-15 7253393 m, 112682 m/sec, 8652546 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 66 secs. Pages in use: 118
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 69/257 127/2000 NoC3x3-PT-2B-LTLFireability-15 7832228 m, 115767 m/sec, 9334427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 71 secs. Pages in use: 127
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 74/257 137/2000 NoC3x3-PT-2B-LTLFireability-15 8439277 m, 121409 m/sec, 10035903 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 76 secs. Pages in use: 137
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 79/257 143/2000 NoC3x3-PT-2B-LTLFireability-15 8862838 m, 84712 m/sec, 10853102 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 81 secs. Pages in use: 143
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 84/257 145/2000 NoC3x3-PT-2B-LTLFireability-15 9052640 m, 37960 m/sec, 11761977 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 86 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 89/257 146/2000 NoC3x3-PT-2B-LTLFireability-15 9242217 m, 37915 m/sec, 12669244 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 91 secs. Pages in use: 146
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 94/257 148/2000 NoC3x3-PT-2B-LTLFireability-15 9439426 m, 39441 m/sec, 13578582 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 96 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 99/257 150/2000 NoC3x3-PT-2B-LTLFireability-15 9607911 m, 33697 m/sec, 14485839 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 101 secs. Pages in use: 150
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 104/257 151/2000 NoC3x3-PT-2B-LTLFireability-15 9769824 m, 32382 m/sec, 15392072 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 106 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 109/257 153/2000 NoC3x3-PT-2B-LTLFireability-15 9921613 m, 30357 m/sec, 16297950 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 111 secs. Pages in use: 153
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 114/257 154/2000 NoC3x3-PT-2B-LTLFireability-15 10072924 m, 30262 m/sec, 17206898 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 116 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 119/257 156/2000 NoC3x3-PT-2B-LTLFireability-15 10221590 m, 29733 m/sec, 18112218 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 121 secs. Pages in use: 156
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 124/257 157/2000 NoC3x3-PT-2B-LTLFireability-15 10367770 m, 29236 m/sec, 19018982 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 126 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 129/257 159/2000 NoC3x3-PT-2B-LTLFireability-15 10511310 m, 28708 m/sec, 19926552 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 131 secs. Pages in use: 159
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 134/257 160/2000 NoC3x3-PT-2B-LTLFireability-15 10653034 m, 28344 m/sec, 20834727 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 136 secs. Pages in use: 160
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 139/257 161/2000 NoC3x3-PT-2B-LTLFireability-15 10789702 m, 27333 m/sec, 21741496 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 141 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 144/257 163/2000 NoC3x3-PT-2B-LTLFireability-15 10922639 m, 26587 m/sec, 22654430 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 146 secs. Pages in use: 163
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 149/257 164/2000 NoC3x3-PT-2B-LTLFireability-15 11056883 m, 26848 m/sec, 23558186 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 151 secs. Pages in use: 164
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 154/257 165/2000 NoC3x3-PT-2B-LTLFireability-15 11189171 m, 26457 m/sec, 24463885 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 156 secs. Pages in use: 165
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 159/257 166/2000 NoC3x3-PT-2B-LTLFireability-15 11323024 m, 26770 m/sec, 25365111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 161 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 164/257 168/2000 NoC3x3-PT-2B-LTLFireability-15 11453550 m, 26105 m/sec, 26267189 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 166 secs. Pages in use: 168
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 169/257 169/2000 NoC3x3-PT-2B-LTLFireability-15 11581680 m, 25626 m/sec, 27171455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 171 secs. Pages in use: 169
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 174/257 170/2000 NoC3x3-PT-2B-LTLFireability-15 11709622 m, 25588 m/sec, 28078742 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 176 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 179/257 171/2000 NoC3x3-PT-2B-LTLFireability-15 11835387 m, 25153 m/sec, 28990822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 181 secs. Pages in use: 171
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 184/257 173/2000 NoC3x3-PT-2B-LTLFireability-15 11959396 m, 24801 m/sec, 29894781 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 186 secs. Pages in use: 173
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 189/257 174/2000 NoC3x3-PT-2B-LTLFireability-15 12081948 m, 24510 m/sec, 30805292 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 191 secs. Pages in use: 174
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 194/257 175/2000 NoC3x3-PT-2B-LTLFireability-15 12208523 m, 25315 m/sec, 31711505 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 196 secs. Pages in use: 175
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 199/257 176/2000 NoC3x3-PT-2B-LTLFireability-15 12333673 m, 25030 m/sec, 32620189 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 201 secs. Pages in use: 176
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 204/257 177/2000 NoC3x3-PT-2B-LTLFireability-15 12457313 m, 24728 m/sec, 33523005 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 206 secs. Pages in use: 177
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 209/257 179/2000 NoC3x3-PT-2B-LTLFireability-15 12584163 m, 25370 m/sec, 34426186 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 211 secs. Pages in use: 179
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 214/257 180/2000 NoC3x3-PT-2B-LTLFireability-15 12704556 m, 24078 m/sec, 35329403 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 216 secs. Pages in use: 180
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 219/257 181/2000 NoC3x3-PT-2B-LTLFireability-15 12829977 m, 25084 m/sec, 36226906 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 221 secs. Pages in use: 181
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 224/257 182/2000 NoC3x3-PT-2B-LTLFireability-15 12951237 m, 24252 m/sec, 37127944 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 226 secs. Pages in use: 182
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 229/257 183/2000 NoC3x3-PT-2B-LTLFireability-15 13071563 m, 24065 m/sec, 38031846 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 231 secs. Pages in use: 183
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 234/257 184/2000 NoC3x3-PT-2B-LTLFireability-15 13193987 m, 24484 m/sec, 38935301 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 236 secs. Pages in use: 184
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 239/257 186/2000 NoC3x3-PT-2B-LTLFireability-15 13315026 m, 24207 m/sec, 39845201 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 241 secs. Pages in use: 186
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 244/257 187/2000 NoC3x3-PT-2B-LTLFireability-15 13432981 m, 23591 m/sec, 40749303 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 246 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 249/257 188/2000 NoC3x3-PT-2B-LTLFireability-15 13556074 m, 24618 m/sec, 41648173 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 251 secs. Pages in use: 188
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 254/257 189/2000 NoC3x3-PT-2B-LTLFireability-15 13666476 m, 22080 m/sec, 42562630 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 256 secs. Pages in use: 189
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 58 (type EXCL) for NoC3x3-PT-2B-LTLFireability-15 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 261 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 47 NoC3x3-PT-2B-LTLFireability-13
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 58 (type EXCL) for 53 NoC3x3-PT-2B-LTLFireability-15
[[35mlola[0m][I] time limit : 3339 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for NoC3x3-PT-2B-LTLFireability-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 44
[[35mlola[0m][I] fired transitions : 44
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] CANCELED task # 58 (type EXCL) for NoC3x3-PT-2B-LTLFireability-15 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 266 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 41 NoC3x3-PT-2B-LTLFireability-11
[[35mlola[0m][I] time limit : 277 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 42 (type EXCL) for NoC3x3-PT-2B-LTLFireability-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 38 NoC3x3-PT-2B-LTLFireability-10
[[35mlola[0m][I] time limit : 303 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 5/303 11/2000 NoC3x3-PT-2B-LTLFireability-10 621112 m, 124222 m/sec, 721335 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 271 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 10/303 21/2000 NoC3x3-PT-2B-LTLFireability-10 1183192 m, 112416 m/sec, 1414427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 276 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 15/303 30/2000 NoC3x3-PT-2B-LTLFireability-10 1749320 m, 113225 m/sec, 2081669 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 281 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 20/303 38/2000 NoC3x3-PT-2B-LTLFireability-10 2295268 m, 109189 m/sec, 2724223 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 286 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 25/303 47/2000 NoC3x3-PT-2B-LTLFireability-10 2853333 m, 111613 m/sec, 3381525 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 291 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 30/303 56/2000 NoC3x3-PT-2B-LTLFireability-10 3430902 m, 115513 m/sec, 4060873 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 296 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 35/303 66/2000 NoC3x3-PT-2B-LTLFireability-10 4034522 m, 120724 m/sec, 4768808 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 301 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 40/303 77/2000 NoC3x3-PT-2B-LTLFireability-10 4645816 m, 122258 m/sec, 5489670 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 306 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 45/303 86/2000 NoC3x3-PT-2B-LTLFireability-10 5238995 m, 118635 m/sec, 6210639 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 311 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 50/303 95/2000 NoC3x3-PT-2B-LTLFireability-10 5828934 m, 117987 m/sec, 6905329 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 316 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 55/303 104/2000 NoC3x3-PT-2B-LTLFireability-10 6399500 m, 114113 m/sec, 7608835 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 321 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 60/303 114/2000 NoC3x3-PT-2B-LTLFireability-10 6979907 m, 116081 m/sec, 8298459 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 326 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 65/303 123/2000 NoC3x3-PT-2B-LTLFireability-10 7548013 m, 113621 m/sec, 9000143 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 331 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 70/303 132/2000 NoC3x3-PT-2B-LTLFireability-10 8131777 m, 116752 m/sec, 9687436 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 336 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 75/303 142/2000 NoC3x3-PT-2B-LTLFireability-10 8749345 m, 123513 m/sec, 10414120 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 341 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 80/303 144/2000 NoC3x3-PT-2B-LTLFireability-10 8961906 m, 42512 m/sec, 11324505 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 346 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 85/303 145/2000 NoC3x3-PT-2B-LTLFireability-10 9152542 m, 38127 m/sec, 12237588 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 351 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 90/303 147/2000 NoC3x3-PT-2B-LTLFireability-10 9352560 m, 40003 m/sec, 13149293 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 356 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 95/303 149/2000 NoC3x3-PT-2B-LTLFireability-10 9530269 m, 35541 m/sec, 14057429 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 361 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 100/303 151/2000 NoC3x3-PT-2B-LTLFireability-10 9694101 m, 32766 m/sec, 14963379 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 366 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 105/303 152/2000 NoC3x3-PT-2B-LTLFireability-10 9847690 m, 30717 m/sec, 15856056 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 371 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 110/303 154/2000 NoC3x3-PT-2B-LTLFireability-10 9998397 m, 30141 m/sec, 16763246 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 376 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 115/303 155/2000 NoC3x3-PT-2B-LTLFireability-10 10146780 m, 29676 m/sec, 17653056 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 381 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 120/303 156/2000 NoC3x3-PT-2B-LTLFireability-10 10292290 m, 29102 m/sec, 18548356 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 386 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 125/303 158/2000 NoC3x3-PT-2B-LTLFireability-10 10434162 m, 28374 m/sec, 19443240 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 391 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 130/303 159/2000 NoC3x3-PT-2B-LTLFireability-10 10578509 m, 28869 m/sec, 20345754 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 396 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 135/303 161/2000 NoC3x3-PT-2B-LTLFireability-10 10715912 m, 27480 m/sec, 21244406 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 401 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 140/303 162/2000 NoC3x3-PT-2B-LTLFireability-10 10851006 m, 27018 m/sec, 22156820 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 406 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 145/303 163/2000 NoC3x3-PT-2B-LTLFireability-10 10985840 m, 26966 m/sec, 23073447 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 411 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 150/303 164/2000 NoC3x3-PT-2B-LTLFireability-10 11118998 m, 26631 m/sec, 23986266 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 416 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 155/303 166/2000 NoC3x3-PT-2B-LTLFireability-10 11253551 m, 26910 m/sec, 24892359 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 421 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 160/303 167/2000 NoC3x3-PT-2B-LTLFireability-10 11386592 m, 26608 m/sec, 25796624 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 426 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 165/303 168/2000 NoC3x3-PT-2B-LTLFireability-10 11514777 m, 25637 m/sec, 26696019 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 431 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 170/303 169/2000 NoC3x3-PT-2B-LTLFireability-10 11641059 m, 25256 m/sec, 27602267 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 436 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 175/303 171/2000 NoC3x3-PT-2B-LTLFireability-10 11772353 m, 26258 m/sec, 28515404 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 441 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 180/303 172/2000 NoC3x3-PT-2B-LTLFireability-10 11895667 m, 24662 m/sec, 29433067 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 446 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 185/303 173/2000 NoC3x3-PT-2B-LTLFireability-10 12020967 m, 25060 m/sec, 30336063 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 451 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 190/303 174/2000 NoC3x3-PT-2B-LTLFireability-10 12143826 m, 24571 m/sec, 31246764 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 456 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 195/303 175/2000 NoC3x3-PT-2B-LTLFireability-10 12271199 m, 25474 m/sec, 32154644 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 461 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 200/303 177/2000 NoC3x3-PT-2B-LTLFireability-10 12398063 m, 25372 m/sec, 33062566 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 466 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 205/303 178/2000 NoC3x3-PT-2B-LTLFireability-10 12521335 m, 24654 m/sec, 33967894 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 471 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 210/303 179/2000 NoC3x3-PT-2B-LTLFireability-10 12645990 m, 24931 m/sec, 34882508 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 476 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 215/303 180/2000 NoC3x3-PT-2B-LTLFireability-10 12770349 m, 24871 m/sec, 35786352 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 481 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 220/303 181/2000 NoC3x3-PT-2B-LTLFireability-10 12895124 m, 24955 m/sec, 36690265 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 486 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 225/303 183/2000 NoC3x3-PT-2B-LTLFireability-10 13016630 m, 24301 m/sec, 37592069 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 491 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 230/303 184/2000 NoC3x3-PT-2B-LTLFireability-10 13139122 m, 24498 m/sec, 38503553 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 496 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 235/303 185/2000 NoC3x3-PT-2B-LTLFireability-10 13261482 m, 24472 m/sec, 39414936 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 501 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 240/303 186/2000 NoC3x3-PT-2B-LTLFireability-10 13381042 m, 23912 m/sec, 40330180 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 506 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 245/303 187/2000 NoC3x3-PT-2B-LTLFireability-10 13502715 m, 24334 m/sec, 41237774 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 511 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 250/303 188/2000 NoC3x3-PT-2B-LTLFireability-10 13621054 m, 23667 m/sec, 42156038 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 516 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 255/303 189/2000 NoC3x3-PT-2B-LTLFireability-10 13738020 m, 23393 m/sec, 43074872 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 521 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 260/303 191/2000 NoC3x3-PT-2B-LTLFireability-10 13858599 m, 24115 m/sec, 43986088 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 526 secs. Pages in use: 191
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 265/303 192/2000 NoC3x3-PT-2B-LTLFireability-10 13976891 m, 23658 m/sec, 44898624 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 531 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 270/303 193/2000 NoC3x3-PT-2B-LTLFireability-10 14098617 m, 24345 m/sec, 45808892 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 536 secs. Pages in use: 193
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 275/303 194/2000 NoC3x3-PT-2B-LTLFireability-10 14215385 m, 23353 m/sec, 46717814 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 541 secs. Pages in use: 194
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 280/303 195/2000 NoC3x3-PT-2B-LTLFireability-10 14335133 m, 23949 m/sec, 47626862 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 546 secs. Pages in use: 195
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 285/303 196/2000 NoC3x3-PT-2B-LTLFireability-10 14449998 m, 22973 m/sec, 48540219 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 551 secs. Pages in use: 196
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 290/303 197/2000 NoC3x3-PT-2B-LTLFireability-10 14567244 m, 23449 m/sec, 49443118 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 556 secs. Pages in use: 197
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 295/303 198/2000 NoC3x3-PT-2B-LTLFireability-10 14682743 m, 23099 m/sec, 50356222 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 561 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 LTL EXCL 300/303 199/2000 NoC3x3-PT-2B-LTLFireability-10 14800866 m, 23624 m/sec, 51257371 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 566 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 39 (type EXCL) for NoC3x3-PT-2B-LTLFireability-10 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 571 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 36 (type EXCL) for 31 NoC3x3-PT-2B-LTLFireability-09
[[35mlola[0m][I] time limit : 302 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 38 NoC3x3-PT-2B-LTLFireability-10
[[35mlola[0m][I] time limit : 3029 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] CANCELED task # 39 (type EXCL) for NoC3x3-PT-2B-LTLFireability-10 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 5/302 12/2000 NoC3x3-PT-2B-LTLFireability-09 625210 m, 125042 m/sec, 726283 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 576 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 10/302 21/2000 NoC3x3-PT-2B-LTLFireability-09 1192313 m, 113420 m/sec, 1425250 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 581 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 15/302 30/2000 NoC3x3-PT-2B-LTLFireability-09 1761381 m, 113813 m/sec, 2095826 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 586 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 20/302 39/2000 NoC3x3-PT-2B-LTLFireability-09 2310270 m, 109777 m/sec, 2741963 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 591 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 25/302 47/2000 NoC3x3-PT-2B-LTLFireability-09 2871448 m, 112235 m/sec, 3403727 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 596 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 30/302 57/2000 NoC3x3-PT-2B-LTLFireability-09 3452130 m, 116136 m/sec, 4085991 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 601 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 35/302 67/2000 NoC3x3-PT-2B-LTLFireability-09 4063233 m, 122220 m/sec, 4802397 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 606 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 40/302 77/2000 NoC3x3-PT-2B-LTLFireability-09 4678008 m, 122955 m/sec, 5527752 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 611 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 45/302 87/2000 NoC3x3-PT-2B-LTLFireability-09 5274959 m, 119390 m/sec, 6252903 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 616 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 50/302 96/2000 NoC3x3-PT-2B-LTLFireability-09 5868509 m, 118710 m/sec, 6951977 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 621 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 55/302 105/2000 NoC3x3-PT-2B-LTLFireability-09 6444975 m, 115293 m/sec, 7662821 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 626 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 60/302 114/2000 NoC3x3-PT-2B-LTLFireability-09 7025904 m, 116185 m/sec, 8356947 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 631 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 65/302 124/2000 NoC3x3-PT-2B-LTLFireability-09 7598439 m, 114507 m/sec, 9059471 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 636 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 70/302 133/2000 NoC3x3-PT-2B-LTLFireability-09 8191878 m, 118687 m/sec, 9755971 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 641 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 75/302 143/2000 NoC3x3-PT-2B-LTLFireability-09 8776935 m, 117011 m/sec, 10509007 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 646 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 80/302 144/2000 NoC3x3-PT-2B-LTLFireability-09 8984895 m, 41592 m/sec, 11427822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 651 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 85/302 146/2000 NoC3x3-PT-2B-LTLFireability-09 9176847 m, 38390 m/sec, 12345014 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 656 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 90/302 147/2000 NoC3x3-PT-2B-LTLFireability-09 9376390 m, 39908 m/sec, 13262172 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 661 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 95/302 149/2000 NoC3x3-PT-2B-LTLFireability-09 9552216 m, 35165 m/sec, 14178367 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 666 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 100/302 151/2000 NoC3x3-PT-2B-LTLFireability-09 9717005 m, 32957 m/sec, 15094942 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 671 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 105/302 152/2000 NoC3x3-PT-2B-LTLFireability-09 9872850 m, 31169 m/sec, 16007005 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 676 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 110/302 154/2000 NoC3x3-PT-2B-LTLFireability-09 10021316 m, 29693 m/sec, 16904106 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 681 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 115/302 155/2000 NoC3x3-PT-2B-LTLFireability-09 10170650 m, 29866 m/sec, 17800278 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 686 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 120/302 157/2000 NoC3x3-PT-2B-LTLFireability-09 10317670 m, 29404 m/sec, 18708010 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 691 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 125/302 158/2000 NoC3x3-PT-2B-LTLFireability-09 10461730 m, 28812 m/sec, 19615863 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 696 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 130/302 160/2000 NoC3x3-PT-2B-LTLFireability-09 10607142 m, 29082 m/sec, 20532189 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 701 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 135/302 161/2000 NoC3x3-PT-2B-LTLFireability-09 10744880 m, 27547 m/sec, 21439631 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 706 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 140/302 162/2000 NoC3x3-PT-2B-LTLFireability-09 10880141 m, 27052 m/sec, 22350990 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 711 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 145/302 163/2000 NoC3x3-PT-2B-LTLFireability-09 11013887 m, 26749 m/sec, 23261341 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 716 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 150/302 165/2000 NoC3x3-PT-2B-LTLFireability-09 11146211 m, 26464 m/sec, 24175452 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 721 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 155/302 166/2000 NoC3x3-PT-2B-LTLFireability-09 11281846 m, 27127 m/sec, 25083029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 726 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 160/302 167/2000 NoC3x3-PT-2B-LTLFireability-09 11415042 m, 26639 m/sec, 25991899 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 731 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 165/302 169/2000 NoC3x3-PT-2B-LTLFireability-09 11545157 m, 26023 m/sec, 26902822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 736 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 170/302 170/2000 NoC3x3-PT-2B-LTLFireability-09 11673159 m, 25600 m/sec, 27817045 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 741 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 175/302 171/2000 NoC3x3-PT-2B-LTLFireability-09 11800815 m, 25531 m/sec, 28735302 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 746 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 180/302 172/2000 NoC3x3-PT-2B-LTLFireability-09 11926458 m, 25128 m/sec, 29651173 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 751 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 185/302 173/2000 NoC3x3-PT-2B-LTLFireability-09 12051714 m, 25051 m/sec, 30563207 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 756 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 190/302 175/2000 NoC3x3-PT-2B-LTLFireability-09 12177754 m, 25208 m/sec, 31483091 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 761 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 195/302 176/2000 NoC3x3-PT-2B-LTLFireability-09 12303578 m, 25164 m/sec, 32398444 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 766 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 200/302 177/2000 NoC3x3-PT-2B-LTLFireability-09 12430627 m, 25409 m/sec, 33308507 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 771 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 205/302 178/2000 NoC3x3-PT-2B-LTLFireability-09 12557756 m, 25425 m/sec, 34219050 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 776 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 210/302 180/2000 NoC3x3-PT-2B-LTLFireability-09 12679438 m, 24336 m/sec, 35130877 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 781 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 215/302 181/2000 NoC3x3-PT-2B-LTLFireability-09 12805961 m, 25304 m/sec, 36040421 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 786 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 220/302 182/2000 NoC3x3-PT-2B-LTLFireability-09 12927009 m, 24209 m/sec, 36938832 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 791 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 225/302 183/2000 NoC3x3-PT-2B-LTLFireability-09 13048740 m, 24346 m/sec, 37840189 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 796 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 230/302 184/2000 NoC3x3-PT-2B-LTLFireability-09 13171070 m, 24466 m/sec, 38746230 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 801 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 235/302 185/2000 NoC3x3-PT-2B-LTLFireability-09 13290951 m, 23976 m/sec, 39655076 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 806 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 240/302 186/2000 NoC3x3-PT-2B-LTLFireability-09 13411024 m, 24014 m/sec, 40562874 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 811 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 245/302 188/2000 NoC3x3-PT-2B-LTLFireability-09 13534829 m, 24761 m/sec, 41466993 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 816 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 250/302 189/2000 NoC3x3-PT-2B-LTLFireability-09 13647247 m, 22483 m/sec, 42385816 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 821 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 255/302 190/2000 NoC3x3-PT-2B-LTLFireability-09 13768605 m, 24271 m/sec, 43303110 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 826 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 260/302 191/2000 NoC3x3-PT-2B-LTLFireability-09 13886836 m, 23646 m/sec, 44216634 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 831 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 265/302 192/2000 NoC3x3-PT-2B-LTLFireability-09 14007901 m, 24213 m/sec, 45121674 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 836 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 270/302 193/2000 NoC3x3-PT-2B-LTLFireability-09 14130026 m, 24425 m/sec, 46045671 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 841 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 275/302 194/2000 NoC3x3-PT-2B-LTLFireability-09 14247830 m, 23560 m/sec, 46960786 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 846 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 280/302 196/2000 NoC3x3-PT-2B-LTLFireability-09 14365966 m, 23627 m/sec, 47862107 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 851 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 285/302 197/2000 NoC3x3-PT-2B-LTLFireability-09 14480091 m, 22825 m/sec, 48766984 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 856 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 290/302 198/2000 NoC3x3-PT-2B-LTLFireability-09 14598490 m, 23679 m/sec, 49668133 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 861 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 295/302 199/2000 NoC3x3-PT-2B-LTLFireability-09 14711446 m, 22591 m/sec, 50581516 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 866 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 300/302 200/2000 NoC3x3-PT-2B-LTLFireability-09 14829579 m, 23626 m/sec, 51482940 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 871 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 36 (type EXCL) for NoC3x3-PT-2B-LTLFireability-09 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 1 0 0 2 1 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 876 secs. Pages in use: 201
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 31 NoC3x3-PT-2B-LTLFireability-09
[[35mlola[0m][I] time limit : 302 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 36 (type EXCL) for 31 NoC3x3-PT-2B-LTLFireability-09
[[35mlola[0m][I] time limit : 2724 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] CANCELED task # 36 (type EXCL) for NoC3x3-PT-2B-LTLFireability-09 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 5/302 10/2000 NoC3x3-PT-2B-LTLFireability-09 518806 m, 103761 m/sec, 601060 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 881 secs. Pages in use: 213
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 10/302 19/2000 NoC3x3-PT-2B-LTLFireability-09 1086033 m, 113445 m/sec, 1276353 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 886 secs. Pages in use: 222
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 15/302 28/2000 NoC3x3-PT-2B-LTLFireability-09 1624613 m, 107716 m/sec, 1934599 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 891 secs. Pages in use: 232
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 20/302 36/2000 NoC3x3-PT-2B-LTLFireability-09 2137957 m, 102668 m/sec, 2539039 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 896 secs. Pages in use: 242
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 25/302 44/2000 NoC3x3-PT-2B-LTLFireability-09 2652678 m, 102944 m/sec, 3145185 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 901 secs. Pages in use: 251
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 30/302 53/2000 NoC3x3-PT-2B-LTLFireability-09 3207721 m, 111008 m/sec, 3798414 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 906 secs. Pages in use: 261
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 35/302 62/2000 NoC3x3-PT-2B-LTLFireability-09 3775115 m, 113478 m/sec, 4468726 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 911 secs. Pages in use: 271
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 40/302 73/2000 NoC3x3-PT-2B-LTLFireability-09 4397176 m, 124412 m/sec, 5196983 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 916 secs. Pages in use: 283
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 45/302 82/2000 NoC3x3-PT-2B-LTLFireability-09 4993979 m, 119360 m/sec, 5912312 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 921 secs. Pages in use: 293
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 50/302 92/2000 NoC3x3-PT-2B-LTLFireability-09 5582720 m, 117748 m/sec, 6614192 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 926 secs. Pages in use: 304
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 55/302 101/2000 NoC3x3-PT-2B-LTLFireability-09 6163514 m, 116158 m/sec, 7304082 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 931 secs. Pages in use: 314
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 60/302 109/2000 NoC3x3-PT-2B-LTLFireability-09 6728214 m, 112940 m/sec, 7996301 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 936 secs. Pages in use: 323
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 65/302 119/2000 NoC3x3-PT-2B-LTLFireability-09 7294599 m, 113277 m/sec, 8700961 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 941 secs. Pages in use: 334
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 70/302 128/2000 NoC3x3-PT-2B-LTLFireability-09 7869670 m, 115014 m/sec, 9378300 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 946 secs. Pages in use: 344
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 75/302 138/2000 NoC3x3-PT-2B-LTLFireability-09 8473593 m, 120784 m/sec, 10075632 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 951 secs. Pages in use: 355
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 80/302 143/2000 NoC3x3-PT-2B-LTLFireability-09 8873818 m, 80045 m/sec, 10901420 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 956 secs. Pages in use: 361
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 85/302 145/2000 NoC3x3-PT-2B-LTLFireability-09 9060253 m, 37287 m/sec, 11794058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 961 secs. Pages in use: 364
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 90/302 146/2000 NoC3x3-PT-2B-LTLFireability-09 9248477 m, 37644 m/sec, 12695235 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 966 secs. Pages in use: 366
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 95/302 148/2000 NoC3x3-PT-2B-LTLFireability-09 9441729 m, 38650 m/sec, 13591278 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 971 secs. Pages in use: 369
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 100/302 150/2000 NoC3x3-PT-2B-LTLFireability-09 9607669 m, 33188 m/sec, 14484453 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 976 secs. Pages in use: 372
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 105/302 151/2000 NoC3x3-PT-2B-LTLFireability-09 9767840 m, 32034 m/sec, 15379628 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 981 secs. Pages in use: 374
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 110/302 153/2000 NoC3x3-PT-2B-LTLFireability-09 9911229 m, 28677 m/sec, 16232331 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 986 secs. Pages in use: 376
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 115/302 154/2000 NoC3x3-PT-2B-LTLFireability-09 10023893 m, 22532 m/sec, 16919829 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 991 secs. Pages in use: 378
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 120/302 155/2000 NoC3x3-PT-2B-LTLFireability-09 10144784 m, 24178 m/sec, 17640794 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 996 secs. Pages in use: 380
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 125/302 156/2000 NoC3x3-PT-2B-LTLFireability-09 10276688 m, 26380 m/sec, 18448271 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1001 secs. Pages in use: 382
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 130/302 158/2000 NoC3x3-PT-2B-LTLFireability-09 10417495 m, 28161 m/sec, 19339239 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1006 secs. Pages in use: 385
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 135/302 159/2000 NoC3x3-PT-2B-LTLFireability-09 10561084 m, 28717 m/sec, 20233934 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1011 secs. Pages in use: 387
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 140/302 160/2000 NoC3x3-PT-2B-LTLFireability-09 10681121 m, 24007 m/sec, 21020402 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1016 secs. Pages in use: 389
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 145/302 161/2000 NoC3x3-PT-2B-LTLFireability-09 10783560 m, 20487 m/sec, 21704065 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1021 secs. Pages in use: 391
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 150/302 162/2000 NoC3x3-PT-2B-LTLFireability-09 10880861 m, 19460 m/sec, 22356079 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1026 secs. Pages in use: 393
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 155/302 163/2000 NoC3x3-PT-2B-LTLFireability-09 11012463 m, 26320 m/sec, 23252382 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1031 secs. Pages in use: 395
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 160/302 165/2000 NoC3x3-PT-2B-LTLFireability-09 11141836 m, 25874 m/sec, 24147138 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1036 secs. Pages in use: 398
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 165/302 166/2000 NoC3x3-PT-2B-LTLFireability-09 11275736 m, 26780 m/sec, 25041694 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1041 secs. Pages in use: 400
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 170/302 167/2000 NoC3x3-PT-2B-LTLFireability-09 11406743 m, 26201 m/sec, 25931108 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1046 secs. Pages in use: 402
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 175/302 168/2000 NoC3x3-PT-2B-LTLFireability-09 11532834 m, 25218 m/sec, 26821185 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1051 secs. Pages in use: 403
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 180/302 170/2000 NoC3x3-PT-2B-LTLFireability-09 11659054 m, 25244 m/sec, 27720429 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1056 secs. Pages in use: 406
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 185/302 171/2000 NoC3x3-PT-2B-LTLFireability-09 11786844 m, 25558 m/sec, 28619403 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1061 secs. Pages in use: 408
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 190/302 172/2000 NoC3x3-PT-2B-LTLFireability-09 11906619 m, 23955 m/sec, 29509247 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1066 secs. Pages in use: 410
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 195/302 173/2000 NoC3x3-PT-2B-LTLFireability-09 12028588 m, 24393 m/sec, 30394010 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1071 secs. Pages in use: 412
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 200/302 174/2000 NoC3x3-PT-2B-LTLFireability-09 12149199 m, 24122 m/sec, 31286418 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1076 secs. Pages in use: 414
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 205/302 176/2000 NoC3x3-PT-2B-LTLFireability-09 12275680 m, 25296 m/sec, 32186725 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1081 secs. Pages in use: 417
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 210/302 177/2000 NoC3x3-PT-2B-LTLFireability-09 12398260 m, 24516 m/sec, 33064177 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1086 secs. Pages in use: 419
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 215/302 178/2000 NoC3x3-PT-2B-LTLFireability-09 12519904 m, 24328 m/sec, 33957353 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1091 secs. Pages in use: 421
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 220/302 179/2000 NoC3x3-PT-2B-LTLFireability-09 12642094 m, 24438 m/sec, 34853855 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1096 secs. Pages in use: 423
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 225/302 180/2000 NoC3x3-PT-2B-LTLFireability-09 12765229 m, 24627 m/sec, 35749969 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1101 secs. Pages in use: 425
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 230/302 182/2000 NoC3x3-PT-2B-LTLFireability-09 12886475 m, 24249 m/sec, 36629532 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1106 secs. Pages in use: 428
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 235/302 183/2000 NoC3x3-PT-2B-LTLFireability-09 13007913 m, 24287 m/sec, 37519923 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1111 secs. Pages in use: 429
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 240/302 184/2000 NoC3x3-PT-2B-LTLFireability-09 13126435 m, 23704 m/sec, 38405853 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1116 secs. Pages in use: 431
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 245/302 185/2000 NoC3x3-PT-2B-LTLFireability-09 13246005 m, 23914 m/sec, 39290608 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1121 secs. Pages in use: 433
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 250/302 186/2000 NoC3x3-PT-2B-LTLFireability-09 13362148 m, 23228 m/sec, 40185253 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1126 secs. Pages in use: 435
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 255/302 187/2000 NoC3x3-PT-2B-LTLFireability-09 13479879 m, 23546 m/sec, 41074260 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1131 secs. Pages in use: 437
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 260/302 188/2000 NoC3x3-PT-2B-LTLFireability-09 13600059 m, 24036 m/sec, 41971315 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1136 secs. Pages in use: 439
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 265/302 189/2000 NoC3x3-PT-2B-LTLFireability-09 13713255 m, 22639 m/sec, 42877761 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1141 secs. Pages in use: 441
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 270/302 190/2000 NoC3x3-PT-2B-LTLFireability-09 13830843 m, 23517 m/sec, 43767070 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1146 secs. Pages in use: 443
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 275/302 192/2000 NoC3x3-PT-2B-LTLFireability-09 13945841 m, 22999 m/sec, 44662395 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1151 secs. Pages in use: 446
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 280/302 193/2000 NoC3x3-PT-2B-LTLFireability-09 14062821 m, 23396 m/sec, 45552173 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1156 secs. Pages in use: 448
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 285/302 194/2000 NoC3x3-PT-2B-LTLFireability-09 14174515 m, 22338 m/sec, 46393056 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1161 secs. Pages in use: 449
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 290/302 195/2000 NoC3x3-PT-2B-LTLFireability-09 14266550 m, 18407 m/sec, 47103415 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1166 secs. Pages in use: 451
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 295/302 195/2000 NoC3x3-PT-2B-LTLFireability-09 14354696 m, 17629 m/sec, 47778986 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1171 secs. Pages in use: 452
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 1 0 2 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 300/302 196/2000 NoC3x3-PT-2B-LTLFireability-09 14460867 m, 21234 m/sec, 48620300 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1176 secs. Pages in use: 454
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 34 (type EXCL) for NoC3x3-PT-2B-LTLFireability-09 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 1 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1181 secs. Pages in use: 456
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 NoC3x3-PT-2B-LTLFireability-08
[[35mlola[0m][I] time limit : 302 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 31 NoC3x3-PT-2B-LTLFireability-09
[[35mlola[0m][I] time limit : 2419 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for NoC3x3-PT-2B-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 53
[[35mlola[0m][I] fired transitions : 54
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] CANCELED task # 34 (type EXCL) for NoC3x3-PT-2B-LTLFireability-09 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1186 secs. Pages in use: 461
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 18 NoC3x3-PT-2B-LTLFireability-06
[[35mlola[0m][I] time limit : 344 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 5/344 11/2000 NoC3x3-PT-2B-LTLFireability-06 596511 m, 119302 m/sec, 692486 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1191 secs. Pages in use: 469
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 10/344 20/2000 NoC3x3-PT-2B-LTLFireability-06 1141604 m, 109018 m/sec, 1365668 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1196 secs. Pages in use: 479
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 15/344 29/2000 NoC3x3-PT-2B-LTLFireability-06 1684678 m, 108614 m/sec, 2005408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1201 secs. Pages in use: 489
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 20/344 37/2000 NoC3x3-PT-2B-LTLFireability-06 2221570 m, 107378 m/sec, 2637364 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1206 secs. Pages in use: 498
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 25/344 44/2000 NoC3x3-PT-2B-LTLFireability-06 2640013 m, 83688 m/sec, 3130292 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1211 secs. Pages in use: 506
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 30/344 53/2000 NoC3x3-PT-2B-LTLFireability-06 3196257 m, 111248 m/sec, 3784980 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1216 secs. Pages in use: 516
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 35/344 60/2000 NoC3x3-PT-2B-LTLFireability-06 3630683 m, 86885 m/sec, 4295972 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1221 secs. Pages in use: 524
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 40/344 70/2000 NoC3x3-PT-2B-LTLFireability-06 4232720 m, 120407 m/sec, 5002774 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1226 secs. Pages in use: 535
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 45/344 78/2000 NoC3x3-PT-2B-LTLFireability-06 4757593 m, 104974 m/sec, 5621464 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1231 secs. Pages in use: 543
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 50/344 87/2000 NoC3x3-PT-2B-LTLFireability-06 5298195 m, 108120 m/sec, 6280212 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1236 secs. Pages in use: 553
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 55/344 96/2000 NoC3x3-PT-2B-LTLFireability-06 5881862 m, 116733 m/sec, 6967615 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1241 secs. Pages in use: 563
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 60/344 105/2000 NoC3x3-PT-2B-LTLFireability-06 6446931 m, 113013 m/sec, 7665094 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1246 secs. Pages in use: 573
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 65/344 114/2000 NoC3x3-PT-2B-LTLFireability-06 7024161 m, 115446 m/sec, 8353083 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1251 secs. Pages in use: 583
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 70/344 123/2000 NoC3x3-PT-2B-LTLFireability-06 7588444 m, 112856 m/sec, 9047670 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1256 secs. Pages in use: 593
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 75/344 133/2000 NoC3x3-PT-2B-LTLFireability-06 8169584 m, 116228 m/sec, 9731134 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1261 secs. Pages in use: 604
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 80/344 143/2000 NoC3x3-PT-2B-LTLFireability-06 8765487 m, 119180 m/sec, 10469130 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1266 secs. Pages in use: 615
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 85/344 144/2000 NoC3x3-PT-2B-LTLFireability-06 8975183 m, 41939 m/sec, 11383270 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1271 secs. Pages in use: 617
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 90/344 146/2000 NoC3x3-PT-2B-LTLFireability-06 9164363 m, 37836 m/sec, 12289412 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1276 secs. Pages in use: 620
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 95/344 147/2000 NoC3x3-PT-2B-LTLFireability-06 9364427 m, 40012 m/sec, 13205711 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1281 secs. Pages in use: 622
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 100/344 149/2000 NoC3x3-PT-2B-LTLFireability-06 9541505 m, 35415 m/sec, 14118574 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1286 secs. Pages in use: 625
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 105/344 151/2000 NoC3x3-PT-2B-LTLFireability-06 9705251 m, 32749 m/sec, 15028428 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1291 secs. Pages in use: 628
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 110/344 152/2000 NoC3x3-PT-2B-LTLFireability-06 9863144 m, 31578 m/sec, 15946080 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1296 secs. Pages in use: 630
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 115/344 154/2000 NoC3x3-PT-2B-LTLFireability-06 10013447 m, 30060 m/sec, 16855613 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1301 secs. Pages in use: 633
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 120/344 155/2000 NoC3x3-PT-2B-LTLFireability-06 10164696 m, 30249 m/sec, 17764134 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1306 secs. Pages in use: 634
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 125/344 157/2000 NoC3x3-PT-2B-LTLFireability-06 10312103 m, 29481 m/sec, 18671691 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1311 secs. Pages in use: 637
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 130/344 158/2000 NoC3x3-PT-2B-LTLFireability-06 10457689 m, 29117 m/sec, 19587388 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1316 secs. Pages in use: 639
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 135/344 160/2000 NoC3x3-PT-2B-LTLFireability-06 10601408 m, 28743 m/sec, 20497434 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1321 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 140/344 161/2000 NoC3x3-PT-2B-LTLFireability-06 10738838 m, 27486 m/sec, 21397855 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1326 secs. Pages in use: 644
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 145/344 162/2000 NoC3x3-PT-2B-LTLFireability-06 10873812 m, 26994 m/sec, 22309982 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1331 secs. Pages in use: 646
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 150/344 163/2000 NoC3x3-PT-2B-LTLFireability-06 11006578 m, 26553 m/sec, 23214870 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1336 secs. Pages in use: 648
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 155/344 165/2000 NoC3x3-PT-2B-LTLFireability-06 11137618 m, 26208 m/sec, 24118057 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1341 secs. Pages in use: 651
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 160/344 166/2000 NoC3x3-PT-2B-LTLFireability-06 11271766 m, 26829 m/sec, 25015855 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1346 secs. Pages in use: 653
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 165/344 167/2000 NoC3x3-PT-2B-LTLFireability-06 11404321 m, 26511 m/sec, 25915828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1351 secs. Pages in use: 655
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 170/344 168/2000 NoC3x3-PT-2B-LTLFireability-06 11530462 m, 25228 m/sec, 26802568 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1356 secs. Pages in use: 657
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 175/344 170/2000 NoC3x3-PT-2B-LTLFireability-06 11655367 m, 24981 m/sec, 27694878 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1361 secs. Pages in use: 660
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 180/344 171/2000 NoC3x3-PT-2B-LTLFireability-06 11782278 m, 25382 m/sec, 28583254 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1366 secs. Pages in use: 662
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 185/344 172/2000 NoC3x3-PT-2B-LTLFireability-06 11902822 m, 24108 m/sec, 29482281 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1371 secs. Pages in use: 664
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 190/344 173/2000 NoC3x3-PT-2B-LTLFireability-06 12026880 m, 24811 m/sec, 30379137 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1376 secs. Pages in use: 666
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 195/344 174/2000 NoC3x3-PT-2B-LTLFireability-06 12147539 m, 24131 m/sec, 31271863 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1381 secs. Pages in use: 667
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 200/344 176/2000 NoC3x3-PT-2B-LTLFireability-06 12273668 m, 25225 m/sec, 32172615 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1386 secs. Pages in use: 670
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 205/344 177/2000 NoC3x3-PT-2B-LTLFireability-06 12399737 m, 25213 m/sec, 33072453 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1391 secs. Pages in use: 672
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 210/344 178/2000 NoC3x3-PT-2B-LTLFireability-06 12522882 m, 24629 m/sec, 33977523 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1396 secs. Pages in use: 674
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 215/344 179/2000 NoC3x3-PT-2B-LTLFireability-06 12646598 m, 24743 m/sec, 34885625 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1401 secs. Pages in use: 676
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 220/344 180/2000 NoC3x3-PT-2B-LTLFireability-06 12770678 m, 24816 m/sec, 35787404 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1406 secs. Pages in use: 678
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 225/344 182/2000 NoC3x3-PT-2B-LTLFireability-06 12893164 m, 24497 m/sec, 36674246 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1411 secs. Pages in use: 681
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 230/344 183/2000 NoC3x3-PT-2B-LTLFireability-06 13013317 m, 24030 m/sec, 37566217 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1416 secs. Pages in use: 682
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 235/344 184/2000 NoC3x3-PT-2B-LTLFireability-06 13133737 m, 24084 m/sec, 38460453 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1421 secs. Pages in use: 684
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 240/344 185/2000 NoC3x3-PT-2B-LTLFireability-06 13210415 m, 15335 m/sec, 39036346 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1426 secs. Pages in use: 686
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 281/344 185/2000 NoC3x3-PT-2B-LTLFireability-06 13284587 m, 14834 m/sec, 39607146 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1470 secs. Pages in use: 686
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-2B-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-12: AG false findpath[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-2B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-06: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-09: CONJ 0 0 0 0 2 0 2 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-2B-LTLFireability-15: CONJ 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 LTL EXCL 351/344 185/2000 NoC3x3-PT-2B-LTLFireability-06 13284834 m, 49 m/sec, 39608618 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1542 secs. Pages in use: 686
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 23 (type EXCL) for NoC3x3-PT-2B-LTLFireability-06 (local timeout)
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 404 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="NoC3x3-PT-2B"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is NoC3x3-PT-2B, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r247-tall-171654353700580"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/NoC3x3-PT-2B.tgz
mv NoC3x3-PT-2B execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;