About the Execution of LoLA for NoC3x3-PT-1B
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16207.619 | 512005.00 | 514547.00 | 956.20 | ?T?F???????????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r247-tall-171654353600563.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is NoC3x3-PT-1B, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r247-tall-171654353600563
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 840K
-rw-r--r-- 1 mcc users 7.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 84K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K May 19 07:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K May 19 16:11 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Apr 23 07:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 23 07:41 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 12 07:11 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 132K Apr 12 07:11 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Apr 12 07:10 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 71K Apr 12 07:10 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:41 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 23 07:41 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 362K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-00
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-01
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-02
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-03
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-04
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-05
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-06
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-07
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-08
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-09
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-10
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-11
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-12
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-13
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-14
FORMULA_NAME NoC3x3-PT-1B-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717084459825
FORMULA NoC3x3-PT-1B-LTLCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-1B-LTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717084971830
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] LAUNCH task # 4 (type CNST) for 3 NoC3x3-PT-1B-LTLCardinality-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 4 (type CNST) for NoC3x3-PT-1B-LTLCardinality-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 12 (type EXCL) for 9 NoC3x3-PT-1B-LTLCardinality-03
[[35mlola[0m][I] time limit : 214 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 12 (type EXCL) for NoC3x3-PT-1B-LTLCardinality-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 22
[[35mlola[0m][I] fired transitions : 34
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 40 NoC3x3-PT-1B-LTLCardinality-12
[[35mlola[0m][I] time limit : 244 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 56 (type EQUN) for 37 NoC3x3-PT-1B-LTLCardinality-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[*** LOG ERROR #0001 ***] [2024-05-30 15:57:12] [status_logger] string pointer is null
[[35mlola[0m][I] FINISHED task # 56 (type EQUN) for NoC3x3-PT-1B-LTLCardinality-11
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 5/244 5/2000 NoC3x3-PT-1B-LTLCardinality-12 648210 m, 129642 m/sec, 2731413 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 178 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 10/244 9/2000 NoC3x3-PT-1B-LTLCardinality-12 1345883 m, 139534 m/sec, 5991964 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 183 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 15/244 14/2000 NoC3x3-PT-1B-LTLCardinality-12 2035142 m, 137851 m/sec, 9303432 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 188 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 20/244 18/2000 NoC3x3-PT-1B-LTLCardinality-12 2714061 m, 135783 m/sec, 12512813 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 193 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 25/244 22/2000 NoC3x3-PT-1B-LTLCardinality-12 3334504 m, 124088 m/sec, 15833872 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 198 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 30/244 26/2000 NoC3x3-PT-1B-LTLCardinality-12 3925932 m, 118285 m/sec, 19098783 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 203 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 35/244 31/2000 NoC3x3-PT-1B-LTLCardinality-12 4634859 m, 141785 m/sec, 22359438 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 208 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 40/244 35/2000 NoC3x3-PT-1B-LTLCardinality-12 5330831 m, 139194 m/sec, 25639979 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 213 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 45/244 39/2000 NoC3x3-PT-1B-LTLCardinality-12 5988045 m, 131442 m/sec, 28859988 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 218 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 50/244 44/2000 NoC3x3-PT-1B-LTLCardinality-12 6686739 m, 139738 m/sec, 31993406 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 223 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 55/244 48/2000 NoC3x3-PT-1B-LTLCardinality-12 7332362 m, 129124 m/sec, 35286096 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 228 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 60/244 52/2000 NoC3x3-PT-1B-LTLCardinality-12 7901049 m, 113737 m/sec, 38533349 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 233 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 65/244 56/2000 NoC3x3-PT-1B-LTLCardinality-12 8513687 m, 122527 m/sec, 41765332 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 238 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 70/244 60/2000 NoC3x3-PT-1B-LTLCardinality-12 9211634 m, 139589 m/sec, 45057963 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 243 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 75/244 65/2000 NoC3x3-PT-1B-LTLCardinality-12 9878519 m, 133377 m/sec, 48271862 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 248 secs. Pages in use: 65
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 80/244 69/2000 NoC3x3-PT-1B-LTLCardinality-12 10547813 m, 133858 m/sec, 51445887 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 253 secs. Pages in use: 69
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 85/244 73/2000 NoC3x3-PT-1B-LTLCardinality-12 11228592 m, 136155 m/sec, 54699535 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 258 secs. Pages in use: 73
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 90/244 78/2000 NoC3x3-PT-1B-LTLCardinality-12 11899588 m, 134199 m/sec, 57915698 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 263 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 95/244 82/2000 NoC3x3-PT-1B-LTLCardinality-12 12561345 m, 132351 m/sec, 61152024 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 268 secs. Pages in use: 82
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 100/244 86/2000 NoC3x3-PT-1B-LTLCardinality-12 13228806 m, 133492 m/sec, 64257537 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 273 secs. Pages in use: 86
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 105/244 90/2000 NoC3x3-PT-1B-LTLCardinality-12 13844631 m, 123165 m/sec, 67297401 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 278 secs. Pages in use: 90
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 110/244 94/2000 NoC3x3-PT-1B-LTLCardinality-12 14424420 m, 115957 m/sec, 70232294 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 283 secs. Pages in use: 94
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 115/244 99/2000 NoC3x3-PT-1B-LTLCardinality-12 15116896 m, 138495 m/sec, 73319694 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 288 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 120/244 103/2000 NoC3x3-PT-1B-LTLCardinality-12 15742181 m, 125057 m/sec, 76303221 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 293 secs. Pages in use: 103
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 125/244 107/2000 NoC3x3-PT-1B-LTLCardinality-12 16382814 m, 128126 m/sec, 79398288 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 298 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 130/244 111/2000 NoC3x3-PT-1B-LTLCardinality-12 16981593 m, 119755 m/sec, 82482313 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 303 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 135/244 114/2000 NoC3x3-PT-1B-LTLCardinality-12 17569057 m, 117492 m/sec, 85677539 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 308 secs. Pages in use: 114
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 140/244 118/2000 NoC3x3-PT-1B-LTLCardinality-12 18176514 m, 121491 m/sec, 89080987 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 313 secs. Pages in use: 118
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 145/244 122/2000 NoC3x3-PT-1B-LTLCardinality-12 18774723 m, 119641 m/sec, 92138548 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 318 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 150/244 126/2000 NoC3x3-PT-1B-LTLCardinality-12 19350908 m, 115237 m/sec, 95103430 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 323 secs. Pages in use: 126
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 155/244 129/2000 NoC3x3-PT-1B-LTLCardinality-12 19794455 m, 88709 m/sec, 98340716 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 328 secs. Pages in use: 129
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 160/244 132/2000 NoC3x3-PT-1B-LTLCardinality-12 20222412 m, 85591 m/sec, 101637802 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 333 secs. Pages in use: 132
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 165/244 134/2000 NoC3x3-PT-1B-LTLCardinality-12 20658627 m, 87243 m/sec, 104803120 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 338 secs. Pages in use: 134
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 170/244 138/2000 NoC3x3-PT-1B-LTLCardinality-12 21220439 m, 112362 m/sec, 107798545 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 343 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 175/244 142/2000 NoC3x3-PT-1B-LTLCardinality-12 21792547 m, 114421 m/sec, 110956233 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 348 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 180/244 145/2000 NoC3x3-PT-1B-LTLCardinality-12 22268496 m, 95189 m/sec, 114198076 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 353 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 185/244 148/2000 NoC3x3-PT-1B-LTLCardinality-12 22764944 m, 99289 m/sec, 117311578 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 358 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 190/244 151/2000 NoC3x3-PT-1B-LTLCardinality-12 23191814 m, 85374 m/sec, 120525569 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 363 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 195/244 155/2000 NoC3x3-PT-1B-LTLCardinality-12 23813574 m, 124352 m/sec, 123426868 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 368 secs. Pages in use: 155
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 200/244 159/2000 NoC3x3-PT-1B-LTLCardinality-12 24377374 m, 112760 m/sec, 126283195 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 373 secs. Pages in use: 159
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 205/244 162/2000 NoC3x3-PT-1B-LTLCardinality-12 24934328 m, 111390 m/sec, 129165264 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 378 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 210/244 166/2000 NoC3x3-PT-1B-LTLCardinality-12 25558166 m, 124767 m/sec, 132203181 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 383 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 215/244 170/2000 NoC3x3-PT-1B-LTLCardinality-12 26205785 m, 129523 m/sec, 135132480 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 388 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 220/244 174/2000 NoC3x3-PT-1B-LTLCardinality-12 26797645 m, 118372 m/sec, 138036302 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 393 secs. Pages in use: 174
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 225/244 178/2000 NoC3x3-PT-1B-LTLCardinality-12 27440624 m, 128595 m/sec, 141173958 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 398 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 230/244 182/2000 NoC3x3-PT-1B-LTLCardinality-12 28032557 m, 118386 m/sec, 144223249 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 403 secs. Pages in use: 182
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 235/244 187/2000 NoC3x3-PT-1B-LTLCardinality-12 28687484 m, 130985 m/sec, 147629480 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 408 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 240/244 190/2000 NoC3x3-PT-1B-LTLCardinality-12 29283788 m, 119260 m/sec, 151300299 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 413 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 41 (type EXCL) for NoC3x3-PT-1B-LTLCardinality-12 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 418 secs. Pages in use: 194
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 NoC3x3-PT-1B-LTLCardinality-15
[[35mlola[0m][I] time limit : 244 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 40 NoC3x3-PT-1B-LTLCardinality-12
[[35mlola[0m][I] time limit : 3182 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 50 (type EXCL) for NoC3x3-PT-1B-LTLCardinality-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 283532
[[35mlola[0m][I] fired transitions : 391241
[[35mlola[0m][I] time used : 2
[[35mlola[0m][I] memory pages used : 3
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 5/244 5/5 NoC3x3-PT-1B-LTLCardinality-12 764475 m, -5703862 m/sec, 3263446 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 423 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 41 (type EXCL) for NoC3x3-PT-1B-LTLCardinality-12 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 428 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 NoC3x3-PT-1B-LTLCardinality-14
[[35mlola[0m][I] time limit : 264 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for NoC3x3-PT-1B-LTLCardinality-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 263
[[35mlola[0m][I] fired transitions : 263
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 44 (type EXCL) for 43 NoC3x3-PT-1B-LTLCardinality-13
[[35mlola[0m][I] time limit : 288 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 44 (type EXCL) for NoC3x3-PT-1B-LTLCardinality-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 263
[[35mlola[0m][I] fired transitions : 263
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 NoC3x3-PT-1B-LTLCardinality-10
[[35mlola[0m][I] time limit : 317 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 35 (type EXCL) for NoC3x3-PT-1B-LTLCardinality-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 135
[[35mlola[0m][I] fired transitions : 135
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 NoC3x3-PT-1B-LTLCardinality-09
[[35mlola[0m][I] time limit : 352 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 32 (type EXCL) for NoC3x3-PT-1B-LTLCardinality-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12299
[[35mlola[0m][I] fired transitions : 17491
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 NoC3x3-PT-1B-LTLCardinality-08
[[35mlola[0m][I] time limit : 396 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for NoC3x3-PT-1B-LTLCardinality-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 263
[[35mlola[0m][I] fired transitions : 263
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 NoC3x3-PT-1B-LTLCardinality-07
[[35mlola[0m][I] time limit : 453 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 26 (type EXCL) for NoC3x3-PT-1B-LTLCardinality-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 263
[[35mlola[0m][I] fired transitions : 263
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 NoC3x3-PT-1B-LTLCardinality-06
[[35mlola[0m][I] time limit : 528 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for NoC3x3-PT-1B-LTLCardinality-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 20 (type EXCL) for 19 NoC3x3-PT-1B-LTLCardinality-05
[[35mlola[0m][I] time limit : 634 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 20 (type EXCL) for NoC3x3-PT-1B-LTLCardinality-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 263
[[35mlola[0m][I] fired transitions : 263
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 16 NoC3x3-PT-1B-LTLCardinality-04
[[35mlola[0m][I] time limit : 793 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 5/793 4/2000 NoC3x3-PT-1B-LTLCardinality-04 410918 m, 82183 m/sec, 1160613 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 433 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 10/793 6/2000 NoC3x3-PT-1B-LTLCardinality-04 702491 m, 58314 m/sec, 2322549 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 438 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 15/793 7/2000 NoC3x3-PT-1B-LTLCardinality-04 878982 m, 35298 m/sec, 3449588 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 443 secs. Pages in use: 201
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 20/793 9/2000 NoC3x3-PT-1B-LTLCardinality-04 1074153 m, 39034 m/sec, 4582369 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 448 secs. Pages in use: 203
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 25/793 10/2000 NoC3x3-PT-1B-LTLCardinality-04 1338789 m, 52927 m/sec, 5703080 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 453 secs. Pages in use: 204
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 30/793 12/2000 NoC3x3-PT-1B-LTLCardinality-04 1595865 m, 51415 m/sec, 6860159 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 458 secs. Pages in use: 206
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 35/793 14/2000 NoC3x3-PT-1B-LTLCardinality-04 1780339 m, 36894 m/sec, 8022048 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 463 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 40/793 15/2000 NoC3x3-PT-1B-LTLCardinality-04 2010193 m, 45970 m/sec, 9164474 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 468 secs. Pages in use: 209
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 45/793 17/2000 NoC3x3-PT-1B-LTLCardinality-04 2270638 m, 52089 m/sec, 10339792 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 473 secs. Pages in use: 211
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 50/793 19/2000 NoC3x3-PT-1B-LTLCardinality-04 2472438 m, 40360 m/sec, 11457220 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 478 secs. Pages in use: 213
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 55/793 20/2000 NoC3x3-PT-1B-LTLCardinality-04 2671031 m, 39718 m/sec, 12545327 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 483 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 60/793 21/2000 NoC3x3-PT-1B-LTLCardinality-04 2870486 m, 39891 m/sec, 13631701 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 488 secs. Pages in use: 215
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 65/793 23/2000 NoC3x3-PT-1B-LTLCardinality-04 3133835 m, 52669 m/sec, 14778131 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 493 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 70/793 25/2000 NoC3x3-PT-1B-LTLCardinality-04 3340978 m, 41428 m/sec, 15870297 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 498 secs. Pages in use: 219
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-03: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mNoC3x3-PT-1B-LTLCardinality-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mNoC3x3-PT-1B-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-11: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] NoC3x3-PT-1B-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 75/793 26/2000 NoC3x3-PT-1B-LTLCardinality-04 3571955 m, 46195 m/sec, 16969833 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 503 secs. Pages in use: 220
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 407 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="NoC3x3-PT-1B"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is NoC3x3-PT-1B, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r247-tall-171654353600563"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/NoC3x3-PT-1B.tgz
mv NoC3x3-PT-1B execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;