MCC'2024- Execution of r247-tall-171654353000276

About the Execution of LoLA for Murphy-COL-D4N025

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
16207.355	281357.00	282693.00	1312.50	TFFFF?FFFFFFT?FF	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r247-tall-171654353000276.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is Murphy-COL-D4N025, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r247-tall-171654353000276
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 448K
-rw-r--r-- 1 mcc users 6.9K Apr 11 22:48 CTLCardinality.txt
-rw-r--r-- 1 mcc users 81K Apr 11 22:48 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Apr 11 22:44 CTLFireability.txt
-rw-r--r-- 1 mcc users 67K Apr 11 22:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 6 10:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K May 6 10:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 6 10:01 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 6 10:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.1K Apr 11 22:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 70K Apr 11 22:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.2K Apr 11 22:51 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 90K Apr 11 22:51 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 6 10:01 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 6 10:01 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 7 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 20K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-00
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-01
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-02
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-03
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-04
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-05
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-06
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-07
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-08
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-09
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-10
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-11
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-12
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-13
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-14
FORMULA_NAME Murphy-COL-D4N025-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717070961854

FORMULA Murphy-COL-D4N025-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-LTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-LTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717071243211

--------------------
content from stderr:

[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] Places: 30, Transitions: 35
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 80 (type SKEL/CNST) for 3 Murphy-COL-D4N025-LTLFireability-01
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 80 (type SKEL/CNST) for Murphy-COL-D4N025-LTLFireability-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][W] findlow criterion violated for transition 3
[[35mlola[0m][W] findlow criterion violated for transition 0
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 10 (type CNST) for 3 Murphy-COL-D4N025-LTLFireability-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 10 (type CNST) for Murphy-COL-D4N025-LTLFireability-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 20 Murphy-COL-D4N025-LTLFireability-04
[[35mlola[0m][I] time limit : 138 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for Murphy-COL-D4N025-LTLFireability-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 11
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 15 (type EXCL) for 14 Murphy-COL-D4N025-LTLFireability-02
[[35mlola[0m][I] time limit : 163 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 15 (type EXCL) for Murphy-COL-D4N025-LTLFireability-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 11
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 Murphy-COL-D4N025-LTLFireability-00
[[35mlola[0m][I] time limit : 171 sec
[[35mlola[0m][I] memory limit: 2000 pages
[*** LOG ERROR #0001 ***] [2024-05-30 12:09:22] [status_logger] string pointer is null
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for Murphy-COL-D4N025-LTLFireability-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 16
[[35mlola[0m][I] fired transitions : 15
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 73 (type EXCL) for 70 Murphy-COL-D4N025-LTLFireability-14
[[35mlola[0m][I] time limit : 179 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 73 (type EXCL) for Murphy-COL-D4N025-LTLFireability-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 16
[[35mlola[0m][I] fired transitions : 15
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 75 (type EXCL) for 70 Murphy-COL-D4N025-LTLFireability-14
[[35mlola[0m][I] time limit : 199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 82 (type FNDP) for 57 Murphy-COL-D4N025-LTLFireability-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 83 (type EQUN) for 57 Murphy-COL-D4N025-LTLFireability-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 75 (type EXCL) for Murphy-COL-D4N025-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 17
[[35mlola[0m][I] fired transitions : 17
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 78 (type EXCL) for 77 Murphy-COL-D4N025-LTLFireability-15
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 78 (type EXCL) for Murphy-COL-D4N025-LTLFireability-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 16
[[35mlola[0m][I] fired transitions : 16
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 65 (type EXCL) for 64 Murphy-COL-D4N025-LTLFireability-12
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 65 (type EXCL) for Murphy-COL-D4N025-LTLFireability-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 54 Murphy-COL-D4N025-LTLFireability-10
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 55 (type EXCL) for Murphy-COL-D4N025-LTLFireability-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 17
[[35mlola[0m][I] fired transitions : 18
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 51 Murphy-COL-D4N025-LTLFireability-09
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 52 (type EXCL) for Murphy-COL-D4N025-LTLFireability-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 11
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 48 Murphy-COL-D4N025-LTLFireability-08
[[35mlola[0m][I] time limit : 299 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 49 (type EXCL) for Murphy-COL-D4N025-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 116
[[35mlola[0m][I] fired transitions : 191
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 Murphy-COL-D4N025-LTLFireability-07
[[35mlola[0m][I] time limit : 327 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for Murphy-COL-D4N025-LTLFireability-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 11
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 38 Murphy-COL-D4N025-LTLFireability-06
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 43 (type EXCL) for Murphy-COL-D4N025-LTLFireability-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 11
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 18 (type EXCL) for 17 Murphy-COL-D4N025-LTLFireability-03
[[35mlola[0m][I] time limit : 599 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 82 (type FNDP) for Murphy-COL-D4N025-LTLFireability-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 83 (type EQUN) for Murphy-COL-D4N025-LTLFireability-11 (obsolete)
[[35mlola[0m][I] FINISHED task # 18 (type EXCL) for Murphy-COL-D4N025-LTLFireability-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 20
[[35mlola[0m][I] fired transitions : 21
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 68 (type EXCL) for 67 Murphy-COL-D4N025-LTLFireability-13
[[35mlola[0m][I] time limit : 1799 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 83 (type EQUN) for Murphy-COL-D4N025-LTLFireability-11
[[35mlola[0m][I] result : unknown
[[35mlola[0m][W] findlow criterion violated for 4 clusters
[[35mlola[0m][I] Time for checking findlow: 0
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 5/1799 13/2000 Murphy-COL-D4N025-LTLFireability-13 1974268 m, 394853 m/sec, 6261180 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 10/1799 26/2000 Murphy-COL-D4N025-LTLFireability-13 3929261 m, 390998 m/sec, 12402335 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 15/1799 37/2000 Murphy-COL-D4N025-LTLFireability-13 5639557 m, 342059 m/sec, 18489058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 16 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 20/1799 49/2000 Murphy-COL-D4N025-LTLFireability-13 7497099 m, 371508 m/sec, 24612000 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 21 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 25/1799 62/2000 Murphy-COL-D4N025-LTLFireability-13 9514082 m, 403396 m/sec, 30607129 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 26 secs. Pages in use: 62
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 30/1799 73/2000 Murphy-COL-D4N025-LTLFireability-13 11118534 m, 320890 m/sec, 36207992 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 31 secs. Pages in use: 73
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 35/1799 84/2000 Murphy-COL-D4N025-LTLFireability-13 12838933 m, 344079 m/sec, 42113888 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 36 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 40/1799 96/2000 Murphy-COL-D4N025-LTLFireability-13 14714442 m, 375101 m/sec, 48525920 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 41 secs. Pages in use: 96
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 45/1799 110/2000 Murphy-COL-D4N025-LTLFireability-13 16775137 m, 412139 m/sec, 54448593 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 46 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 50/1799 122/2000 Murphy-COL-D4N025-LTLFireability-13 18697877 m, 384548 m/sec, 60288725 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 51 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 55/1799 135/2000 Murphy-COL-D4N025-LTLFireability-13 20687521 m, 397928 m/sec, 66167377 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 56 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 60/1799 147/2000 Murphy-COL-D4N025-LTLFireability-13 22546626 m, 371821 m/sec, 72139686 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 61 secs. Pages in use: 147
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 65/1799 158/2000 Murphy-COL-D4N025-LTLFireability-13 24163765 m, 323427 m/sec, 77588140 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 66 secs. Pages in use: 158
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 70/1799 167/2000 Murphy-COL-D4N025-LTLFireability-13 25651744 m, 297595 m/sec, 83137825 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 71 secs. Pages in use: 167
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 75/1799 178/2000 Murphy-COL-D4N025-LTLFireability-13 27283946 m, 326440 m/sec, 89190837 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 76 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 80/1799 192/2000 Murphy-COL-D4N025-LTLFireability-13 29480082 m, 439227 m/sec, 94904056 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 81 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 85/1799 206/2000 Murphy-COL-D4N025-LTLFireability-13 31545523 m, 413088 m/sec, 100666742 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 86 secs. Pages in use: 206
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 90/1799 217/2000 Murphy-COL-D4N025-LTLFireability-13 33336745 m, 358244 m/sec, 106354285 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 91 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 95/1799 231/2000 Murphy-COL-D4N025-LTLFireability-13 35382834 m, 409217 m/sec, 112384647 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 96 secs. Pages in use: 231
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 100/1799 243/2000 Murphy-COL-D4N025-LTLFireability-13 37231263 m, 369685 m/sec, 118117128 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 101 secs. Pages in use: 243
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 105/1799 255/2000 Murphy-COL-D4N025-LTLFireability-13 39086848 m, 371117 m/sec, 124012439 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 106 secs. Pages in use: 255
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 110/1799 267/2000 Murphy-COL-D4N025-LTLFireability-13 40937912 m, 370212 m/sec, 129796723 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 111 secs. Pages in use: 267
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 115/1799 275/2000 Murphy-COL-D4N025-LTLFireability-13 42256941 m, 263805 m/sec, 134668494 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 116 secs. Pages in use: 275
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 120/1799 284/2000 Murphy-COL-D4N025-LTLFireability-13 43634087 m, 275429 m/sec, 139811993 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 121 secs. Pages in use: 284
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 125/1799 293/2000 Murphy-COL-D4N025-LTLFireability-13 45050844 m, 283351 m/sec, 145288468 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 126 secs. Pages in use: 293
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 130/1799 305/2000 Murphy-COL-D4N025-LTLFireability-13 46809989 m, 351829 m/sec, 151516802 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 131 secs. Pages in use: 305
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 135/1799 317/2000 Murphy-COL-D4N025-LTLFireability-13 48598351 m, 357672 m/sec, 157436050 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 136 secs. Pages in use: 317
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 140/1799 330/2000 Murphy-COL-D4N025-LTLFireability-13 50591621 m, 398654 m/sec, 163197706 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 141 secs. Pages in use: 330
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 145/1799 344/2000 Murphy-COL-D4N025-LTLFireability-13 52736015 m, 428878 m/sec, 168822396 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 146 secs. Pages in use: 344
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 150/1799 358/2000 Murphy-COL-D4N025-LTLFireability-13 54905785 m, 433954 m/sec, 174575379 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 151 secs. Pages in use: 358
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 155/1799 370/2000 Murphy-COL-D4N025-LTLFireability-13 56731770 m, 365197 m/sec, 180076296 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 156 secs. Pages in use: 370
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 160/1799 381/2000 Murphy-COL-D4N025-LTLFireability-13 58483804 m, 350406 m/sec, 185642665 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 161 secs. Pages in use: 381
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 165/1799 393/2000 Murphy-COL-D4N025-LTLFireability-13 60318503 m, 366939 m/sec, 191422755 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 166 secs. Pages in use: 393
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 170/1799 407/2000 Murphy-COL-D4N025-LTLFireability-13 62466355 m, 429570 m/sec, 197253057 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 171 secs. Pages in use: 407
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 175/1799 418/2000 Murphy-COL-D4N025-LTLFireability-13 64176107 m, 341950 m/sec, 202711191 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 176 secs. Pages in use: 418
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 180/1799 430/2000 Murphy-COL-D4N025-LTLFireability-13 65968389 m, 358456 m/sec, 208372349 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 181 secs. Pages in use: 430
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 185/1799 441/2000 Murphy-COL-D4N025-LTLFireability-13 67769959 m, 360314 m/sec, 213936450 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 186 secs. Pages in use: 441
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 190/1799 452/2000 Murphy-COL-D4N025-LTLFireability-13 69345316 m, 315071 m/sec, 219126272 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 191 secs. Pages in use: 452
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 195/1799 461/2000 Murphy-COL-D4N025-LTLFireability-13 70706060 m, 272148 m/sec, 224264338 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 196 secs. Pages in use: 461
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 200/1799 469/2000 Murphy-COL-D4N025-LTLFireability-13 72065317 m, 271851 m/sec, 229364889 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 201 secs. Pages in use: 469
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 205/1799 480/2000 Murphy-COL-D4N025-LTLFireability-13 73663435 m, 319623 m/sec, 234802159 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 206 secs. Pages in use: 480
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 210/1799 490/2000 Murphy-COL-D4N025-LTLFireability-13 75228806 m, 313074 m/sec, 240523671 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 211 secs. Pages in use: 490
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 215/1799 502/2000 Murphy-COL-D4N025-LTLFireability-13 77101593 m, 374557 m/sec, 246395001 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 216 secs. Pages in use: 502
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 220/1799 512/2000 Murphy-COL-D4N025-LTLFireability-13 78696777 m, 319036 m/sec, 252204575 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 221 secs. Pages in use: 512
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 225/1799 524/2000 Murphy-COL-D4N025-LTLFireability-13 80496401 m, 359924 m/sec, 258493051 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 226 secs. Pages in use: 524
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 230/1799 536/2000 Murphy-COL-D4N025-LTLFireability-13 82297629 m, 360245 m/sec, 264454133 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 231 secs. Pages in use: 536
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 235/1799 549/2000 Murphy-COL-D4N025-LTLFireability-13 84315444 m, 403563 m/sec, 270167494 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 236 secs. Pages in use: 549
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 240/1799 564/2000 Murphy-COL-D4N025-LTLFireability-13 86539415 m, 444794 m/sec, 275657527 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 241 secs. Pages in use: 564
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 245/1799 577/2000 Murphy-COL-D4N025-LTLFireability-13 88640476 m, 420212 m/sec, 281329502 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 246 secs. Pages in use: 577
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 250/1799 590/2000 Murphy-COL-D4N025-LTLFireability-13 90607069 m, 393318 m/sec, 286863471 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 251 secs. Pages in use: 590
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 255/1799 602/2000 Murphy-COL-D4N025-LTLFireability-13 92360451 m, 350676 m/sec, 292160048 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 256 secs. Pages in use: 602
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 260/1799 613/2000 Murphy-COL-D4N025-LTLFireability-13 94103605 m, 348630 m/sec, 297612666 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 261 secs. Pages in use: 613
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 265/1799 626/2000 Murphy-COL-D4N025-LTLFireability-13 96098556 m, 398990 m/sec, 303270566 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 266 secs. Pages in use: 626
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 270/1799 637/2000 Murphy-COL-D4N025-LTLFireability-13 97880437 m, 356376 m/sec, 308907255 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 271 secs. Pages in use: 637
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 275/1799 648/2000 Murphy-COL-D4N025-LTLFireability-13 99444625 m, 312837 m/sec, 313309729 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 276 secs. Pages in use: 648
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-04: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-11: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mMurphy-COL-D4N025-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMurphy-COL-D4N025-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Murphy-COL-D4N025-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 LTL EXCL 280/1799 648/2000 Murphy-COL-D4N025-LTLFireability-13 99508496 m, 12774 m/sec, 313530198 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 281 secs. Pages in use: 648
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 406 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Murphy-COL-D4N025"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is Murphy-COL-D4N025, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r247-tall-171654353000276"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Murphy-COL-D4N025.tgz
mv Murphy-COL-D4N025 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;