About the Execution of LoLA for MultiCrashLeafsetExtension-PT-S16C02
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 3867.031 | 35830.00 | 83230.00 | 210.60 | TFTFFFFFFTFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r247-tall-171654352400002.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is MultiCrashLeafsetExtension-PT-S16C02, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r247-tall-171654352400002
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.5M
-rw-r--r-- 1 mcc users 15K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 96K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 60K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 7.4K Apr 22 14:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 32K Apr 22 14:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 25K Apr 12 07:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 147K Apr 12 07:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 19K Apr 12 07:03 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 90K Apr 12 07:03 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K Apr 22 14:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.5K Apr 22 14:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 7 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 3.0M May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-00
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-01
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-02
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-03
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-04
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-05
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-06
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-08
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-09
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-10
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-11
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-12
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-13
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-14
FORMULA_NAME MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717047671127
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[32mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-01: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-04: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07: EF false state space[0m
[[35mlola[0m] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-08: EF false state space[0m
[[35mlola[0m] [1m[32mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-14: CONJ false CTL model checker[0m
[[35mlola[0m] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 35 secs. Pages in use: 2
BK_STOP 1717047706957
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 19 (type CNST) for 18 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 19 (type CNST) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-08: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-14: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 14 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-08: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-14: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 19 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 54 (type EXCL) for 24 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 223 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 53 (type EQUN) for 24 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 52 (type FNDP) for 24 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 54 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 2879
[[35mlola[0m][I] fired transitions : 3117
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 52 (type FNDP) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-08 (obsolete)
[[35mlola[0m][W] CANCELED task # 53 (type EQUN) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-08 (obsolete)
[[35mlola[0m][I] LAUNCH task # 40 (type EXCL) for 39 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 238 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-08: EF false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-14: CONJ 1 0 0 0 2 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 40 CTL EXCL 1/238 1/2000 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-13 11 m, 2 m/sec, 12 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 40 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 24325
[[35mlola[0m][I] fired transitions : 28747
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 45 (type EXCL) for 42 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 275 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 55 (type FNDP) for 21 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 56 (type EQUN) for 21 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 45 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 33708
[[35mlola[0m][I] fired transitions : 105400
[[35mlola[0m][I] time used : 2
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 274 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 50 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1292
[[35mlola[0m][I] fired transitions : 1494
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 297 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-08: EF false state space[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07: EF 0 1 2 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-14: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 3/297 2/2000 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-12 28565 m, 5713 m/sec, 89254 t fired, .
[[35mlola[0m][.] 55 EF FNDP 4/3574 0/5 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07 6495 attempts, .
[[35mlola[0m][.] 56 EF STEQ 4/3574 0/5 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 33707
[[35mlola[0m][I] fired transitions : 105390
[[35mlola[0m][I] time used : 3
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 324 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 34 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 847
[[35mlola[0m][I] fired transitions : 954
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 357 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 342
[[35mlola[0m][I] fired transitions : 701
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 396 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 33707
[[35mlola[0m][I] fired transitions : 42045
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 446 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 2445
[[35mlola[0m][I] fired transitions : 2754
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 509 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 33540
[[35mlola[0m][I] fired transitions : 38008
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 594 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-04: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-08: EF false state space[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mMultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07: EF 0 1 2 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-14: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 3/594 2/2000 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-02 32704 m, 6540 m/sec, 105978 t fired, .
[[35mlola[0m][.] 55 EF FNDP 9/3574 0/5 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07 15352 attempts, .
[[35mlola[0m][.] 56 EF STEQ 9/3574 0/5 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 33708
[[35mlola[0m][I] fired transitions : 113051
[[35mlola[0m][I] time used : 3
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 713 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 343
[[35mlola[0m][I] fired transitions : 377
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 57 (type EXCL) for 21 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 891 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 57 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1634
[[35mlola[0m][I] fired transitions : 1872
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 55 (type FNDP) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07 (obsolete)
[[35mlola[0m][W] CANCELED task # 56 (type EQUN) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07 (obsolete)
[[35mlola[0m][I] LAUNCH task # 28 (type EXCL) for 27 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 1188 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 55 (type FNDP) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-07
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] tried executions : 15951
[[35mlola[0m][I] time used : 9
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 28 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 17
[[35mlola[0m][I] fired transitions : 17
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 42 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 1782 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2023-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 17
[[35mlola[0m][I] fired transitions : 34
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 3565 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for MultiCrashLeafsetExtension-PT-S16C02-CTLFireability-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 24317
[[35mlola[0m][I] fired transitions : 28741
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MultiCrashLeafsetExtension-PT-S16C02"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is MultiCrashLeafsetExtension-PT-S16C02, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r247-tall-171654352400002"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/MultiCrashLeafsetExtension-PT-S16C02.tgz
mv MultiCrashLeafsetExtension-PT-S16C02 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;