Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r241-tall-171649628300189.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is LamportFastMutEx-PT-7, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r241-tall-171649628300189
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.7M
-rw-r--r-- 1 mcc users 20K Apr 13 07:37 CTLCardinality.txt
-rw-r--r-- 1 mcc users 139K Apr 13 07:37 CTLCardinality.xml
-rw-r--r-- 1 mcc users 37K Apr 13 07:35 CTLFireability.txt
-rw-r--r-- 1 mcc users 199K Apr 13 07:35 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 19K Apr 22 14:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Apr 22 14:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 18K Apr 22 14:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 76K Apr 22 14:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 32K Apr 13 07:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 193K Apr 13 07:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 82K Apr 13 07:44 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 417K Apr 13 07:44 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 9.7K Apr 22 14:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 2 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 265K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1716560142946

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=LamportFastMutEx-PT-7
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-24 14:15:44] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-05-24 14:15:44] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-24 14:15:44] [INFO ] Load time of PNML (sax parser for PT used): 78 ms
[2024-05-24 14:15:44] [INFO ] Transformed 264 places.
[2024-05-24 14:15:44] [INFO ] Transformed 536 transitions.
[2024-05-24 14:15:44] [INFO ] Found NUPN structural information;
[2024-05-24 14:15:44] [INFO ] Completing missing partition info from NUPN : creating a component with [P_start_1_0, P_start_1_1, P_start_1_2, P_start_1_3, P_start_1_4, P_start_1_5, P_start_1_6, P_start_1_7, P_b_0_false, P_b_0_true, P_b_1_false, P_b_1_true, P_b_2_false, P_b_2_true, P_b_3_false, P_b_3_true, P_b_4_false, P_b_4_true, P_b_5_false, P_b_5_true, P_b_6_false, P_b_6_true, P_b_7_false, P_b_7_true, P_setx_3_0, P_setx_3_1, P_setx_3_2, P_setx_3_3, P_setx_3_4, P_setx_3_5, P_setx_3_6, P_setx_3_7, P_setbi_5_0, P_setbi_5_1, P_setbi_5_2, P_setbi_5_3, P_setbi_5_4, P_setbi_5_5, P_setbi_5_6, P_setbi_5_7, P_ify0_4_0, P_ify0_4_1, P_ify0_4_2, P_ify0_4_3, P_ify0_4_4, P_ify0_4_5, P_ify0_4_6, P_ify0_4_7, P_sety_9_0, P_sety_9_1, P_sety_9_2, P_sety_9_3, P_sety_9_4, P_sety_9_5, P_sety_9_6, P_sety_9_7, P_ifxi_10_0, P_ifxi_10_1, P_ifxi_10_2, P_ifxi_10_3, P_ifxi_10_4, P_ifxi_10_5, P_ifxi_10_6, P_ifxi_10_7, P_setbi_11_0, P_setbi_11_1, P_setbi_11_2, P_setbi_11_3, P_setbi_11_4, P_setbi_11_5, P_setbi_11_6, P_setbi_11_7, P_fordo_12_0, P_fordo_12_1, P_fordo_12_2, P_fordo_12_3, P_fordo_12_4, P_fordo_12_5, P_fordo_12_6, P_fordo_12_7, P_wait_0_0, P_wait_0_1, P_wait_0_2, P_wait_0_3, P_wait_0_4, P_wait_0_5, P_wait_0_6, P_wait_0_7, P_wait_1_0, P_wait_1_1, P_wait_1_2, P_wait_1_3, P_wait_1_4, P_wait_1_5, P_wait_1_6, P_wait_1_7, P_wait_2_0, P_wait_2_1, P_wait_2_2, P_wait_2_3, P_wait_2_4, P_wait_2_5, P_wait_2_6, P_wait_2_7, P_wait_3_0, P_wait_3_1, P_wait_3_2, P_wait_3_3, P_wait_3_4, P_wait_3_5, P_wait_3_6, P_wait_3_7, P_wait_4_0, P_wait_4_1, P_wait_4_2, P_wait_4_3, P_wait_4_4, P_wait_4_5, P_wait_4_6, P_wait_4_7, P_wait_5_0, P_wait_5_1, P_wait_5_2, P_wait_5_3, P_wait_5_4, P_wait_5_5, P_wait_5_6, P_wait_5_7, P_wait_6_0, P_wait_6_1, P_wait_6_2, P_wait_6_3, P_wait_6_4, P_wait_6_5, P_wait_6_6, P_wait_6_7, P_wait_7_0, P_wait_7_1, P_wait_7_2, P_wait_7_3, P_wait_7_4, P_wait_7_5, P_wait_7_6, P_wait_7_7, P_await_13_0, P_await_13_1, P_await_13_2, P_await_13_3, P_await_13_4, P_await_13_5, P_await_13_6, P_await_13_7, P_done_0_0, P_done_0_1, P_done_0_2, P_done_0_3, P_done_0_4, P_done_0_5, P_done_0_6, P_done_0_7, P_done_1_0, P_done_1_1, P_done_1_2, P_done_1_3, P_done_1_4, P_done_1_5, P_done_1_6, P_done_1_7, P_done_2_0, P_done_2_1, P_done_2_2, P_done_2_3, P_done_2_4, P_done_2_5, P_done_2_6, P_done_2_7, P_done_3_0, P_done_3_1, P_done_3_2, P_done_3_3, P_done_3_4, P_done_3_5, P_done_3_6, P_done_3_7, P_done_4_0, P_done_4_1, P_done_4_2, P_done_4_3, P_done_4_4, P_done_4_5, P_done_4_6, P_done_4_7, P_done_5_0, P_done_5_1, P_done_5_2, P_done_5_3, P_done_5_4, P_done_5_5, P_done_5_6, P_done_5_7, P_done_6_0, P_done_6_1, P_done_6_2, P_done_6_3, P_done_6_4, P_done_6_5, P_done_6_6, P_done_6_7, P_done_7_0, P_done_7_1, P_done_7_2, P_done_7_3, P_done_7_4, P_done_7_5, P_done_7_6, P_done_7_7, P_ifyi_15_0, P_ifyi_15_1, P_ifyi_15_2, P_ifyi_15_3, P_ifyi_15_4, P_ifyi_15_5, P_ifyi_15_6, P_ifyi_15_7, P_awaity_0, P_awaity_1, P_awaity_2, P_awaity_3, P_awaity_4, P_awaity_5, P_awaity_6, P_awaity_7, P_CS_21_0, P_CS_21_1, P_CS_21_2, P_CS_21_3, P_CS_21_4, P_CS_21_5, P_CS_21_6, P_CS_21_7, P_setbi_24_0, P_setbi_24_1, P_setbi_24_2, P_setbi_24_3, P_setbi_24_4, P_setbi_24_5, P_setbi_24_6, P_setbi_24_7]
[2024-05-24 14:15:44] [INFO ] Parsed PT model containing 264 places and 536 transitions and 2352 arcs in 146 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 20 ms.
Working with output stream class java.io.PrintStream
Deduced a syphon composed of 45 places in 3 ms
Reduce places removed 45 places and 74 transitions.
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 370 ms. (steps per millisecond=27 ) properties (out of 11) seen :6
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 107 ms. (steps per millisecond=93 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2024-05-24 14:15:45] [INFO ] Flow matrix only has 336 transitions (discarded 126 similar events)
// Phase 1: matrix 336 rows 219 cols
[2024-05-24 14:15:45] [INFO ] Computed 65 invariants in 13 ms
[2024-05-24 14:15:45] [INFO ] After 209ms SMT Verify possible using all constraints in real domain returned unsat :4 sat :0 real:1
[2024-05-24 14:15:45] [INFO ] [Nat]Absence check using 65 positive place invariants in 23 ms returned sat
[2024-05-24 14:15:45] [INFO ] After 95ms SMT Verify possible using state equation in natural domain returned unsat :4 sat :1
[2024-05-24 14:15:45] [INFO ] State equation strengthened by 91 read => feed constraints.
[2024-05-24 14:15:45] [INFO ] After 36ms SMT Verify possible using 91 Read/Feed constraints in natural domain returned unsat :4 sat :1
[2024-05-24 14:15:46] [INFO ] After 88ms SMT Verify possible using trap constraints in natural domain returned unsat :4 sat :1
Attempting to minimize the solution found.
Minimization took 34 ms.
[2024-05-24 14:15:46] [INFO ] After 321ms SMT Verify possible using all constraints in natural domain returned unsat :4 sat :1
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 5 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 3 ms.
Support contains 11 out of 219 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 219/219 places, 462/462 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 2 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 217 transition count 460
Free-agglomeration rule (complex) applied 6 times.
Iterating global reduction 0 with 6 rules applied. Total rules applied 10 place count 217 transition count 454
Reduce places removed 6 places and 0 transitions.
Iterating post reduction 0 with 6 rules applied. Total rules applied 16 place count 211 transition count 454
Applied a total of 16 rules in 106 ms. Remains 211 /219 variables (removed 8) and now considering 454/462 (removed 8) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 106 ms. Remains : 211/219 places, 454/462 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 1) seen :0
Finished Best-First random walk after 8985 steps, including 2 resets, run visited all 1 properties in 10 ms. (steps per millisecond=898 )
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 1714 ms.
starting LoLA
BK_INPUT LamportFastMutEx-PT-7
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1716560239447

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 50 (type SKEL/FNDP) for 0 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 0 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 0 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 54 (type SKEL/SRCH) for 0 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 74 transitions removed,45 places removed
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 13 (type CNST) for 12 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 13 (type CNST) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 7 (type CNST) for 6 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
lola: LAUNCH INITIAL
lola: LAUNCH task # 25 (type CNST) for 24 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08
lola: time limit : 0 sec
lola: memory limit: 0 pages

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 25 (type CNST) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08
lola: result : true
lola: FINISHED task # 7 (type CNST) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 51 (type SKEL/EQUN) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00
lola: result : false
lola: CANCELED task # 50 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 53 (type SRCH) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 54 (type SRCH) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00 (obsolete)
lola: LAUNCH task # 73 (type EXCL) for 39 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 57 (type SKEL/FNDP) for 3 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 3 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 60 (type SKEL/SRCH) for 3 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 50 (type SKEL/FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00
lola: result : unknown
lola: fired transitions : 107633
lola: tried executions : 1376
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-58.sara.lola:
rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787

lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 58 (type SKEL/EQUN) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01
lola: result : false
lola: CANCELED task # 57 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01 (obsolete)
lola: CANCELED task # 60 (type SRCH) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01 (obsolete)
lola: LAUNCH task # 92 (type FNDP) for 21 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 93 (type EQUN) for 21 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 95 (type SRCH) for 21 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 57 (type SKEL/FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01
lola: result : unknown
lola: fired transitions : 35139
lola: tried executions : 471
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-93.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 3 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 5/327 1/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 133061 m, 26612 m/sec, 186233 t fired, .
92 EF FNDP 5/163 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 694420 t fired, 1 attempts, .
93 EF STEQ 5/171 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
95 EF SRCH 5/171 3/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 538762 m, 107752 m/sec, 1250534 t fired, .

Time elapsed: 5 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 3 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 10/327 2/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 268861 m, 27160 m/sec, 378705 t fired, .
92 EF FNDP 10/158 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 1398962 t fired, 2 attempts, .
93 EF STEQ 10/166 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
95 EF SRCH 10/166 4/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 1079063 m, 108060 m/sec, 2481351 t fired, .

Time elapsed: 10 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 95 (type SRCH) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 2 0 0 0 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 15/327 2/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 398939 m, 26015 m/sec, 566299 t fired, .
92 EF FNDP 15/153 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 2092371 t fired, 3 attempts, .
93 EF STEQ 15/161 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.

Time elapsed: 15 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 159 (type FNDP) for 15 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 9 1 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 2 0 0 0 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 20/327 3/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 534150 m, 27042 m/sec, 764140 t fired, .
92 EF FNDP 20/156 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 2750026 t fired, 3 attempts, .
93 EF STEQ 20/156 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
159 EF FNDP 5/170 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 506980 t fired, 1 attempts, .

Time elapsed: 20 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 9 1 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 2 0 0 0 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 25/327 3/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 664205 m, 26011 m/sec, 951737 t fired, .
92 EF FNDP 25/151 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 3398480 t fired, 4 attempts, .
93 EF STEQ 25/151 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
159 EF FNDP 10/165 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 1014703 t fired, 2 attempts, .

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LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 9 1 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 2 0 0 0 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 30/327 4/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 790468 m, 25252 m/sec, 1132980 t fired, .
92 EF FNDP 30/146 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 4039690 t fired, 5 attempts, .
93 EF STEQ 30/146 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
159 EF FNDP 15/160 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 1524529 t fired, 2 attempts, .

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LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 9 1 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 2 0 0 0 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 35/327 4/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 914702 m, 24846 m/sec, 1310514 t fired, .
92 EF FNDP 35/141 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 4676412 t fired, 5 attempts, .
93 EF STEQ 35/141 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
159 EF FNDP 20/155 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 2034233 t fired, 3 attempts, .

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LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 9 1 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 2 0 0 0 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 40/327 5/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 1038238 m, 24707 m/sec, 1486893 t fired, .
92 EF FNDP 40/136 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 5309604 t fired, 6 attempts, .
93 EF STEQ 40/136 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
159 EF FNDP 25/150 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 2541671 t fired, 3 attempts, .

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LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 9 1 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 2 0 0 0 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 45/327 5/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 1164423 m, 25237 m/sec, 1667813 t fired, .
92 EF FNDP 45/131 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 5941270 t fired, 6 attempts, .
93 EF STEQ 45/131 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
159 EF FNDP 30/145 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 3048850 t fired, 4 attempts, .

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LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 9 1 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 2 0 0 0 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 50/327 6/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 1290222 m, 25159 m/sec, 1848891 t fired, .
92 EF FNDP 50/126 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 6569225 t fired, 7 attempts, .
93 EF STEQ 50/126 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
159 EF FNDP 35/140 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 3555831 t fired, 4 attempts, .

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LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 9 1 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 2 0 0 0 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 55/327 6/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 1415902 m, 25136 m/sec, 2030163 t fired, .
92 EF FNDP 55/121 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 7195600 t fired, 8 attempts, .
93 EF STEQ 55/121 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
159 EF FNDP 40/135 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 4066795 t fired, 5 attempts, .

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LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 9 1 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 2 0 0 0 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 60/327 7/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 1543310 m, 25481 m/sec, 2214101 t fired, .
92 EF FNDP 60/116 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 7819853 t fired, 8 attempts, .
93 EF STEQ 60/116 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
159 EF FNDP 45/130 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 4581135 t fired, 5 attempts, .

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LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 9 1 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 2 0 0 0 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 65/327 7/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 1667401 m, 24818 m/sec, 2392059 t fired, .
92 EF FNDP 65/111 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 8426209 t fired, 9 attempts, .
93 EF STEQ 65/111 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
159 EF FNDP 50/125 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 5079362 t fired, 6 attempts, .

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LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 9 1 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 2 0 0 0 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 70/327 8/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 1792851 m, 25090 m/sec, 2572419 t fired, .
92 EF FNDP 70/106 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 9047311 t fired, 10 attempts, .
93 EF STEQ 70/106 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
159 EF FNDP 55/120 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 5592728 t fired, 6 attempts, .

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LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 9 1 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 2 0 0 0 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 75/327 8/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 1916838 m, 24797 m/sec, 2749964 t fired, .
92 EF FNDP 75/101 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 9668378 t fired, 10 attempts, .
93 EF STEQ 75/101 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
159 EF FNDP 60/115 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 6105311 t fired, 7 attempts, .

Time elapsed: 75 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 9 1 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 2 0 0 0 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 80/327 9/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 2043329 m, 25298 m/sec, 2932185 t fired, .
92 EF FNDP 80/96 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 10290339 t fired, 11 attempts, .
93 EF STEQ 80/96 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
159 EF FNDP 65/110 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 6617685 t fired, 7 attempts, .

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# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 9 1 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 2 0 0 0 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 85/327 9/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 2168861 m, 25106 m/sec, 3112024 t fired, .
92 EF FNDP 85/91 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 10911256 t fired, 11 attempts, .
93 EF STEQ 85/91 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 sara is running.
159 EF FNDP 70/105 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 7129493 t fired, 8 attempts, .

Time elapsed: 85 secs. Pages in use: 9
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 92 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 (local timeout)
lola: CANCELED task # 93 (type EQUN) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG 0 9 1 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG 0 10 0 0 0 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG 0 7 0 0 0 2 1 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG 0 4 1 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 90/327 10/32 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 2295904 m, 25408 m/sec, 3295177 t fired, .
159 EF FNDP 75/100 0/5 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 7640548 t fired, 8 attempts, .

Time elapsed: 90 secs. Pages in use: 10
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 102 (type FNDP) for 9 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type EQUN) for 9 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 93 (type EQUN) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07
lola: result : unknown
lola: FINISHED task # 92 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07
lola: result : unknown
lola: fired transitions : 11530654
lola: tried executions : 13
lola: time used : 90.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 102 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03
lola: result : true
lola: fired transitions : 71
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 108 (type EQUN) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03 (obsolete)
lola: LAUNCH task # 87 (type FNDP) for 18 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type EQUN) for 18 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-108.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-89.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 89 (type EQUN) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06
lola: result : false
lola: CANCELED task # 87 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06 (obsolete)
lola: LAUNCH task # 97 (type SRCH) for 21 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type SKEL/FNDP) for 21 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 87 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06
lola: result : unknown
lola: fired transitions : 13458
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 97 (type SRCH) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 123 (type FNDP) for 36 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 123 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12
lola: result : true
lola: fired transitions : 87
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 177 (type FNDP) for 42 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 177 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14
lola: result : true
lola: fired transitions : 563
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 117 (type FNDP) for 27 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 117 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09
lola: result : true
lola: fired transitions : 124231
lola: tried executions : 1
lola: time used : 2.000000
lola: memory pages used : 0
lola: LAUNCH task # 158 (type FNDP) for 45 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 158 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15
lola: result : true
lola: fired transitions : 321
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 91 (type FNDP) for 30 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 91 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10
lola: result : true
lola: fired transitions : 8
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 110 (type FNDP) for 33 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 110 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11
lola: result : true
lola: fired transitions : 8
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 160 (type EQUN) for 15 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 160 (type EQUN) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05
lola: result : false
lola: CANCELED task # 159 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05 (obsolete)
lola: LAUNCH task # 81 (type SKEL/EQUN) for 21 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 83 (type SKEL/SRCH) for 21 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 159 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05
lola: result : unknown
lola: fired transitions : 7751697
lola: tried executions : 9
lola: time used : 77.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-81.sara.

lola: FINISHED task # 81 (type SKEL/EQUN) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07
lola: result : false
lola: CANCELED task # 80 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 (obsolete)
lola: CANCELED task # 83 (type SRCH) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07 (obsolete)
lola: LAUNCH task # 69 (type FNDP) for 39 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type EQUN) for 39 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 72 (type SRCH) for 39 LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 80 (type SKEL/FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07
lola: result : unknown
lola: fired transitions : 1288079
lola: tried executions : 10070
lola: time used : 2.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-70.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 70 (type EQUN) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13
lola: result : false
lola: CANCELED task # 69 (type FNDP) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 (obsolete)
lola: CANCELED task # 72 (type SRCH) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 (obsolete)
lola: CANCELED task # 73 (type EXCL) for LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-00: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-01: EF false skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-02: INITIAL false preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-03: AG false findpath
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-04: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-05: AG true state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-06: AG true state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-07: AG true skeleton: state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-08: INITIAL true preprocessing
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-09: AG false findpath
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-10: EF true findpath
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-11: AG false findpath
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-12: AG false findpath
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-13: AG true state equation
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-14: AG false findpath
LamportFastMutEx-PT-7-ReachabilityCardinality-2024-15: EF true findpath


Time elapsed: 92 secs. Pages in use: 11

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-7"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is LamportFastMutEx-PT-7, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r241-tall-171649628300189"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-7.tgz
mv LamportFastMutEx-PT-7 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;