About the Execution of LoLA for Medical-PT-04
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16195.207 | 186254.00 | 189778.00 | 647.90 | [undef] | Cannot compute |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r225-tall-171649614300524.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is Medical-PT-04, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r225-tall-171649614300524
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.6M
-rw-r--r-- 1 mcc users 8.6K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 90K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.2K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 22 14:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Apr 22 14:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Apr 13 14:33 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 153K Apr 13 14:33 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.7K Apr 13 14:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 84K Apr 13 14:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 19 07:13 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 19 15:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 3.1M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Medical-PT-04-LTLFireability-00
FORMULA_NAME Medical-PT-04-LTLFireability-01
FORMULA_NAME Medical-PT-04-LTLFireability-02
FORMULA_NAME Medical-PT-04-LTLFireability-03
FORMULA_NAME Medical-PT-04-LTLFireability-04
FORMULA_NAME Medical-PT-04-LTLFireability-05
FORMULA_NAME Medical-PT-04-LTLFireability-06
FORMULA_NAME Medical-PT-04-LTLFireability-07
FORMULA_NAME Medical-PT-04-LTLFireability-08
FORMULA_NAME Medical-PT-04-LTLFireability-09
FORMULA_NAME Medical-PT-04-LTLFireability-10
FORMULA_NAME Medical-PT-04-LTLFireability-11
FORMULA_NAME Medical-PT-04-LTLFireability-12
FORMULA_NAME Medical-PT-04-LTLFireability-13
FORMULA_NAME Medical-PT-04-LTLFireability-14
FORMULA_NAME Medical-PT-04-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717076551193
BK_STOP 1717076737447
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 5204 transitions removed,242 places removed
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 Medical-PT-04-LTLFireability-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for Medical-PT-04-LTLFireability-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 23 (type CNST) for 22 Medical-PT-04-LTLFireability-06
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 23 (type CNST) for Medical-PT-04-LTLFireability-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 44 (type CNST) for 43 Medical-PT-04-LTLFireability-13
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 Medical-PT-04-LTLFireability-14
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 44 (type CNST) for Medical-PT-04-LTLFireability-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 11 (type CNST) for 10 Medical-PT-04-LTLFireability-02
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 29 (type CNST) for 28 Medical-PT-04-LTLFireability-08
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 35 (type CNST) for 34 Medical-PT-04-LTLFireability-10
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 11 (type CNST) for Medical-PT-04-LTLFireability-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 35 (type CNST) for Medical-PT-04-LTLFireability-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 29 (type CNST) for Medical-PT-04-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for Medical-PT-04-LTLFireability-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 45
[[35mlola[0m][I] fired transitions : 87
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 6 (type EXCL) for 3 Medical-PT-04-LTLFireability-01
[[35mlola[0m][I] time limit : 299 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 6 (type EXCL) for Medical-PT-04-LTLFireability-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 6
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 17 (type CNST) for 16 Medical-PT-04-LTLFireability-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 37 Medical-PT-04-LTLFireability-11
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 17 (type CNST) for Medical-PT-04-LTLFireability-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for Medical-PT-04-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 Medical-PT-04-LTLFireability-09
[[35mlola[0m][I] time limit : 514 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 32 (type EXCL) for Medical-PT-04-LTLFireability-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 40 Medical-PT-04-LTLFireability-12
[[35mlola[0m][I] time limit : 599 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 41 (type EXCL) for Medical-PT-04-LTLFireability-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 Medical-PT-04-LTLFireability-15
[[35mlola[0m][I] time limit : 719 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 50 (type EXCL) for Medical-PT-04-LTLFireability-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 Medical-PT-04-LTLFireability-07
[[35mlola[0m][I] time limit : 899 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 26 (type EXCL) for Medical-PT-04-LTLFireability-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 20 (type EXCL) for 19 Medical-PT-04-LTLFireability-05
[[35mlola[0m][I] time limit : 1199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 20 (type EXCL) for Medical-PT-04-LTLFireability-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 45
[[35mlola[0m][I] fired transitions : 87
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL) for 13 Medical-PT-04-LTLFireability-03
[[35mlola[0m][I] time limit : 1799 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 14 (type EXCL) for Medical-PT-04-LTLFireability-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 8 (type EXCL) for 3 Medical-PT-04-LTLFireability-01
[[35mlola[0m][I] time limit : 3598 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 3/3598 14/2000 Medical-PT-04-LTLFireability-01 2073736 m, 414747 m/sec, 2592599 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 8/3598 35/2000 Medical-PT-04-LTLFireability-01 5154300 m, 616112 m/sec, 6443303 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 13/3598 55/2000 Medical-PT-04-LTLFireability-01 8189392 m, 607018 m/sec, 10237171 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 18/3598 75/2000 Medical-PT-04-LTLFireability-01 11200844 m, 602290 m/sec, 14001485 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 23/3598 94/2000 Medical-PT-04-LTLFireability-01 14188354 m, 597502 m/sec, 17735871 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 94
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 28/3598 114/2000 Medical-PT-04-LTLFireability-01 17156259 m, 593581 m/sec, 21445752 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 114
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 33/3598 134/2000 Medical-PT-04-LTLFireability-01 20124886 m, 593725 m/sec, 25156536 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 134
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 38/3598 153/2000 Medical-PT-04-LTLFireability-01 23067509 m, 588524 m/sec, 28834817 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 153
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 43/3598 173/2000 Medical-PT-04-LTLFireability-01 26016897 m, 589877 m/sec, 32521551 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 173
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 48/3598 192/2000 Medical-PT-04-LTLFireability-01 28977730 m, 592166 m/sec, 36222592 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 53/3598 211/2000 Medical-PT-04-LTLFireability-01 31908972 m, 586248 m/sec, 39886644 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 211
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 58/3598 231/2000 Medical-PT-04-LTLFireability-01 34844759 m, 587157 m/sec, 43556378 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 231
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 63/3598 250/2000 Medical-PT-04-LTLFireability-01 37760520 m, 583152 m/sec, 47201079 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 250
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 68/3598 270/2000 Medical-PT-04-LTLFireability-01 40692730 m, 586442 m/sec, 50866342 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 270
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 73/3598 289/2000 Medical-PT-04-LTLFireability-01 43608074 m, 583068 m/sec, 54510520 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 289
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 78/3598 308/2000 Medical-PT-04-LTLFireability-01 46516084 m, 581602 m/sec, 58145533 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 308
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 83/3598 327/2000 Medical-PT-04-LTLFireability-01 49409612 m, 578705 m/sec, 61762445 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 327
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 88/3598 346/2000 Medical-PT-04-LTLFireability-01 52319872 m, 582052 m/sec, 65400270 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 346
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 93/3598 366/2000 Medical-PT-04-LTLFireability-01 55214598 m, 578945 m/sec, 69018677 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 366
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 98/3598 385/2000 Medical-PT-04-LTLFireability-01 58097549 m, 576590 m/sec, 72622367 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 385
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 103/3598 404/2000 Medical-PT-04-LTLFireability-01 60975004 m, 575491 m/sec, 76219185 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 404
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 108/3598 423/2000 Medical-PT-04-LTLFireability-01 63857908 m, 576580 m/sec, 79822814 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 423
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 113/3598 442/2000 Medical-PT-04-LTLFireability-01 66735771 m, 575572 m/sec, 83420141 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 442
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 118/3598 461/2000 Medical-PT-04-LTLFireability-01 69593995 m, 571644 m/sec, 86992924 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 461
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 123/3598 480/2000 Medical-PT-04-LTLFireability-01 72451905 m, 571582 m/sec, 90565311 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 480
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 128/3598 498/2000 Medical-PT-04-LTLFireability-01 75307712 m, 571161 m/sec, 94135070 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 498
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 133/3598 518/2000 Medical-PT-04-LTLFireability-01 78201911 m, 578839 m/sec, 97752818 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 518
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 138/3598 537/2000 Medical-PT-04-LTLFireability-01 81068561 m, 573330 m/sec, 101336131 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 537
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 143/3598 555/2000 Medical-PT-04-LTLFireability-01 83931165 m, 572520 m/sec, 104914386 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 555
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 148/3598 574/2000 Medical-PT-04-LTLFireability-01 86787874 m, 571341 m/sec, 108485272 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 574
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 153/3598 593/2000 Medical-PT-04-LTLFireability-01 89642477 m, 570920 m/sec, 112053527 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 593
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 158/3598 612/2000 Medical-PT-04-LTLFireability-01 92496032 m, 570711 m/sec, 115620470 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 612
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 163/3598 631/2000 Medical-PT-04-LTLFireability-01 95340186 m, 568830 m/sec, 119175663 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 631
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 168/3598 650/2000 Medical-PT-04-LTLFireability-01 98173692 m, 566701 m/sec, 122717544 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 650
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 173/3598 668/2000 Medical-PT-04-LTLFireability-01 101005839 m, 566429 m/sec, 126257726 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 668
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 178/3598 687/2000 Medical-PT-04-LTLFireability-01 103887942 m, 576420 m/sec, 129860358 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 687
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-03: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-09: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-11: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMedical-PT-04-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMedical-PT-04-LTLFireability-15: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Medical-PT-04-LTLFireability-01: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 LTL EXCL 183/3598 706/2000 Medical-PT-04-LTLFireability-01 106759753 m, 574362 m/sec, 133450119 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 706
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 405 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Medical-PT-04"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is Medical-PT-04, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r225-tall-171649614300524"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Medical-PT-04.tgz
mv Medical-PT-04 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;