About the Execution of LoLA for MAPKbis-PT-5310
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16208.119 | 486788.00 | 490384.00 | 1736.10 | TTTTF?FTFF?FFTF? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r225-tall-171649614200499.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is MAPKbis-PT-5310, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r225-tall-171649614200499
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 700K
-rw-r--r-- 1 mcc users 9.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 84K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 15K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 66K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Apr 22 14:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.7K Apr 22 14:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 11 16:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 123K Apr 11 16:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 22K Apr 11 16:01 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 82K Apr 11 16:01 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 22 14:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 170K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-00
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-01
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-02
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-03
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-04
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-05
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-06
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-07
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-08
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-09
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-10
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-11
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-12
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-13
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-14
FORMULA_NAME MAPKbis-PT-5310-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717075949074
FORMULA MAPKbis-PT-5310-LTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPKbis-PT-5310-LTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPKbis-PT-5310-LTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPKbis-PT-5310-LTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPKbis-PT-5310-LTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPKbis-PT-5310-LTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPKbis-PT-5310-LTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPKbis-PT-5310-LTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPKbis-PT-5310-LTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPKbis-PT-5310-LTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPKbis-PT-5310-LTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPKbis-PT-5310-LTLCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPKbis-PT-5310-LTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717076435862
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 MAPKbis-PT-5310-LTLCardinality-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for MAPKbis-PT-5310-LTLCardinality-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] Rule S: 41 transitions removed,11 places removed
[[35mlola[0m][I] LAUNCH task # 28 (type CNST) for 27 MAPKbis-PT-5310-LTLCardinality-09
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 28 (type CNST) for MAPKbis-PT-5310-LTLCardinality-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 43 (type CNST) for 42 MAPKbis-PT-5310-LTLCardinality-14
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 43 (type CNST) for MAPKbis-PT-5310-LTLCardinality-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 34 (type CNST) for 33 MAPKbis-PT-5310-LTLCardinality-11
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 34 (type CNST) for MAPKbis-PT-5310-LTLCardinality-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 MAPKbis-PT-5310-LTLCardinality-02
[[35mlola[0m][I] time limit : 300 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 52 (type EQUN) for 3 MAPKbis-PT-5310-LTLCardinality-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for MAPKbis-PT-5310-LTLCardinality-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 10
[[35mlola[0m][I] fired transitions : 10
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 MAPKbis-PT-5310-LTLCardinality-08
[[35mlola[0m][I] time limit : 327 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 25 (type EXCL) for MAPKbis-PT-5310-LTLCardinality-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 48
[[35mlola[0m][I] fired transitions : 49
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 40 (type EXCL) for 39 MAPKbis-PT-5310-LTLCardinality-13
[[35mlola[0m][I] time limit : 360 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 54 (type FNDP) for 36 MAPKbis-PT-5310-LTLCardinality-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 55 (type EQUN) for 36 MAPKbis-PT-5310-LTLCardinality-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 40 (type EXCL) for MAPKbis-PT-5310-LTLCardinality-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 MAPKbis-PT-5310-LTLCardinality-07
[[35mlola[0m][I] time limit : 400 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for MAPKbis-PT-5310-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 MAPKbis-PT-5310-LTLCardinality-03
[[35mlola[0m][I] time limit : 450 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for MAPKbis-PT-5310-LTLCardinality-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 56 (type EXCL) for 36 MAPKbis-PT-5310-LTLCardinality-12
[[35mlola[0m][I] time limit : 514 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 56 (type EXCL) for MAPKbis-PT-5310-LTLCardinality-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 13
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 54 (type FNDP) for MAPKbis-PT-5310-LTLCardinality-12 (obsolete)
[[35mlola[0m][W] CANCELED task # 55 (type EQUN) for MAPKbis-PT-5310-LTLCardinality-12 (obsolete)
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 MAPKbis-PT-5310-LTLCardinality-06
[[35mlola[0m][I] time limit : 600 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for MAPKbis-PT-5310-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 35
[[35mlola[0m][I] fired transitions : 35
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 3 MAPKbis-PT-5310-LTLCardinality-01
[[35mlola[0m][I] time limit : 720 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 49 (type EXCL) for MAPKbis-PT-5310-LTLCardinality-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 52 (type EQUN) for MAPKbis-PT-5310-LTLCardinality-01 (obsolete)
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 MAPKbis-PT-5310-LTLCardinality-04
[[35mlola[0m][I] time limit : 900 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for MAPKbis-PT-5310-LTLCardinality-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 35
[[35mlola[0m][I] fired transitions : 35
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 MAPKbis-PT-5310-LTLCardinality-15
[[35mlola[0m][I] time limit : 1200 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 54 (type FNDP) for MAPKbis-PT-5310-LTLCardinality-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for MAPKbis-PT-5310-LTLCardinality-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 289
[[35mlola[0m][I] fired transitions : 316
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 MAPKbis-PT-5310-LTLCardinality-05
[[35mlola[0m][I] time limit : 1800 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 52 (type EQUN) for MAPKbis-PT-5310-LTLCardinality-01
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 55 (type EQUN) for MAPKbis-PT-5310-LTLCardinality-12
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 5/1800 9/2000 MAPKbis-PT-5310-LTLCardinality-05 1326011 m, 265202 m/sec, 2142300 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 10/1800 17/2000 MAPKbis-PT-5310-LTLCardinality-05 2504771 m, 235752 m/sec, 4238054 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 15/1800 24/2000 MAPKbis-PT-5310-LTLCardinality-05 3636904 m, 226426 m/sec, 6328482 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 20/1800 31/2000 MAPKbis-PT-5310-LTLCardinality-05 4737356 m, 220090 m/sec, 8414804 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 25/1800 38/2000 MAPKbis-PT-5310-LTLCardinality-05 5806116 m, 213752 m/sec, 10483174 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 30/1800 45/2000 MAPKbis-PT-5310-LTLCardinality-05 6869772 m, 212731 m/sec, 12577853 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 35/1800 52/2000 MAPKbis-PT-5310-LTLCardinality-05 7909403 m, 207926 m/sec, 14655165 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 40/1800 58/2000 MAPKbis-PT-5310-LTLCardinality-05 8937503 m, 205620 m/sec, 16735156 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 45/1800 65/2000 MAPKbis-PT-5310-LTLCardinality-05 9970010 m, 206501 m/sec, 18849109 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 65
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 50/1800 72/2000 MAPKbis-PT-5310-LTLCardinality-05 10991098 m, 204217 m/sec, 20952102 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 55/1800 78/2000 MAPKbis-PT-5310-LTLCardinality-05 12006709 m, 203122 m/sec, 23066275 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 60/1800 85/2000 MAPKbis-PT-5310-LTLCardinality-05 13013708 m, 201399 m/sec, 25181718 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 85
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 65/1800 91/2000 MAPKbis-PT-5310-LTLCardinality-05 14009557 m, 199169 m/sec, 27290728 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 91
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 70/1800 98/2000 MAPKbis-PT-5310-LTLCardinality-05 14997737 m, 197636 m/sec, 29397597 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 75/1800 104/2000 MAPKbis-PT-5310-LTLCardinality-05 15977443 m, 195941 m/sec, 31501059 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 104
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 80/1800 110/2000 MAPKbis-PT-5310-LTLCardinality-05 16952791 m, 195069 m/sec, 33609484 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 85/1800 117/2000 MAPKbis-PT-5310-LTLCardinality-05 17926739 m, 194789 m/sec, 35718666 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 90/1800 123/2000 MAPKbis-PT-5310-LTLCardinality-05 18895279 m, 193708 m/sec, 37829271 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 123
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 95/1800 129/2000 MAPKbis-PT-5310-LTLCardinality-05 19858232 m, 192590 m/sec, 39938155 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 129
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 100/1800 135/2000 MAPKbis-PT-5310-LTLCardinality-05 20814051 m, 191163 m/sec, 42035381 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 105/1800 142/2000 MAPKbis-PT-5310-LTLCardinality-05 21770686 m, 191327 m/sec, 44145249 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 110/1800 148/2000 MAPKbis-PT-5310-LTLCardinality-05 22720690 m, 190000 m/sec, 46249403 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 115/1800 154/2000 MAPKbis-PT-5310-LTLCardinality-05 23663519 m, 188565 m/sec, 48352657 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 120/1800 160/2000 MAPKbis-PT-5310-LTLCardinality-05 24604572 m, 188210 m/sec, 50453998 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 160
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 125/1800 166/2000 MAPKbis-PT-5310-LTLCardinality-05 25543577 m, 187801 m/sec, 52559451 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 130/1800 172/2000 MAPKbis-PT-5310-LTLCardinality-05 26474517 m, 186188 m/sec, 54657672 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 172
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 135/1800 178/2000 MAPKbis-PT-5310-LTLCardinality-05 27405041 m, 186104 m/sec, 56761623 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 140/1800 184/2000 MAPKbis-PT-5310-LTLCardinality-05 28330683 m, 185128 m/sec, 58859416 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 184
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 145/1800 190/2000 MAPKbis-PT-5310-LTLCardinality-05 29256721 m, 185207 m/sec, 60966985 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 150/1800 196/2000 MAPKbis-PT-5310-LTLCardinality-05 30180949 m, 184845 m/sec, 63083479 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 196
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 155/1800 202/2000 MAPKbis-PT-5310-LTLCardinality-05 31103581 m, 184526 m/sec, 65196694 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 202
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 160/1800 208/2000 MAPKbis-PT-5310-LTLCardinality-05 32019301 m, 183144 m/sec, 67301187 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 165/1800 214/2000 MAPKbis-PT-5310-LTLCardinality-05 32928176 m, 181775 m/sec, 69399225 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 170/1800 220/2000 MAPKbis-PT-5310-LTLCardinality-05 33837130 m, 181790 m/sec, 71508182 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 220
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 175/1800 226/2000 MAPKbis-PT-5310-LTLCardinality-05 34744659 m, 181505 m/sec, 73608683 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 226
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 180/1800 232/2000 MAPKbis-PT-5310-LTLCardinality-05 35652280 m, 181524 m/sec, 75721720 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 232
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 185/1800 238/2000 MAPKbis-PT-5310-LTLCardinality-05 36553452 m, 180234 m/sec, 77827712 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 238
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 190/1800 243/2000 MAPKbis-PT-5310-LTLCardinality-05 37453023 m, 179914 m/sec, 79932074 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 190 secs. Pages in use: 243
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 195/1800 249/2000 MAPKbis-PT-5310-LTLCardinality-05 38353056 m, 180006 m/sec, 82043872 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 195 secs. Pages in use: 249
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 200/1800 255/2000 MAPKbis-PT-5310-LTLCardinality-05 39249523 m, 179293 m/sec, 84150504 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 200 secs. Pages in use: 255
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 205/1800 261/2000 MAPKbis-PT-5310-LTLCardinality-05 40144582 m, 179011 m/sec, 86257272 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 205 secs. Pages in use: 261
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 210/1800 267/2000 MAPKbis-PT-5310-LTLCardinality-05 41034445 m, 177972 m/sec, 88363178 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 210 secs. Pages in use: 267
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 215/1800 272/2000 MAPKbis-PT-5310-LTLCardinality-05 41922643 m, 177639 m/sec, 90464519 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 215 secs. Pages in use: 272
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 220/1800 278/2000 MAPKbis-PT-5310-LTLCardinality-05 42806035 m, 176678 m/sec, 92564934 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 220 secs. Pages in use: 278
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 225/1800 284/2000 MAPKbis-PT-5310-LTLCardinality-05 43686811 m, 176155 m/sec, 94667846 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 225 secs. Pages in use: 284
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 230/1800 290/2000 MAPKbis-PT-5310-LTLCardinality-05 44576131 m, 177864 m/sec, 96781990 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 230 secs. Pages in use: 290
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 235/1800 295/2000 MAPKbis-PT-5310-LTLCardinality-05 45455947 m, 175963 m/sec, 98885431 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 235 secs. Pages in use: 295
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 240/1800 301/2000 MAPKbis-PT-5310-LTLCardinality-05 46331119 m, 175034 m/sec, 100978242 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 240 secs. Pages in use: 301
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 245/1800 307/2000 MAPKbis-PT-5310-LTLCardinality-05 47204081 m, 174592 m/sec, 103069709 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 245 secs. Pages in use: 307
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 250/1800 312/2000 MAPKbis-PT-5310-LTLCardinality-05 48075171 m, 174218 m/sec, 105169818 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 250 secs. Pages in use: 312
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 255/1800 318/2000 MAPKbis-PT-5310-LTLCardinality-05 48939554 m, 172876 m/sec, 107246615 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 255 secs. Pages in use: 318
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 260/1800 323/2000 MAPKbis-PT-5310-LTLCardinality-05 49802879 m, 172665 m/sec, 109336729 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 260 secs. Pages in use: 323
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 265/1800 329/2000 MAPKbis-PT-5310-LTLCardinality-05 50671371 m, 173698 m/sec, 111433462 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 265 secs. Pages in use: 329
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 270/1800 335/2000 MAPKbis-PT-5310-LTLCardinality-05 51536898 m, 173105 m/sec, 113534279 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 270 secs. Pages in use: 335
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 275/1800 340/2000 MAPKbis-PT-5310-LTLCardinality-05 52399158 m, 172452 m/sec, 115624706 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 275 secs. Pages in use: 340
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 280/1800 346/2000 MAPKbis-PT-5310-LTLCardinality-05 53255810 m, 171330 m/sec, 117705370 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 280 secs. Pages in use: 346
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 285/1800 351/2000 MAPKbis-PT-5310-LTLCardinality-05 54113568 m, 171551 m/sec, 119802927 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 285 secs. Pages in use: 351
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 290/1800 357/2000 MAPKbis-PT-5310-LTLCardinality-05 54968681 m, 171022 m/sec, 121894021 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 290 secs. Pages in use: 357
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 295/1800 363/2000 MAPKbis-PT-5310-LTLCardinality-05 55823630 m, 170989 m/sec, 123994644 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 295 secs. Pages in use: 363
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 300/1800 368/2000 MAPKbis-PT-5310-LTLCardinality-05 56674797 m, 170233 m/sec, 126087994 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 300 secs. Pages in use: 368
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 305/1800 374/2000 MAPKbis-PT-5310-LTLCardinality-05 57524212 m, 169883 m/sec, 128170704 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 305 secs. Pages in use: 374
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 310/1800 379/2000 MAPKbis-PT-5310-LTLCardinality-05 58374364 m, 170030 m/sec, 130251634 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 310 secs. Pages in use: 379
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 315/1800 385/2000 MAPKbis-PT-5310-LTLCardinality-05 59224621 m, 170051 m/sec, 132345830 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 315 secs. Pages in use: 385
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 320/1800 390/2000 MAPKbis-PT-5310-LTLCardinality-05 60071804 m, 169436 m/sec, 134437482 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 320 secs. Pages in use: 390
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 325/1800 396/2000 MAPKbis-PT-5310-LTLCardinality-05 60916181 m, 168875 m/sec, 136525536 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 325 secs. Pages in use: 396
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 330/1800 401/2000 MAPKbis-PT-5310-LTLCardinality-05 61776780 m, 172119 m/sec, 138653163 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 401
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 335/1800 407/2000 MAPKbis-PT-5310-LTLCardinality-05 62629994 m, 170642 m/sec, 140770539 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 407
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 340/1800 412/2000 MAPKbis-PT-5310-LTLCardinality-05 63482439 m, 170489 m/sec, 142887199 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 412
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 345/1800 418/2000 MAPKbis-PT-5310-LTLCardinality-05 64332129 m, 169938 m/sec, 144993479 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 418
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 350/1800 423/2000 MAPKbis-PT-5310-LTLCardinality-05 65177755 m, 169125 m/sec, 147098766 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 423
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 355/1800 429/2000 MAPKbis-PT-5310-LTLCardinality-05 66021437 m, 168736 m/sec, 149189370 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 429
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 360/1800 434/2000 MAPKbis-PT-5310-LTLCardinality-05 66870523 m, 169817 m/sec, 151308235 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 434
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 365/1800 440/2000 MAPKbis-PT-5310-LTLCardinality-05 67722059 m, 170307 m/sec, 153431298 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 440
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 370/1800 445/2000 MAPKbis-PT-5310-LTLCardinality-05 68573987 m, 170385 m/sec, 155559125 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 445
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 375/1800 451/2000 MAPKbis-PT-5310-LTLCardinality-05 69414189 m, 168040 m/sec, 157667824 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 451
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 380/1800 456/2000 MAPKbis-PT-5310-LTLCardinality-05 70259149 m, 168992 m/sec, 159786546 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 456
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 385/1800 462/2000 MAPKbis-PT-5310-LTLCardinality-05 71102016 m, 168573 m/sec, 161912039 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 462
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 390/1800 467/2000 MAPKbis-PT-5310-LTLCardinality-05 71944489 m, 168494 m/sec, 164022080 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 467
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 395/1800 473/2000 MAPKbis-PT-5310-LTLCardinality-05 72786912 m, 168484 m/sec, 166132475 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 473
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 400/1800 478/2000 MAPKbis-PT-5310-LTLCardinality-05 73628266 m, 168270 m/sec, 168244092 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 478
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 405/1800 483/2000 MAPKbis-PT-5310-LTLCardinality-05 74468842 m, 168115 m/sec, 170360941 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 483
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 410/1800 489/2000 MAPKbis-PT-5310-LTLCardinality-05 75307457 m, 167723 m/sec, 172476347 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 489
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 415/1800 494/2000 MAPKbis-PT-5310-LTLCardinality-05 76143262 m, 167161 m/sec, 174586868 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 494
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 420/1800 500/2000 MAPKbis-PT-5310-LTLCardinality-05 76979888 m, 167325 m/sec, 176710148 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 420 secs. Pages in use: 500
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 425/1800 505/2000 MAPKbis-PT-5310-LTLCardinality-05 77813926 m, 166807 m/sec, 178824164 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 425 secs. Pages in use: 505
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 430/1800 511/2000 MAPKbis-PT-5310-LTLCardinality-05 78646220 m, 166458 m/sec, 180942677 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 430 secs. Pages in use: 511
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 435/1800 516/2000 MAPKbis-PT-5310-LTLCardinality-05 79479080 m, 166572 m/sec, 183063308 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 435 secs. Pages in use: 516
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 440/1800 521/2000 MAPKbis-PT-5310-LTLCardinality-05 80310959 m, 166375 m/sec, 185171775 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 440 secs. Pages in use: 521
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 445/1800 527/2000 MAPKbis-PT-5310-LTLCardinality-05 81144445 m, 166697 m/sec, 187304509 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 445 secs. Pages in use: 527
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 450/1800 532/2000 MAPKbis-PT-5310-LTLCardinality-05 81976444 m, 166399 m/sec, 189414355 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 450 secs. Pages in use: 532
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 455/1800 537/2000 MAPKbis-PT-5310-LTLCardinality-05 82801999 m, 165111 m/sec, 191527343 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 455 secs. Pages in use: 537
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 460/1800 543/2000 MAPKbis-PT-5310-LTLCardinality-05 83628310 m, 165262 m/sec, 193639363 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 460 secs. Pages in use: 543
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 465/1800 548/2000 MAPKbis-PT-5310-LTLCardinality-05 84461461 m, 166630 m/sec, 195769593 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 465 secs. Pages in use: 548
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 470/1800 554/2000 MAPKbis-PT-5310-LTLCardinality-05 85294497 m, 166607 m/sec, 197895326 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 470 secs. Pages in use: 554
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 475/1800 559/2000 MAPKbis-PT-5310-LTLCardinality-05 86126471 m, 166394 m/sec, 200019616 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 475 secs. Pages in use: 559
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-04: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-12: AG false state space[0m
[[35mlola[0m][.] [1m[32mMAPKbis-PT-5310-LTLCardinality-13: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mMAPKbis-PT-5310-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] MAPKbis-PT-5310-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 480/1800 561/2000 MAPKbis-PT-5310-LTLCardinality-05 86483994 m, 71504 m/sec, 200939138 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 480 secs. Pages in use: 561
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 415 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MAPKbis-PT-5310"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is MAPKbis-PT-5310, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r225-tall-171649614200499"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/MAPKbis-PT-5310.tgz
mv MAPKbis-PT-5310 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;