Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r225-tall-171649614200482.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is MAPK-PT-05120, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r225-tall-171649614200482
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 476K
-rw-r--r-- 1 mcc users 8.1K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.7K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 70K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K May 19 07:11 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 19 16:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Apr 22 14:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 22 14:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.2K Apr 13 07:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 61K Apr 13 07:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 13 07:49 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 104K Apr 13 07:49 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 25K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME MAPK-PT-05120-CTLFireability-2024-00
FORMULA_NAME MAPK-PT-05120-CTLFireability-2024-01
FORMULA_NAME MAPK-PT-05120-CTLFireability-2024-02
FORMULA_NAME MAPK-PT-05120-CTLFireability-2024-03
FORMULA_NAME MAPK-PT-05120-CTLFireability-2024-04
FORMULA_NAME MAPK-PT-05120-CTLFireability-2024-05
FORMULA_NAME MAPK-PT-05120-CTLFireability-2024-06
FORMULA_NAME MAPK-PT-05120-CTLFireability-2024-07
FORMULA_NAME MAPK-PT-05120-CTLFireability-2024-08
FORMULA_NAME MAPK-PT-05120-CTLFireability-2024-09
FORMULA_NAME MAPK-PT-05120-CTLFireability-2024-10
FORMULA_NAME MAPK-PT-05120-CTLFireability-2024-11
FORMULA_NAME MAPK-PT-05120-CTLFireability-2023-12
FORMULA_NAME MAPK-PT-05120-CTLFireability-2023-13
FORMULA_NAME MAPK-PT-05120-CTLFireability-2023-14
FORMULA_NAME MAPK-PT-05120-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717075376129


BK_STOP 1717075693740

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from CTLFireability.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 10 (type EXCL) for 9 MAPK-PT-05120-CTLFireability-2024-03
[lola][I] time limit : 128 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] MAPK-PT-05120-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-10: DISJ 0 2 0 0 2 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-15: DISJ 0 3 0 0 3 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 10 CTL EXCL 5/189 11/2000 MAPK-PT-05120-CTLFireability-2024-03 2105880 m, 421176 m/sec, 7366077 t fired, .
[lola][.]
[lola][.] Time elapsed: 5 secs. Pages in use: 11
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[lola][.] MAPK-PT-05120-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-10: DISJ 0 2 0 0 2 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-15: DISJ 0 3 0 0 3 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 10 CTL EXCL 10/189 20/2000 MAPK-PT-05120-CTLFireability-2024-03 4044537 m, 387731 m/sec, 14150506 t fired, .
[lola][.]
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[lola][.] MAPK-PT-05120-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-10: DISJ 0 2 0 0 2 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-15: DISJ 0 3 0 0 3 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 10 CTL EXCL 15/189 29/2000 MAPK-PT-05120-CTLFireability-2024-03 5895980 m, 370288 m/sec, 20630118 t fired, .
[lola][.]
[lola][.] Time elapsed: 15 secs. Pages in use: 29
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[lola][.] MAPK-PT-05120-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-10: DISJ 0 2 0 0 2 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-15: DISJ 0 3 0 0 3 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 10 CTL EXCL 20/189 38/2000 MAPK-PT-05120-CTLFireability-2024-03 7833870 m, 387578 m/sec, 27406707 t fired, .
[lola][.]
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[lola][.] MAPK-PT-05120-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-10: DISJ 0 2 0 0 2 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-15: DISJ 0 3 0 0 3 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 10 CTL EXCL 25/189 46/2000 MAPK-PT-05120-CTLFireability-2024-03 9603636 m, 353953 m/sec, 33600268 t fired, .
[lola][.]
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[lola][.] MAPK-PT-05120-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-10: DISJ 0 2 0 0 2 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-15: DISJ 0 3 0 0 3 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 10 CTL EXCL 30/189 53/2000 MAPK-PT-05120-CTLFireability-2024-03 11295726 m, 338418 m/sec, 39521259 t fired, .
[lola][.]
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[lola][.] MAPK-PT-05120-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-10: DISJ 0 2 0 0 2 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-15: DISJ 0 3 0 0 3 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 10 CTL EXCL 35/189 61/2000 MAPK-PT-05120-CTLFireability-2024-03 12925105 m, 325875 m/sec, 45223448 t fired, .
[lola][.]
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[lola][.] MAPK-PT-05120-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-10: DISJ 0 2 0 0 2 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-15: DISJ 0 3 0 0 3 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 10 CTL EXCL 40/189 70/2000 MAPK-PT-05120-CTLFireability-2024-03 14986872 m, 412353 m/sec, 52434608 t fired, .
[lola][.]
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[lola][.] MAPK-PT-05120-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-10: DISJ 0 2 0 0 2 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-15: DISJ 0 3 0 0 3 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 10 CTL EXCL 45/189 78/2000 MAPK-PT-05120-CTLFireability-2024-03 16973700 m, 397365 m/sec, 59387510 t fired, .
[lola][.]
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[lola][.] 10 CTL EXCL 50/189 86/2000 MAPK-PT-05120-CTLFireability-2024-03 18910544 m, 387368 m/sec, 66164930 t fired, .
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[lola][.] 10 CTL EXCL 95/189 164/2000 MAPK-PT-05120-CTLFireability-2024-03 37384314 m, 422347 m/sec, 130810875 t fired, .
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[lola][.] 10 CTL EXCL 100/189 173/2000 MAPK-PT-05120-CTLFireability-2024-03 39488809 m, 420899 m/sec, 138176810 t fired, .
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[lola][.] 10 CTL EXCL 150/189 261/2000 MAPK-PT-05120-CTLFireability-2024-03 60314584 m, 402262 m/sec, 216942852 t fired, .
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[lola][.] 10 CTL EXCL 155/189 269/2000 MAPK-PT-05120-CTLFireability-2024-03 62247477 m, 386578 m/sec, 224352440 t fired, .
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[lola][.] 10 CTL EXCL 160/189 277/2000 MAPK-PT-05120-CTLFireability-2024-03 64193329 m, 389170 m/sec, 231810661 t fired, .
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[lola][.] 10 CTL EXCL 175/189 302/2000 MAPK-PT-05120-CTLFireability-2024-03 70006506 m, 393297 m/sec, 254092836 t fired, .
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[lola][.] 10 CTL EXCL 180/189 310/2000 MAPK-PT-05120-CTLFireability-2024-03 71925529 m, 383804 m/sec, 261448973 t fired, .
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[lola][.] 10 CTL EXCL 185/189 318/2000 MAPK-PT-05120-CTLFireability-2024-03 73832399 m, 381374 m/sec, 268758603 t fired, .
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[lola][.] MAPK-PT-05120-CTLFireability-2023-12: CTL true CTL model checker
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[lola][.] 38 CTL EXCL 5/261 13/2000 MAPK-PT-05120-CTLFireability-2024-11 2615088 m, 523017 m/sec, 6532928 t fired, .
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[lola][.] MAPK-PT-05120-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] MAPK-PT-05120-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] MAPK-PT-05120-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-10: DISJ 0 2 0 0 2 0 0 0
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[lola][.] 38 CTL EXCL 10/261 24/2000 MAPK-PT-05120-CTLFireability-2024-11 4911814 m, 459345 m/sec, 12274225 t fired, .
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[lola][.] MAPK-PT-05120-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] MAPK-PT-05120-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] MAPK-PT-05120-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-10: DISJ 0 2 0 0 2 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.]
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[lola][.] 38 CTL EXCL 15/261 34/2000 MAPK-PT-05120-CTLFireability-2024-11 7098075 m, 437252 m/sec, 17734325 t fired, .
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[lola][.] MAPK-PT-05120-CTLFireability-2023-14: CTL true CTL model checker
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[lola][.] MAPK-PT-05120-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-10: DISJ 0 2 0 0 2 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
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[lola][.] 38 CTL EXCL 20/261 45/2000 MAPK-PT-05120-CTLFireability-2024-11 9342610 m, 448907 m/sec, 23343838 t fired, .
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[lola][.] MAPK-PT-05120-CTLFireability-2023-14: CTL true CTL model checker
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[lola][.] MAPK-PT-05120-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
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[lola][.] MAPK-PT-05120-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
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[lola][.] 38 CTL EXCL 25/261 54/2000 MAPK-PT-05120-CTLFireability-2024-11 11375749 m, 406627 m/sec, 28426248 t fired, .
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[lola][.] 38 CTL EXCL 30/261 62/2000 MAPK-PT-05120-CTLFireability-2024-11 13123852 m, 349620 m/sec, 32792333 t fired, .
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[lola][I] markings : 1292
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[lola][.] 22 CTL EXCL 4/421 12/2000 MAPK-PT-05120-CTLFireability-2024-07 2381409 m, 476281 m/sec, 5948925 t fired, .
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[lola][.] 22 CTL EXCL 9/421 24/2000 MAPK-PT-05120-CTLFireability-2024-07 4860187 m, 495755 m/sec, 12144595 t fired, .
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[lola][.] 22 CTL EXCL 14/421 35/2000 MAPK-PT-05120-CTLFireability-2024-07 7280247 m, 484012 m/sec, 18189605 t fired, .
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[lola][.] 22 CTL EXCL 19/421 45/2000 MAPK-PT-05120-CTLFireability-2024-07 9526859 m, 449322 m/sec, 23804463 t fired, .
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[lola][.] 22 CTL EXCL 24/421 55/2000 MAPK-PT-05120-CTLFireability-2024-07 11545431 m, 403714 m/sec, 28850102 t fired, .
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[lola][.] 22 CTL EXCL 29/421 62/2000 MAPK-PT-05120-CTLFireability-2024-07 13123850 m, 315683 m/sec, 32792334 t fired, .
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[lola][.] MAPK-PT-05120-CTLFireability-2023-12: CTL true CTL model checker
[lola][.] MAPK-PT-05120-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] MAPK-PT-05120-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] MAPK-PT-05120-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[lola][.] MAPK-PT-05120-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.]
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[lola][.] 22 CTL EXCL 34/421 91/2000 MAPK-PT-05120-CTLFireability-2024-07 19270059 m, 1229241 m/sec, 38964693 t fired, .
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[lola][.] 22 CTL EXCL 39/421 119/2000 MAPK-PT-05120-CTLFireability-2024-07 25267352 m, 1199458 m/sec, 44987641 t fired, .
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[lola][.] 22 CTL EXCL 44/421 150/2000 MAPK-PT-05120-CTLFireability-2024-07 31886200 m, 1323769 m/sec, 51634877 t fired, .
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[lola][.]
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[lola][.] 22 CTL EXCL 49/421 183/2000 MAPK-PT-05120-CTLFireability-2024-07 38775557 m, 1377871 m/sec, 58553707 t fired, .
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[lola][.] 22 CTL EXCL 54/421 214/2000 MAPK-PT-05120-CTLFireability-2024-07 45306242 m, 1306137 m/sec, 65112387 t fired, .
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[lola][.] 22 CTL EXCL 59/421 244/2000 MAPK-PT-05120-CTLFireability-2024-07 51707937 m, 1280339 m/sec, 71541537 t fired, .
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[lola][.] 22 CTL EXCL 64/421 274/2000 MAPK-PT-05120-CTLFireability-2024-07 58056683 m, 1269749 m/sec, 77917518 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 408 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MAPK-PT-05120"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is MAPK-PT-05120, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r225-tall-171649614200482"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/MAPK-PT-05120.tgz
mv MAPK-PT-05120 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;