Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r225-tall-171649614200468.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is MAPK-PT-01280, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r225-tall-171649614200468
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 448K
-rw-r--r-- 1 mcc users 6.9K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 69K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 22 14:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Apr 22 14:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 13 07:41 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 100K Apr 13 07:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.4K Apr 13 07:41 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 76K Apr 13 07:41 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 25K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME MAPK-PT-01280-LTLFireability-00
FORMULA_NAME MAPK-PT-01280-LTLFireability-01
FORMULA_NAME MAPK-PT-01280-LTLFireability-02
FORMULA_NAME MAPK-PT-01280-LTLFireability-03
FORMULA_NAME MAPK-PT-01280-LTLFireability-04
FORMULA_NAME MAPK-PT-01280-LTLFireability-05
FORMULA_NAME MAPK-PT-01280-LTLFireability-06
FORMULA_NAME MAPK-PT-01280-LTLFireability-07
FORMULA_NAME MAPK-PT-01280-LTLFireability-08
FORMULA_NAME MAPK-PT-01280-LTLFireability-09
FORMULA_NAME MAPK-PT-01280-LTLFireability-10
FORMULA_NAME MAPK-PT-01280-LTLFireability-11
FORMULA_NAME MAPK-PT-01280-LTLFireability-12
FORMULA_NAME MAPK-PT-01280-LTLFireability-13
FORMULA_NAME MAPK-PT-01280-LTLFireability-14
FORMULA_NAME MAPK-PT-01280-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717075109751

FORMULA MAPK-PT-01280-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPK-PT-01280-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPK-PT-01280-LTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPK-PT-01280-LTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPK-PT-01280-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA MAPK-PT-01280-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717075296461

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from LTLFireability.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 7 (type EXCL) for 6 MAPK-PT-01280-LTLFireability-02
[lola][I] time limit : 133 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 57 (type FNDP) for 18 MAPK-PT-01280-LTLFireability-06
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 58 (type EQUN) for 18 MAPK-PT-01280-LTLFireability-06
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 7 (type EXCL) for MAPK-PT-01280-LTLFireability-02
[lola][I] result : false
[lola][I] markings : 8
[lola][I] fired transitions : 8
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 13 (type EXCL) for 12 MAPK-PT-01280-LTLFireability-04
[lola][I] time limit : 138 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 57 (type FNDP) for MAPK-PT-01280-LTLFireability-06
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 58 (type EQUN) for MAPK-PT-01280-LTLFireability-06 (obsolete)
[lola][I] FINISHED task # 13 (type EXCL) for MAPK-PT-01280-LTLFireability-04
[lola][I] result : true
[lola][I] markings : 10
[lola][I] fired transitions : 11
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 4 (type EXCL) for 3 MAPK-PT-01280-LTLFireability-01
[lola][I] time limit : 171 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 4 (type EXCL) for MAPK-PT-01280-LTLFireability-01
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 10 (type EXCL) for 9 MAPK-PT-01280-LTLFireability-03
[lola][I] time limit : 225 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 61 (type FNDP) for 32 MAPK-PT-01280-LTLFireability-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 62 (type EQUN) for 32 MAPK-PT-01280-LTLFireability-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 10 (type EXCL) for MAPK-PT-01280-LTLFireability-03
[lola][I] result : false
[lola][I] markings : 16
[lola][I] fired transitions : 16
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 30 (type EXCL) for 29 MAPK-PT-01280-LTLFireability-07
[lola][I] time limit : 257 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 61 (type FNDP) for MAPK-PT-01280-LTLFireability-08
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 62 (type EQUN) for MAPK-PT-01280-LTLFireability-08 (obsolete)
[lola][I] FINISHED task # 58 (type EQUN) for MAPK-PT-01280-LTLFireability-06
[lola][I] result : unknown
[lola][I] FINISHED task # 62 (type EQUN) for MAPK-PT-01280-LTLFireability-08
[lola][I] result : true
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] MAPK-PT-01280-LTLFireability-01: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-02: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-03: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-04: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-06: CONJ false findpath
[lola][.] MAPK-PT-01280-LTLFireability-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] MAPK-PT-01280-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 30 LTL EXCL 5/360 20/2000 MAPK-PT-01280-LTLFireability-07 2839762 m, 567952 m/sec, 7087943 t fired, .
[lola][.]
[lola][.] Time elapsed: 5 secs. Pages in use: 20
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] FINISHED task # 30 (type EXCL) for MAPK-PT-01280-LTLFireability-07
[lola][I] result : false
[lola][I] markings : 3495081
[lola][I] fired transitions : 8724223
[lola][I] time used : 6
[lola][I] memory pages used : 24
[lola][I] LAUNCH task # 54 (type EXCL) for 53 MAPK-PT-01280-LTLFireability-15
[lola][I] time limit : 399 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] MAPK-PT-01280-LTLFireability-01: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-02: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-03: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-04: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-06: CONJ false findpath
[lola][.] MAPK-PT-01280-LTLFireability-07: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] MAPK-PT-01280-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 54 LTL EXCL 4/399 15/2000 MAPK-PT-01280-LTLFireability-15 2075956 m, 415191 m/sec, 5179829 t fired, .
[lola][.]
[lola][.] Time elapsed: 10 secs. Pages in use: 24
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] MAPK-PT-01280-LTLFireability-01: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-02: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-03: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-04: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-06: CONJ false findpath
[lola][.] MAPK-PT-01280-LTLFireability-07: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] MAPK-PT-01280-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 54 LTL EXCL 9/399 31/2000 MAPK-PT-01280-LTLFireability-15 4414858 m, 467780 m/sec, 11016599 t fired, .
[lola][.]
[lola][.] Time elapsed: 15 secs. Pages in use: 31
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] MAPK-PT-01280-LTLFireability-01: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-02: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-03: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-04: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-06: CONJ false findpath
[lola][.] MAPK-PT-01280-LTLFireability-07: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] MAPK-PT-01280-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 54 LTL EXCL 14/399 47/2000 MAPK-PT-01280-LTLFireability-15 6727901 m, 462608 m/sec, 16787257 t fired, .
[lola][.]
[lola][.] Time elapsed: 20 secs. Pages in use: 47
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] MAPK-PT-01280-LTLFireability-01: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-02: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-03: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-04: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-06: CONJ false findpath
[lola][.] MAPK-PT-01280-LTLFireability-07: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] MAPK-PT-01280-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 54 LTL EXCL 19/399 63/2000 MAPK-PT-01280-LTLFireability-15 9037282 m, 461876 m/sec, 22550187 t fired, .
[lola][.]
[lola][.] Time elapsed: 25 secs. Pages in use: 63
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] MAPK-PT-01280-LTLFireability-01: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-02: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-03: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-04: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-06: CONJ false findpath
[lola][.] MAPK-PT-01280-LTLFireability-07: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] MAPK-PT-01280-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 54 LTL EXCL 24/399 79/2000 MAPK-PT-01280-LTLFireability-15 11349709 m, 462485 m/sec, 28319700 t fired, .
[lola][.]
[lola][.] Time elapsed: 30 secs. Pages in use: 79
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] MAPK-PT-01280-LTLFireability-01: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-02: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-03: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-04: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-06: CONJ false findpath
[lola][.] MAPK-PT-01280-LTLFireability-07: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] MAPK-PT-01280-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 54 LTL EXCL 29/399 93/2000 MAPK-PT-01280-LTLFireability-15 13485646 m, 427187 m/sec, 33647365 t fired, .
[lola][.]
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[lola][.] MAPK-PT-01280-LTLFireability-01: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-02: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-03: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-04: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-06: CONJ false findpath
[lola][.] MAPK-PT-01280-LTLFireability-07: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] MAPK-PT-01280-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 54 LTL EXCL 154/399 470/2000 MAPK-PT-01280-LTLFireability-15 69001014 m, 461123 m/sec, 164819780 t fired, .
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[lola][.] MAPK-PT-01280-LTLFireability-01: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-02: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-03: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-04: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-06: CONJ false findpath
[lola][.] MAPK-PT-01280-LTLFireability-07: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] MAPK-PT-01280-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
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[lola][.] MAPK-PT-01280-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 54 LTL EXCL 159/399 486/2000 MAPK-PT-01280-LTLFireability-15 71250551 m, 449907 m/sec, 170432237 t fired, .
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[lola][.] MAPK-PT-01280-LTLFireability-01: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-02: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-03: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-04: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-06: CONJ false findpath
[lola][.] MAPK-PT-01280-LTLFireability-07: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] MAPK-PT-01280-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 54 LTL EXCL 164/399 501/2000 MAPK-PT-01280-LTLFireability-15 73443113 m, 438512 m/sec, 175903072 t fired, .
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[lola][.] MAPK-PT-01280-LTLFireability-01: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-02: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-03: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-04: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-06: CONJ false findpath
[lola][.] MAPK-PT-01280-LTLFireability-07: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] MAPK-PT-01280-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
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[lola][.] MAPK-PT-01280-LTLFireability-01: LTL true LTL model checker
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[lola][.] MAPK-PT-01280-LTLFireability-03: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-04: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-06: CONJ false findpath
[lola][.] MAPK-PT-01280-LTLFireability-07: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] MAPK-PT-01280-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
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[lola][.] MAPK-PT-01280-LTLFireability-01: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-02: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-03: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-04: LTL true LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-06: CONJ false findpath
[lola][.] MAPK-PT-01280-LTLFireability-07: LTL false LTL model checker
[lola][.] MAPK-PT-01280-LTLFireability-08: AG false findpath
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[lola][.] MAPK-PT-01280-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[lola][.] MAPK-PT-01280-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 409 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MAPK-PT-01280"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is MAPK-PT-01280, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r225-tall-171649614200468"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/MAPK-PT-01280.tgz
mv MAPK-PT-01280 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;