About the Execution of LoLA for LeafsetExtension-PT-S32C4
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 0.000 | 2908883.00 | 0.00 | 0.00 | T?F??F?FF?????F? | normal |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r225-tall-171649614000379.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is LeafsetExtension-PT-S32C4, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r225-tall-171649614000379
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.9M
-rw-r--r-- 1 mcc users 17K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 119K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 9.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 6.3K May 19 07:11 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K May 19 16:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.0K May 19 07:22 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 19 18:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 19K Apr 12 13:44 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 118K Apr 12 13:44 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 15K Apr 12 13:43 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 68K Apr 12 13:43 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.3K Apr 22 14:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 3.4M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-00
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-01
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-02
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-03
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-04
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-05
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-06
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-07
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-08
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-09
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-10
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-11
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-12
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-13
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-14
FORMULA_NAME LeafsetExtension-PT-S32C4-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717067520234
FORMULA LeafsetExtension-PT-S32C4-LTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S32C4-LTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S32C4-LTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S32C4-LTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S32C4-LTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S32C4-LTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717070429117
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 60 (type SKEL/SRCH) for 0 LeafsetExtension-PT-S32C4-LTLCardinality-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 60 (type SKEL/SRCH) for LeafsetExtension-PT-S32C4-LTLCardinality-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] planning for LeafsetExtension-PT-S32C4-LTLCardinality-00 stopped (result already fixed).
[[35mlola[0m][I] LAUNCH task # 9 (type CNST) for 6 LeafsetExtension-PT-S32C4-LTLCardinality-02
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 55 (type CNST) for 54 LeafsetExtension-PT-S32C4-LTLCardinality-14
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 9 (type CNST) for LeafsetExtension-PT-S32C4-LTLCardinality-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 55 (type CNST) for LeafsetExtension-PT-S32C4-LTLCardinality-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 63 (type SKEL/FNDP) for 23 LeafsetExtension-PT-S32C4-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 64 (type SKEL/EQUN) for 23 LeafsetExtension-PT-S32C4-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 65 (type SKEL/SRCH) for 23 LeafsetExtension-PT-S32C4-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 66 (type SKEL/SRCH) for 20 LeafsetExtension-PT-S32C4-LTLCardinality-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 66 (type SKEL/SRCH) for LeafsetExtension-PT-S32C4-LTLCardinality-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 22
[[35mlola[0m][I] fired transitions : 22
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 63 (type SKEL/FNDP) for LeafsetExtension-PT-S32C4-LTLCardinality-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 64 (type EQUN) for LeafsetExtension-PT-S32C4-LTLCardinality-05 (obsolete)
[[35mlola[0m][W] CANCELED task # 65 (type SRCH) for LeafsetExtension-PT-S32C4-LTLCardinality-05 (obsolete)
[[35mlola[0m][I] FINISHED task # 65 (type SKEL/SRCH) for LeafsetExtension-PT-S32C4-LTLCardinality-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 64 (type SKEL/EQUN) for LeafsetExtension-PT-S32C4-LTLCardinality-05
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 69 (type SKEL/SRCH) for 36 LeafsetExtension-PT-S32C4-LTLCardinality-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 70 (type SKEL/FNDP) for 29 LeafsetExtension-PT-S32C4-LTLCardinality-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 71 (type SKEL/EQUN) for 29 LeafsetExtension-PT-S32C4-LTLCardinality-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 72 (type SKEL/SRCH) for 29 LeafsetExtension-PT-S32C4-LTLCardinality-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 69 (type SKEL/SRCH) for LeafsetExtension-PT-S32C4-LTLCardinality-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 35
[[35mlola[0m][I] fired transitions : 35
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 77 (type SKEL/EQUN) for 29 LeafsetExtension-PT-S32C4-LTLCardinality-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 70 (type SKEL/FNDP) for LeafsetExtension-PT-S32C4-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 71 (type EQUN) for LeafsetExtension-PT-S32C4-LTLCardinality-07 (obsolete)
[[35mlola[0m][W] CANCELED task # 72 (type SRCH) for LeafsetExtension-PT-S32C4-LTLCardinality-07 (obsolete)
[[35mlola[0m][I] LAUNCH task # 75 (type SKEL/SRCH) for 29 LeafsetExtension-PT-S32C4-LTLCardinality-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 71 (type SKEL/EQUN) for LeafsetExtension-PT-S32C4-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 77 (type SKEL/EQUN) for LeafsetExtension-PT-S32C4-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 78 (type SKEL/SRCH) for 51 LeafsetExtension-PT-S32C4-LTLCardinality-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[*** LOG ERROR #0001 ***] [2024-05-30 11:12:12] [status_logger] string pointer is null
[[35mlola[0m][I] FINISHED task # 75 (type SKEL/SRCH) for LeafsetExtension-PT-S32C4-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 34628
[[35mlola[0m][I] fired transitions : 122140
[[35mlola[0m][I] time used : 2
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 82 (type EXCL) for 29 LeafsetExtension-PT-S32C4-LTLCardinality-07
[[35mlola[0m][I] time limit : 275 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 80 (type FNDP) for 29 LeafsetExtension-PT-S32C4-LTLCardinality-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 81 (type EQUN) for 29 LeafsetExtension-PT-S32C4-LTLCardinality-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 82 (type EXCL) for LeafsetExtension-PT-S32C4-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 80 (type FNDP) for LeafsetExtension-PT-S32C4-LTLCardinality-07 (obsolete)
[[35mlola[0m][W] CANCELED task # 81 (type EQUN) for LeafsetExtension-PT-S32C4-LTLCardinality-07 (obsolete)
[[35mlola[0m][I] FINISHED task # 80 (type FNDP) for LeafsetExtension-PT-S32C4-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 86 (type EXCL) for 23 LeafsetExtension-PT-S32C4-LTLCardinality-05
[[35mlola[0m][I] time limit : 326 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 84 (type FNDP) for 23 LeafsetExtension-PT-S32C4-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 85 (type EQUN) for 23 LeafsetExtension-PT-S32C4-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 86 (type EXCL) for LeafsetExtension-PT-S32C4-LTLCardinality-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 84 (type FNDP) for LeafsetExtension-PT-S32C4-LTLCardinality-05 (obsolete)
[[35mlola[0m][W] CANCELED task # 85 (type EQUN) for LeafsetExtension-PT-S32C4-LTLCardinality-05 (obsolete)
[[35mlola[0m][I] FINISHED task # 81 (type EQUN) for LeafsetExtension-PT-S32C4-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 85 (type EQUN) for LeafsetExtension-PT-S32C4-LTLCardinality-05
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 84 (type FNDP) for LeafsetExtension-PT-S32C4-LTLCardinality-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-01: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 78 LTL SRCH 2/3589 1/5 LeafsetExtension-PT-S32C4-LTLCardinality-13 47307 m, 9461 m/sec, 87295 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 13 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 27 (type EXCL) for 26 LeafsetExtension-PT-S32C4-LTLCardinality-06
[[35mlola[0m][I] time limit : 358 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 95 (type EQUN) for 3 LeafsetExtension-PT-S32C4-LTLCardinality-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 95 (type EQUN) for LeafsetExtension-PT-S32C4-LTLCardinality-01
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 27 (type EXCL) for LeafsetExtension-PT-S32C4-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 7164
[[35mlola[0m][I] fired transitions : 11263
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 92 (type EXCL) for 3 LeafsetExtension-PT-S32C4-LTLCardinality-01
[[35mlola[0m][I] time limit : 398 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 92 (type EXCL) for LeafsetExtension-PT-S32C4-LTLCardinality-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 48 LeafsetExtension-PT-S32C4-LTLCardinality-12
[[35mlola[0m][I] time limit : 448 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] planning for LeafsetExtension-PT-S32C4-LTLCardinality-08 stopped (result already fixed).
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 4/448 4/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 116826 m, 23365 m/sec, 174774 t fired, .
[[35mlola[0m][.] 78 LTL SRCH 7/3589 1/5 LeafsetExtension-PT-S32C4-LTLCardinality-13 258480 m, 42234 m/sec, 486313 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 18 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 9/448 9/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 289924 m, 34619 m/sec, 436945 t fired, .
[[35mlola[0m][.] 78 LTL SRCH 12/3589 1/5 LeafsetExtension-PT-S32C4-LTLCardinality-13 604751 m, 69254 m/sec, 1141736 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 23 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 14/448 13/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 458727 m, 33760 m/sec, 703453 t fired, .
[[35mlola[0m][.] 78 LTL SRCH 17/3589 1/5 LeafsetExtension-PT-S32C4-LTLCardinality-13 932552 m, 65560 m/sec, 1769777 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 28 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 19/448 18/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 627064 m, 33667 m/sec, 962928 t fired, .
[[35mlola[0m][.] 78 LTL SRCH 22/3589 1/5 LeafsetExtension-PT-S32C4-LTLCardinality-13 1257259 m, 64941 m/sec, 2388836 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 33 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 24/448 22/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 788307 m, 32248 m/sec, 1242391 t fired, .
[[35mlola[0m][.] 78 LTL SRCH 27/3589 1/5 LeafsetExtension-PT-S32C4-LTLCardinality-13 1595060 m, 67560 m/sec, 3037127 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 38 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 29/448 26/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 943778 m, 31094 m/sec, 1514634 t fired, .
[[35mlola[0m][.] 78 LTL SRCH 32/3589 1/5 LeafsetExtension-PT-S32C4-LTLCardinality-13 1942358 m, 69459 m/sec, 3688966 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 43 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 34/448 31/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 1104988 m, 32242 m/sec, 1762602 t fired, .
[[35mlola[0m][.] 78 LTL SRCH 37/3589 1/5 LeafsetExtension-PT-S32C4-LTLCardinality-13 2255315 m, 62591 m/sec, 4338930 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 48 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 39/448 35/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 1262383 m, 31479 m/sec, 2023705 t fired, .
[[35mlola[0m][.] 78 LTL SRCH 42/3589 1/5 LeafsetExtension-PT-S32C4-LTLCardinality-13 2562780 m, 61493 m/sec, 4975097 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 53 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 44/448 39/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 1414801 m, 30483 m/sec, 2299928 t fired, .
[[35mlola[0m][.] 78 LTL SRCH 47/3589 1/5 LeafsetExtension-PT-S32C4-LTLCardinality-13 2899591 m, 67362 m/sec, 5620974 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 58 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 49/448 43/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 1575624 m, 32164 m/sec, 2546417 t fired, .
[[35mlola[0m][.] 78 LTL SRCH 52/3589 2/5 LeafsetExtension-PT-S32C4-LTLCardinality-13 3225809 m, 65243 m/sec, 6246217 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 63 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 78 (type SRCH) for LeafsetExtension-PT-S32C4-LTLCardinality-13 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 54/448 47/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 1732509 m, 31377 m/sec, 2801193 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 68 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 59/448 51/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 1884980 m, 30494 m/sec, 3078951 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 73 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 64/448 55/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 2043185 m, 31641 m/sec, 3320732 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 78 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 69/448 59/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 2199590 m, 31281 m/sec, 3576180 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 83 secs. Pages in use: 59
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 74/448 63/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 2357370 m, 31556 m/sec, 3854335 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 88 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 79/448 68/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 2523618 m, 33249 m/sec, 4104868 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 93 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 84/448 73/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 2692502 m, 33776 m/sec, 4368180 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 98 secs. Pages in use: 73
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 89/448 77/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 2862520 m, 34003 m/sec, 4627444 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 103 secs. Pages in use: 77
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 94/448 81/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 3024434 m, 32382 m/sec, 4925915 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 108 secs. Pages in use: 81
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 99/448 86/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 3192239 m, 33561 m/sec, 5181313 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 113 secs. Pages in use: 86
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 104/448 90/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 3354580 m, 32468 m/sec, 5448957 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 118 secs. Pages in use: 90
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 109/448 95/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 3515014 m, 32086 m/sec, 5719948 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 123 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 114/448 99/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 3677528 m, 32502 m/sec, 5966142 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 128 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 119/448 103/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 3835931 m, 31680 m/sec, 6209792 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 133 secs. Pages in use: 103
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 124/448 108/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 3996072 m, 32028 m/sec, 6457411 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 138 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 129/448 112/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 4162068 m, 33199 m/sec, 6708280 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 143 secs. Pages in use: 112
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 134/448 117/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 4321775 m, 31941 m/sec, 6959457 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 148 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 139/448 121/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 4479813 m, 31607 m/sec, 7203588 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 153 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 144/448 125/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 4632999 m, 30637 m/sec, 7478062 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 158 secs. Pages in use: 125
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 149/448 129/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 4788038 m, 31007 m/sec, 7711867 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 163 secs. Pages in use: 129
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 154/448 133/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 4940700 m, 30532 m/sec, 7947052 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 168 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 159/448 137/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 5086080 m, 29076 m/sec, 8168823 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 173 secs. Pages in use: 137
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 164/448 141/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 5243023 m, 31388 m/sec, 8429317 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 178 secs. Pages in use: 141
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 169/448 145/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 5399980 m, 31391 m/sec, 8671375 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 183 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 174/448 149/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 5553622 m, 30728 m/sec, 8908899 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 188 secs. Pages in use: 149
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 179/448 154/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 5710528 m, 31381 m/sec, 9149560 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 193 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 184/448 157/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 5860204 m, 29935 m/sec, 9415089 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 198 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 189/448 161/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 6012668 m, 30492 m/sec, 9649756 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 203 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 194/448 165/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 6167086 m, 30883 m/sec, 9888252 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 208 secs. Pages in use: 165
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 199/448 169/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 6314163 m, 29415 m/sec, 10115949 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 213 secs. Pages in use: 169
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 204/448 173/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 6454006 m, 27968 m/sec, 10340766 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 218 secs. Pages in use: 173
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 209/448 177/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 6605383 m, 30275 m/sec, 10587065 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 223 secs. Pages in use: 177
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 214/448 181/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 6770102 m, 32943 m/sec, 10846217 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 228 secs. Pages in use: 181
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 219/448 185/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 6915003 m, 28980 m/sec, 11071644 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 233 secs. Pages in use: 185
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 224/448 189/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 7074807 m, 31960 m/sec, 11329041 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 238 secs. Pages in use: 189
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 229/448 193/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 7210928 m, 27224 m/sec, 11547196 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 243 secs. Pages in use: 193
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 234/448 196/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 7346053 m, 27025 m/sec, 11770452 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 248 secs. Pages in use: 196
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 239/448 200/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 7486657 m, 28120 m/sec, 11999573 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 253 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 244/448 203/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 7626382 m, 27945 m/sec, 12240861 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 258 secs. Pages in use: 203
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 249/448 207/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 7785830 m, 31889 m/sec, 12487300 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 263 secs. Pages in use: 207
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 254/448 210/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 7922307 m, 27295 m/sec, 12696680 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 268 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 259/448 213/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 8062333 m, 28005 m/sec, 12921429 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 273 secs. Pages in use: 213
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 264/448 217/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 8209020 m, 29337 m/sec, 13145046 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 278 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 269/448 220/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 8341345 m, 26465 m/sec, 13347193 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 283 secs. Pages in use: 220
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 274/448 223/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 8472773 m, 26285 m/sec, 13560698 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 288 secs. Pages in use: 223
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 279/448 226/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 8601639 m, 25773 m/sec, 13756207 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 293 secs. Pages in use: 226
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 284/448 229/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 8731867 m, 26045 m/sec, 13958241 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 298 secs. Pages in use: 229
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 289/448 233/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 8880573 m, 29741 m/sec, 14192538 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 303 secs. Pages in use: 233
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 294/448 236/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 9018989 m, 27683 m/sec, 14406605 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 308 secs. Pages in use: 236
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 299/448 239/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 9161893 m, 28580 m/sec, 14646959 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 313 secs. Pages in use: 239
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 304/448 242/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 9294299 m, 26481 m/sec, 14862875 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 318 secs. Pages in use: 242
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 309/448 245/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 9428028 m, 26745 m/sec, 15077449 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 323 secs. Pages in use: 245
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 314/448 248/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 9561330 m, 26660 m/sec, 15303396 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 328 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 319/448 251/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 9692839 m, 26301 m/sec, 15521898 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 333 secs. Pages in use: 251
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 324/448 254/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 9826837 m, 26799 m/sec, 15741284 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 338 secs. Pages in use: 254
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 329/448 257/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 9964743 m, 27581 m/sec, 15949926 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 343 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 334/448 260/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 10093939 m, 25839 m/sec, 16158346 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 348 secs. Pages in use: 260
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 339/448 263/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 10234190 m, 28050 m/sec, 16386071 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 353 secs. Pages in use: 263
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 344/448 266/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 10368896 m, 26941 m/sec, 16600986 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 358 secs. Pages in use: 266
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 349/448 269/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 10501450 m, 26510 m/sec, 16803431 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 363 secs. Pages in use: 269
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 354/448 273/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 10645990 m, 28908 m/sec, 17016324 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 368 secs. Pages in use: 273
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 359/448 276/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 10783462 m, 27494 m/sec, 17226777 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 373 secs. Pages in use: 276
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 364/448 279/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 10926252 m, 28558 m/sec, 17451368 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 378 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 369/448 282/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 11062374 m, 27224 m/sec, 17657077 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 383 secs. Pages in use: 282
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 374/448 285/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 11195282 m, 26581 m/sec, 17861054 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 388 secs. Pages in use: 285
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 379/448 289/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 11331108 m, 27165 m/sec, 18070815 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 393 secs. Pages in use: 289
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 384/448 292/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 11475191 m, 28816 m/sec, 18288833 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 398 secs. Pages in use: 292
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 389/448 296/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 11619495 m, 28860 m/sec, 18529981 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 403 secs. Pages in use: 296
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 394/448 299/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 11754523 m, 27005 m/sec, 18746227 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 408 secs. Pages in use: 299
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 399/448 303/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 11892707 m, 27636 m/sec, 18965429 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 413 secs. Pages in use: 303
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 404/448 306/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 12032902 m, 28039 m/sec, 19218724 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 418 secs. Pages in use: 306
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 409/448 309/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 12170822 m, 27584 m/sec, 19443058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 423 secs. Pages in use: 309
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 414/448 312/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 12304519 m, 26739 m/sec, 19654969 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 428 secs. Pages in use: 312
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 419/448 315/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 12430164 m, 25129 m/sec, 19853938 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 433 secs. Pages in use: 315
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 424/448 318/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 12567396 m, 27446 m/sec, 20088490 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 438 secs. Pages in use: 318
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 429/448 321/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 12709086 m, 28338 m/sec, 20288445 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 443 secs. Pages in use: 321
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 434/448 325/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 12866631 m, 31509 m/sec, 20545825 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 448 secs. Pages in use: 325
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 439/448 329/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 13021283 m, 30930 m/sec, 20787035 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 453 secs. Pages in use: 329
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 444/448 333/2000 LeafsetExtension-PT-S32C4-LTLCardinality-12 13163609 m, 28465 m/sec, 21004069 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 458 secs. Pages in use: 333
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 49 (type EXCL) for LeafsetExtension-PT-S32C4-LTLCardinality-12 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 463 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 58 (type EXCL) for 57 LeafsetExtension-PT-S32C4-LTLCardinality-15
[[35mlola[0m][I] time limit : 448 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 48 LeafsetExtension-PT-S32C4-LTLCardinality-12
[[35mlola[0m][I] time limit : 3137 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 58 (type EXCL) for LeafsetExtension-PT-S32C4-LTLCardinality-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 35
[[35mlola[0m][I] fired transitions : 35
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] CANCELED task # 49 (type EXCL) for LeafsetExtension-PT-S32C4-LTLCardinality-12 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 468 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 51 LeafsetExtension-PT-S32C4-LTLCardinality-13
[[35mlola[0m][I] time limit : 522 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 5/522 5/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 114024 m, 22804 m/sec, 220344 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 473 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 10/522 9/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 220552 m, 21305 m/sec, 426362 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 478 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 15/522 14/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 331793 m, 22248 m/sec, 631595 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 483 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 20/522 18/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 428346 m, 19310 m/sec, 815749 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 488 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 25/522 22/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 521322 m, 18595 m/sec, 1003750 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 493 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 30/522 25/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 612183 m, 18172 m/sec, 1187998 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 498 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 35/522 28/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 702152 m, 17993 m/sec, 1372304 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 503 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 40/522 32/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 794943 m, 18558 m/sec, 1558486 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 508 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 45/522 35/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 886059 m, 18223 m/sec, 1741857 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 513 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 50/522 38/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 978225 m, 18433 m/sec, 1922143 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 518 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 55/522 40/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 1063972 m, 17149 m/sec, 2102527 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 523 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 60/522 44/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 1153694 m, 17944 m/sec, 2285728 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 528 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 65/522 48/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 1245330 m, 18327 m/sec, 2470735 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 533 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 70/522 52/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 1334301 m, 17794 m/sec, 2648962 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 538 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 75/522 56/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 1425953 m, 18330 m/sec, 2833880 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 543 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 80/522 61/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 1521997 m, 19208 m/sec, 3014861 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 548 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 85/522 64/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 1608804 m, 17361 m/sec, 3196413 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 553 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 90/522 68/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 1695091 m, 17257 m/sec, 3377637 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 558 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 95/522 71/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 1784487 m, 17879 m/sec, 3561405 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 563 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 100/522 75/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 1871667 m, 17436 m/sec, 3736579 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 568 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 105/522 78/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 1965512 m, 18769 m/sec, 3924967 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 573 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 110/522 81/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 2058360 m, 18569 m/sec, 4107275 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 578 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 115/522 83/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 2145058 m, 17339 m/sec, 4289618 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 583 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 120/522 87/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 2237175 m, 18423 m/sec, 4475668 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 588 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 125/522 91/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 2326091 m, 17783 m/sec, 4656550 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 593 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 130/522 94/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 2411152 m, 17012 m/sec, 4828980 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 598 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 135/522 98/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 2498971 m, 17563 m/sec, 5008089 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 603 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 140/522 101/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 2583105 m, 16826 m/sec, 5182063 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 608 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 145/522 104/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 2660350 m, 15449 m/sec, 5355684 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 613 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 150/522 108/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 2751738 m, 18277 m/sec, 5548817 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 618 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 155/522 112/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 2855501 m, 20752 m/sec, 5759168 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 623 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 160/522 116/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 2959306 m, 20761 m/sec, 5969170 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 628 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 165/522 120/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 3054635 m, 19065 m/sec, 6178068 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 633 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 170/522 123/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 3147266 m, 18526 m/sec, 6380220 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 638 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 175/522 127/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 3236092 m, 17765 m/sec, 6559597 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 643 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 180/522 130/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 3322779 m, 17337 m/sec, 6736438 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 648 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 185/522 134/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 3410936 m, 17631 m/sec, 6914751 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 653 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 190/522 137/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 3489389 m, 15690 m/sec, 7089712 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 658 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 195/522 139/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 3568646 m, 15851 m/sec, 7264193 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 663 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 200/522 143/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 3662320 m, 18734 m/sec, 7454072 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 668 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 205/522 147/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 3753982 m, 18332 m/sec, 7642165 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 673 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 210/522 150/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 3844212 m, 18046 m/sec, 7826111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 678 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 215/522 153/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 3926360 m, 16429 m/sec, 8010918 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 683 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 220/522 156/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 4011702 m, 17068 m/sec, 8196952 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 688 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 225/522 160/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 4108349 m, 19329 m/sec, 8390636 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 693 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 230/522 164/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 4207574 m, 19845 m/sec, 8578411 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 698 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 235/522 167/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 4295508 m, 17586 m/sec, 8762370 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 703 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 240/522 170/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 4380739 m, 17046 m/sec, 8941330 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 708 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 245/522 173/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 4466767 m, 17205 m/sec, 9118794 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 713 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 250/522 177/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 4555167 m, 17680 m/sec, 9295989 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 718 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 255/522 181/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 4652114 m, 19389 m/sec, 9481969 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 723 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 260/522 186/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 4740329 m, 17643 m/sec, 9660938 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 728 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 265/522 190/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 4826017 m, 17137 m/sec, 9840818 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 733 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 270/522 193/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 4912575 m, 17311 m/sec, 10020976 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 738 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 275/522 196/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 5001491 m, 17783 m/sec, 10201211 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 743 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 280/522 200/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 5088531 m, 17408 m/sec, 10379473 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 748 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 285/522 203/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 5173240 m, 16941 m/sec, 10551752 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 753 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 290/522 206/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 5250898 m, 15531 m/sec, 10726353 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 758 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 295/522 209/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 5329635 m, 15747 m/sec, 10901074 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 763 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 300/522 212/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 5421111 m, 18295 m/sec, 11084847 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 768 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 305/522 216/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 5516399 m, 19057 m/sec, 11266064 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 773 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 310/522 220/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 5603991 m, 17518 m/sec, 11446928 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 778 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 315/522 223/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 5690904 m, 17382 m/sec, 11629327 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 783 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 320/522 226/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 5776370 m, 17093 m/sec, 11806483 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 788 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 325/522 229/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 5868134 m, 18352 m/sec, 11987860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 793 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 330/522 231/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 5954809 m, 17335 m/sec, 12161671 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 798 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 335/522 233/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 6037357 m, 16509 m/sec, 12334998 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 803 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 340/522 236/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 6122304 m, 16989 m/sec, 12507753 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 808 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 345/522 240/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 6211203 m, 17779 m/sec, 12687133 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 813 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 350/522 243/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 6291581 m, 16075 m/sec, 12851708 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 818 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 355/522 246/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 6375127 m, 16709 m/sec, 13023561 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 823 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 360/522 249/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 6454022 m, 15779 m/sec, 13189818 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 828 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 365/522 252/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 6527482 m, 14692 m/sec, 13356174 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 833 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 370/522 254/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 6605622 m, 15628 m/sec, 13521547 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 838 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 375/522 257/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 6686588 m, 16193 m/sec, 13687210 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 843 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 380/522 260/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 6766475 m, 15977 m/sec, 13849483 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 848 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 385/522 263/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 6840868 m, 14878 m/sec, 14012629 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 853 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 390/522 265/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 6912958 m, 14418 m/sec, 14175228 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 858 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 395/522 268/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 6991931 m, 15794 m/sec, 14339392 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 863 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 400/522 271/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 7072744 m, 16162 m/sec, 14504342 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 868 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 405/522 275/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 7155402 m, 16531 m/sec, 14670940 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 873 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 410/522 278/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 7229245 m, 14768 m/sec, 14837218 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 878 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 415/522 280/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 7305128 m, 15176 m/sec, 15005348 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 883 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 420/522 284/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 7404934 m, 19961 m/sec, 15202294 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 888 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 425/522 288/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 7497369 m, 18487 m/sec, 15383257 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 893 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 430/522 292/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 7583439 m, 17214 m/sec, 15564012 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 898 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 435/522 295/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 7668277 m, 16967 m/sec, 15742119 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 903 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 440/522 298/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 7762116 m, 18767 m/sec, 15929470 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 908 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 445/522 302/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 7851939 m, 17964 m/sec, 16107650 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 913 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 450/522 305/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 7935819 m, 16776 m/sec, 16283812 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 918 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 455/522 307/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 8020149 m, 16866 m/sec, 16455663 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 923 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 460/522 311/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 8105661 m, 17102 m/sec, 16628578 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 928 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 465/522 313/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 8181522 m, 15172 m/sec, 16783589 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 933 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 470/522 316/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 8262408 m, 16177 m/sec, 16946125 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 938 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 475/522 319/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 8336580 m, 14834 m/sec, 17107984 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 943 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 480/522 321/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 8408198 m, 14323 m/sec, 17269582 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 948 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 485/522 325/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 8502811 m, 18922 m/sec, 17465701 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 953 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 490/522 329/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 8603436 m, 20125 m/sec, 17668973 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 958 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 495/522 333/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 8695662 m, 18445 m/sec, 17872111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 963 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 500/522 336/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 8786818 m, 18231 m/sec, 18072644 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 968 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 505/522 339/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 8876275 m, 17891 m/sec, 18246308 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 973 secs. Pages in use: 339
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 510/522 342/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 8959002 m, 16545 m/sec, 18419971 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 978 secs. Pages in use: 342
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 515/522 346/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 9046367 m, 17473 m/sec, 18599177 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 983 secs. Pages in use: 346
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 520/522 350/2000 LeafsetExtension-PT-S32C4-LTLCardinality-13 9138928 m, 18512 m/sec, 18787629 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 988 secs. Pages in use: 350
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 52 (type EXCL) for LeafsetExtension-PT-S32C4-LTLCardinality-13 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 1 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 993 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 LeafsetExtension-PT-S32C4-LTLCardinality-11
[[35mlola[0m][I] time limit : 521 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 51 LeafsetExtension-PT-S32C4-LTLCardinality-13
[[35mlola[0m][I] time limit : 2607 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for LeafsetExtension-PT-S32C4-LTLCardinality-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 1 0 0 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 52 LTL EXCL 5/521 5/5 LeafsetExtension-PT-S32C4-LTLCardinality-13 113124 m, -1805160 m/sec, 218481 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 998 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 52 (type EXCL) for LeafsetExtension-PT-S32C4-LTLCardinality-13 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1003 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 21 (type EXCL) for 20 LeafsetExtension-PT-S32C4-LTLCardinality-04
[[35mlola[0m][I] time limit : 649 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 21 (type EXCL) for LeafsetExtension-PT-S32C4-LTLCardinality-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 35
[[35mlola[0m][I] fired transitions : 35
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 18 (type EXCL) for 17 LeafsetExtension-PT-S32C4-LTLCardinality-03
[[35mlola[0m][I] time limit : 865 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 18 (type EXCL) for LeafsetExtension-PT-S32C4-LTLCardinality-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 LeafsetExtension-PT-S32C4-LTLCardinality-10
[[35mlola[0m][I] time limit : 1298 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 5/1298 5/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 175375 m, 35075 m/sec, 260539 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1008 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 10/1298 10/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 344821 m, 33889 m/sec, 521072 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1013 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 15/1298 14/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 511580 m, 33351 m/sec, 779108 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1018 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 20/1298 19/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 677699 m, 33223 m/sec, 1034365 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1023 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 25/1298 23/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 833940 m, 31248 m/sec, 1324821 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1028 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 30/1298 27/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 995334 m, 32278 m/sec, 1588271 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1033 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 35/1298 31/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 1157354 m, 32404 m/sec, 1836453 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1038 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 40/1298 35/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 1313421 m, 31213 m/sec, 2114490 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1043 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 45/1298 39/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 1471997 m, 31715 m/sec, 2381779 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1048 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 50/1298 43/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 1630624 m, 31725 m/sec, 2623929 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1053 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 55/1298 47/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 1786127 m, 31100 m/sec, 2894315 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1058 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 60/1298 51/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 1941460 m, 31066 m/sec, 3159257 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1063 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 65/1298 55/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 2097270 m, 31162 m/sec, 3396512 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1068 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 70/1298 59/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 2250795 m, 30705 m/sec, 3662171 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1073 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 75/1298 63/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 2411098 m, 32060 m/sec, 3928219 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1078 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 80/1298 67/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 2574112 m, 32602 m/sec, 4170921 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1083 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 85/1298 71/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 2740487 m, 33275 m/sec, 4430507 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1088 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 90/1298 76/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 2907531 m, 33408 m/sec, 4684324 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1093 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 95/1298 80/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 3066582 m, 31810 m/sec, 4979903 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1098 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 100/1298 84/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 3233015 m, 33286 m/sec, 5231744 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1103 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 105/1298 89/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 3393032 m, 32003 m/sec, 5500538 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1108 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 110/1298 93/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 3552725 m, 31938 m/sec, 5766209 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1113 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 115/1298 97/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 3714098 m, 32274 m/sec, 6009448 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1118 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 120/1298 101/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 3871223 m, 31425 m/sec, 6248878 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1123 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 125/1298 105/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 4029595 m, 31674 m/sec, 6491160 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1128 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 130/1298 109/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 4194597 m, 33000 m/sec, 6736928 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1133 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 135/1298 113/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 4352892 m, 31659 m/sec, 6984861 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1138 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 140/1298 117/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 4510347 m, 31491 m/sec, 7227427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1143 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 145/1298 121/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 4662332 m, 30397 m/sec, 7501232 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1148 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 150/1298 125/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 4818109 m, 31155 m/sec, 7733424 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1153 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 155/1298 129/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 4973178 m, 31013 m/sec, 7970464 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1158 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 160/1298 133/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 5121135 m, 29591 m/sec, 8193889 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1163 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 165/1298 137/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 5275209 m, 30814 m/sec, 8449615 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1168 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 170/1298 141/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 5431592 m, 31276 m/sec, 8686938 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1173 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 175/1298 145/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 5586311 m, 30943 m/sec, 8922067 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1178 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 180/1298 149/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 5744013 m, 31540 m/sec, 9160944 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1183 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 185/1298 152/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 5891910 m, 29579 m/sec, 9425532 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1188 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 190/1298 156/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 6046110 m, 30840 m/sec, 9658304 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1193 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 195/1298 160/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 6200394 m, 30856 m/sec, 9890958 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1198 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 200/1298 164/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 6346270 m, 29175 m/sec, 10114064 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1203 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 205/1298 167/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 6486357 m, 28017 m/sec, 10339467 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1208 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 210/1298 171/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 6636706 m, 30069 m/sec, 10578595 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1213 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 215/1298 175/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 6799266 m, 32512 m/sec, 10825752 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1218 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 220/1298 179/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 6941661 m, 28479 m/sec, 11045139 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1223 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 225/1298 183/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 7097202 m, 31108 m/sec, 11295877 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1228 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 230/1298 186/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 7237325 m, 28024 m/sec, 11520446 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1233 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 235/1298 189/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 7379622 m, 28459 m/sec, 11744417 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1238 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 240/1298 193/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 7523117 m, 28699 m/sec, 11961250 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1243 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 245/1298 196/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 7657734 m, 26923 m/sec, 12172645 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1248 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 250/1298 200/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 7800122 m, 28477 m/sec, 12404123 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1253 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 255/1298 204/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 7943732 m, 28722 m/sec, 12632332 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1258 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 260/1298 207/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 8087930 m, 28839 m/sec, 12860958 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1263 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 265/1298 211/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 8229138 m, 28241 m/sec, 13118550 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1268 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 270/1298 215/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 8367319 m, 27636 m/sec, 13337347 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1273 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 275/1298 218/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 8504547 m, 27445 m/sec, 13574885 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1278 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 280/1298 222/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 8641048 m, 27300 m/sec, 13801898 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1283 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 285/1298 225/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 8774052 m, 26600 m/sec, 14012783 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1288 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 290/1298 228/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 8914228 m, 28035 m/sec, 14263462 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1293 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 295/1298 232/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 9057369 m, 28628 m/sec, 14494731 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1298 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 300/1298 236/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 9207527 m, 30031 m/sec, 14733668 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1303 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 305/1298 240/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 9360812 m, 30657 m/sec, 14984706 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1308 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 310/1298 244/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 9510951 m, 30027 m/sec, 15239403 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1313 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 315/1298 248/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 9659695 m, 29748 m/sec, 15490044 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1318 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 320/1298 251/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 9790497 m, 26160 m/sec, 15705894 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1323 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 325/1298 255/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 9930539 m, 28008 m/sec, 15934291 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1328 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 330/1298 258/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 10060887 m, 26069 m/sec, 16141787 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1333 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 335/1298 262/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 10204437 m, 28710 m/sec, 16373906 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1338 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 340/1298 265/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 10354196 m, 29951 m/sec, 16617269 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1343 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 345/1298 269/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 10498539 m, 28868 m/sec, 16848077 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1348 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 350/1298 273/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 10638831 m, 28058 m/sec, 17093557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1353 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 355/1298 276/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 10770365 m, 26306 m/sec, 17300768 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1358 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 360/1298 279/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 10906653 m, 27257 m/sec, 17535859 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1363 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 365/1298 283/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 11048181 m, 28305 m/sec, 17765747 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1368 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 370/1298 286/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 11178577 m, 26079 m/sec, 17974456 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1373 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 375/1298 290/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 11319071 m, 28098 m/sec, 18197737 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1378 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 380/1298 293/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 11460467 m, 28279 m/sec, 18442794 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1383 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 385/1298 297/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 11593551 m, 26616 m/sec, 18655813 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1388 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 390/1298 300/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 11730648 m, 27419 m/sec, 18882848 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1393 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 395/1298 303/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 11864268 m, 26724 m/sec, 19097703 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1398 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 400/1298 307/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 11995931 m, 26332 m/sec, 19308874 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1403 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 405/1298 310/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 12128137 m, 26441 m/sec, 19520987 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1408 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 410/1298 314/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 12272280 m, 28828 m/sec, 19750249 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1413 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 415/1298 317/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 12404252 m, 26394 m/sec, 19972418 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1418 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 420/1298 320/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 12536148 m, 26379 m/sec, 20183962 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1423 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 425/1298 324/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 12681039 m, 28978 m/sec, 20416060 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1428 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 430/1298 328/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 12823463 m, 28484 m/sec, 20647614 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1433 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 435/1298 331/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 12964329 m, 28173 m/sec, 20883686 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1438 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 440/1298 334/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 13093269 m, 25788 m/sec, 21094767 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1443 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 445/1298 337/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 13216631 m, 24672 m/sec, 21299029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1448 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 450/1298 340/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 13346586 m, 25991 m/sec, 21498005 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1453 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 455/1298 342/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 13471196 m, 24922 m/sec, 21686064 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1458 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 460/1298 345/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 13609797 m, 27720 m/sec, 21907979 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1463 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 465/1298 348/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 13754606 m, 28961 m/sec, 22126225 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1468 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 470/1298 351/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 13889090 m, 26896 m/sec, 22344978 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1473 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 475/1298 353/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 14025550 m, 27292 m/sec, 22566843 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1478 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 480/1298 356/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 14155780 m, 26046 m/sec, 22772760 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1483 secs. Pages in use: 356
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 485/1298 359/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 14285735 m, 25991 m/sec, 22987891 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1488 secs. Pages in use: 359
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 490/1298 361/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 14414748 m, 25802 m/sec, 23206129 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1493 secs. Pages in use: 361
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 495/1298 364/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 14542286 m, 25507 m/sec, 23410035 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1498 secs. Pages in use: 364
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 500/1298 366/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 14678859 m, 27314 m/sec, 23617074 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1503 secs. Pages in use: 366
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 505/1298 369/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 14811343 m, 26496 m/sec, 23818156 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1508 secs. Pages in use: 369
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 510/1298 372/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 14953760 m, 28483 m/sec, 24047061 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1513 secs. Pages in use: 372
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 515/1298 376/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 15095193 m, 28286 m/sec, 24259201 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1518 secs. Pages in use: 376
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 520/1298 379/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 15237926 m, 28546 m/sec, 24476816 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1523 secs. Pages in use: 379
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 525/1298 383/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 15400595 m, 32533 m/sec, 24730139 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1528 secs. Pages in use: 383
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 530/1298 387/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 15550706 m, 30022 m/sec, 24964501 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1533 secs. Pages in use: 387
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 535/1298 391/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 15699218 m, 29702 m/sec, 25207083 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1538 secs. Pages in use: 391
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 540/1298 394/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 15836923 m, 27541 m/sec, 25425048 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1543 secs. Pages in use: 394
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 545/1298 398/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 15981882 m, 28991 m/sec, 25662942 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1548 secs. Pages in use: 398
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 550/1298 401/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 16128375 m, 29298 m/sec, 25908812 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1553 secs. Pages in use: 401
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 555/1298 404/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 16265378 m, 27400 m/sec, 26125532 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1558 secs. Pages in use: 404
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 560/1298 408/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 16409210 m, 28766 m/sec, 26340764 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1563 secs. Pages in use: 408
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 565/1298 411/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 16548984 m, 27954 m/sec, 26551808 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1568 secs. Pages in use: 411
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 570/1298 415/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 16682833 m, 26769 m/sec, 26762737 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1573 secs. Pages in use: 415
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 575/1298 418/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 16822485 m, 27930 m/sec, 26988654 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1578 secs. Pages in use: 418
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 580/1298 422/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 16959091 m, 27321 m/sec, 27206152 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1583 secs. Pages in use: 422
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 585/1298 425/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 17097826 m, 27747 m/sec, 27450327 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1588 secs. Pages in use: 425
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 590/1298 429/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 17235173 m, 27469 m/sec, 27678689 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1593 secs. Pages in use: 429
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 595/1298 433/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 17370212 m, 27007 m/sec, 27897357 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1598 secs. Pages in use: 433
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 600/1298 436/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 17507014 m, 27360 m/sec, 28141595 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1603 secs. Pages in use: 436
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 605/1298 439/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 17640088 m, 26614 m/sec, 28352755 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1608 secs. Pages in use: 439
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 610/1298 443/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 17777790 m, 27540 m/sec, 28599780 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1613 secs. Pages in use: 443
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 615/1298 446/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 17919537 m, 28349 m/sec, 28827640 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1618 secs. Pages in use: 446
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 620/1298 450/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 18072547 m, 30602 m/sec, 29071004 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1623 secs. Pages in use: 450
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 625/1298 454/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 18227865 m, 31063 m/sec, 29341486 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1628 secs. Pages in use: 454
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 630/1298 458/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 18378413 m, 30109 m/sec, 29582029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1633 secs. Pages in use: 458
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 635/1298 462/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 18520260 m, 28369 m/sec, 29830556 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1638 secs. Pages in use: 462
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 640/1298 465/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 18653729 m, 26693 m/sec, 30045534 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1643 secs. Pages in use: 465
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 645/1298 469/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 18787315 m, 26717 m/sec, 30257871 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1648 secs. Pages in use: 469
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 650/1298 472/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 18928064 m, 28149 m/sec, 30484294 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1653 secs. Pages in use: 472
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 655/1298 476/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 19076588 m, 29704 m/sec, 30724015 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1658 secs. Pages in use: 476
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 660/1298 480/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 19214278 m, 27538 m/sec, 30944845 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1663 secs. Pages in use: 480
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 665/1298 483/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 19348454 m, 26835 m/sec, 31179745 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1668 secs. Pages in use: 483
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 670/1298 486/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 19477464 m, 25802 m/sec, 31388918 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1673 secs. Pages in use: 486
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 675/1298 490/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 19614891 m, 27485 m/sec, 31621416 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1678 secs. Pages in use: 490
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 680/1298 493/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 19749577 m, 26937 m/sec, 31837722 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1683 secs. Pages in use: 493
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 685/1298 496/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 19884422 m, 26969 m/sec, 32053661 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1688 secs. Pages in use: 496
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 690/1298 500/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 20023308 m, 27777 m/sec, 32286527 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1693 secs. Pages in use: 500
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 695/1298 503/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 20153183 m, 25975 m/sec, 32500374 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1698 secs. Pages in use: 503
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 700/1298 507/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 20289061 m, 27175 m/sec, 32724200 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1703 secs. Pages in use: 507
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 705/1298 510/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 20419157 m, 26019 m/sec, 32932607 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1708 secs. Pages in use: 510
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 710/1298 513/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 20548595 m, 25887 m/sec, 33139983 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1713 secs. Pages in use: 513
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 715/1298 517/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 20690560 m, 28393 m/sec, 33367844 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1718 secs. Pages in use: 517
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 720/1298 520/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 20820603 m, 26008 m/sec, 33573208 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1723 secs. Pages in use: 520
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 725/1298 523/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 20948853 m, 25650 m/sec, 33792424 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1728 secs. Pages in use: 523
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 730/1298 527/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 21088716 m, 27972 m/sec, 34015849 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1733 secs. Pages in use: 527
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 735/1298 531/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 21228179 m, 27892 m/sec, 34238846 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1738 secs. Pages in use: 531
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 740/1298 534/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 21368237 m, 28011 m/sec, 34478202 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1743 secs. Pages in use: 534
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 745/1298 537/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 21493647 m, 25082 m/sec, 34684695 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1748 secs. Pages in use: 537
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 750/1298 540/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 21614575 m, 24185 m/sec, 34882639 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1753 secs. Pages in use: 540
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 755/1298 542/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 21735659 m, 24216 m/sec, 35073273 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1758 secs. Pages in use: 542
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 760/1298 544/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 21850301 m, 22928 m/sec, 35246358 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1763 secs. Pages in use: 544
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 765/1298 546/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 21972580 m, 24455 m/sec, 35436990 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1768 secs. Pages in use: 546
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 770/1298 549/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 22115324 m, 28548 m/sec, 35658093 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1773 secs. Pages in use: 549
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 775/1298 551/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 22237446 m, 24424 m/sec, 35847493 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1778 secs. Pages in use: 551
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 780/1298 553/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 22371652 m, 26841 m/sec, 36070135 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1783 secs. Pages in use: 553
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 785/1298 555/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 22490067 m, 23683 m/sec, 36261179 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1788 secs. Pages in use: 555
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 790/1298 558/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 22612308 m, 24448 m/sec, 36454814 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1793 secs. Pages in use: 558
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 795/1298 560/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 22732085 m, 23955 m/sec, 36657115 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1798 secs. Pages in use: 560
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 800/1298 562/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 22850615 m, 23706 m/sec, 36853860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1803 secs. Pages in use: 562
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 805/1298 564/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 22972661 m, 24409 m/sec, 37048340 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1808 secs. Pages in use: 564
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 810/1298 566/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 23102634 m, 25994 m/sec, 37243762 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1813 secs. Pages in use: 566
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 815/1298 569/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 23228668 m, 25206 m/sec, 37435099 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1818 secs. Pages in use: 569
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 820/1298 571/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 23349581 m, 24182 m/sec, 37624647 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1823 secs. Pages in use: 571
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 825/1298 574/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 23474094 m, 24902 m/sec, 37818032 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1828 secs. Pages in use: 574
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 830/1298 577/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 23594383 m, 24057 m/sec, 37998696 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1833 secs. Pages in use: 577
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 835/1298 580/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 23722981 m, 25719 m/sec, 38204940 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1838 secs. Pages in use: 580
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 840/1298 584/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 23865959 m, 28595 m/sec, 38419409 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1843 secs. Pages in use: 584
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 845/1298 587/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 23993815 m, 25571 m/sec, 38623826 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1848 secs. Pages in use: 587
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 850/1298 590/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 24129580 m, 27153 m/sec, 38844806 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1853 secs. Pages in use: 590
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 855/1298 593/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 24249768 m, 24037 m/sec, 39034856 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1858 secs. Pages in use: 593
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 860/1298 596/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 24374145 m, 24875 m/sec, 39239582 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1863 secs. Pages in use: 596
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 865/1298 599/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 24497142 m, 24599 m/sec, 39443610 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1868 secs. Pages in use: 599
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 870/1298 602/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 24618716 m, 24314 m/sec, 39636371 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1873 secs. Pages in use: 602
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 875/1298 605/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 24749081 m, 26073 m/sec, 39841822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1878 secs. Pages in use: 605
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 880/1298 608/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 24876922 m, 25568 m/sec, 40035080 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1883 secs. Pages in use: 608
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 885/1298 612/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 25010558 m, 26727 m/sec, 40237903 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1888 secs. Pages in use: 612
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 890/1298 616/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 25160519 m, 29992 m/sec, 40477667 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1893 secs. Pages in use: 616
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 895/1298 620/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 25310027 m, 29901 m/sec, 40717123 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1898 secs. Pages in use: 620
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 900/1298 624/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 25459298 m, 29854 m/sec, 40956238 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1903 secs. Pages in use: 624
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 905/1298 628/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 25608050 m, 29750 m/sec, 41224605 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1908 secs. Pages in use: 628
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 910/1298 632/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 25753934 m, 29176 m/sec, 41456477 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1913 secs. Pages in use: 632
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 915/1298 636/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 25899043 m, 29021 m/sec, 41718054 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1918 secs. Pages in use: 636
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 920/1298 639/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 26041662 m, 28523 m/sec, 41944344 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1923 secs. Pages in use: 639
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 925/1298 643/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 26188536 m, 29374 m/sec, 42205530 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1928 secs. Pages in use: 643
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 930/1298 647/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 26336250 m, 29542 m/sec, 42442736 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1933 secs. Pages in use: 647
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 935/1298 651/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 26491095 m, 30969 m/sec, 42689410 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1938 secs. Pages in use: 651
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-05: AG false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-14: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLeafsetExtension-PT-S32C4-LTLCardinality-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] LeafsetExtension-PT-S32C4-LTLCardinality-13: LTL 0 0 0 0 0 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 940/1298 655/2000 LeafsetExtension-PT-S32C4-LTLCardinality-10 26646050 m, 30991 m/sec, 42958645 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1943 secs. Pages in use: 655
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mLeafsetExtension-PT-S32C4-LTLCardinality-01: F true state space / EG[0m
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LeafsetExtension-PT-S32C4"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is LeafsetExtension-PT-S32C4, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r225-tall-171649614000379"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/LeafsetExtension-PT-S32C4.tgz
mv LeafsetExtension-PT-S32C4 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;