About the Execution of LoLA for LeafsetExtension-PT-S16C2
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 970.520 | 107260.00 | 110601.00 | 270.30 | FFFFTFFFTFFFFTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r225-tall-171649613900340.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is LeafsetExtension-PT-S16C2, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r225-tall-171649613900340
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 14K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 92K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 9.3K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 6.5K Apr 22 14:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Apr 22 14:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.4K Apr 22 14:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 21K Apr 12 13:42 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 130K Apr 12 13:42 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Apr 12 13:41 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 63K Apr 12 13:41 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.3K Apr 22 14:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 905K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-00
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-01
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-02
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-03
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-04
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-05
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-06
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-07
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-08
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-09
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-10
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-11
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-12
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-13
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-14
FORMULA_NAME LeafsetExtension-PT-S16C2-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717062811412
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S16C2-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mLeafsetExtension-PT-S16C2-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLeafsetExtension-PT-S16C2-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLeafsetExtension-PT-S16C2-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLeafsetExtension-PT-S16C2-LTLFireability-03: CONJ false state space[0m
[[35mlola[0m] [1m[32mLeafsetExtension-PT-S16C2-LTLFireability-04: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mLeafsetExtension-PT-S16C2-LTLFireability-05: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLeafsetExtension-PT-S16C2-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLeafsetExtension-PT-S16C2-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mLeafsetExtension-PT-S16C2-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mLeafsetExtension-PT-S16C2-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[31mLeafsetExtension-PT-S16C2-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLeafsetExtension-PT-S16C2-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLeafsetExtension-PT-S16C2-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mLeafsetExtension-PT-S16C2-LTLFireability-13: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mLeafsetExtension-PT-S16C2-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLeafsetExtension-PT-S16C2-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 107 secs. Pages in use: 42
BK_STOP 1717062918672
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 64 (type SKEL/SRCH) for 9 LeafsetExtension-PT-S16C2-LTLFireability-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 64 (type SKEL/SRCH) for LeafsetExtension-PT-S16C2-LTLFireability-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4001
[[35mlola[0m][I] fired transitions : 8856
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 60 (type CNST) for 57 LeafsetExtension-PT-S16C2-LTLFireability-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 60 (type CNST) for LeafsetExtension-PT-S16C2-LTLFireability-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 68 (type EXCL) for 9 LeafsetExtension-PT-S16C2-LTLFireability-03
[[35mlola[0m][I] time limit : 128 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 66 (type FNDP) for 9 LeafsetExtension-PT-S16C2-LTLFireability-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 67 (type EQUN) for 9 LeafsetExtension-PT-S16C2-LTLFireability-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 68 (type EXCL) for LeafsetExtension-PT-S16C2-LTLFireability-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][W] CANCELED task # 66 (type FNDP) for LeafsetExtension-PT-S16C2-LTLFireability-03 (obsolete)
[[35mlola[0m][W] CANCELED task # 67 (type EQUN) for LeafsetExtension-PT-S16C2-LTLFireability-03 (obsolete)
[[35mlola[0m][I] FINISHED task # 67 (type EQUN) for LeafsetExtension-PT-S16C2-LTLFireability-03
[[35mlola[0m][I] result : true
[*** LOG ERROR #0001 ***] [2024-05-30 09:53:32] [status_logger] string pointer is null
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 48 LeafsetExtension-PT-S16C2-LTLFireability-12
[[35mlola[0m][I] time limit : 171 sec
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[[35mlola[0m][I] FINISHED task # 49 (type EXCL) for LeafsetExtension-PT-S16C2-LTLFireability-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 126
[[35mlola[0m][I] fired transitions : 158
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 LeafsetExtension-PT-S16C2-LTLFireability-11
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for LeafsetExtension-PT-S16C2-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 14
[[35mlola[0m][I] fired transitions : 14
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] FINISHED task # 66 (type FNDP) for LeafsetExtension-PT-S16C2-LTLFireability-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 1
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[[35mlola[0m][I] LAUNCH task # 24 (type EXCL) for 23 LeafsetExtension-PT-S16C2-LTLFireability-05
[[35mlola[0m][I] time limit : 257 sec
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[[35mlola[0m][I] FINISHED task # 24 (type EXCL) for LeafsetExtension-PT-S16C2-LTLFireability-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 13
[[35mlola[0m][I] fired transitions : 13
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 35 LeafsetExtension-PT-S16C2-LTLFireability-09
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for LeafsetExtension-PT-S16C2-LTLFireability-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12577
[[35mlola[0m][I] fired transitions : 25990
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 54 LeafsetExtension-PT-S16C2-LTLFireability-14
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 55 (type EXCL) for LeafsetExtension-PT-S16C2-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 21
[[35mlola[0m][I] fired transitions : 22
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 51 LeafsetExtension-PT-S16C2-LTLFireability-13
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[[35mlola[0m][.] 52 LTL EXCL 4/399 2/2000 LeafsetExtension-PT-S16C2-LTLFireability-13 179376 m, 35875 m/sec, 551860 t fired, .
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[[35mlola[0m][.] 52 LTL EXCL 9/399 4/2000 LeafsetExtension-PT-S16C2-LTLFireability-13 402371 m, 44599 m/sec, 1231348 t fired, .
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[[35mlola[0m][.] 52 LTL EXCL 14/399 6/2000 LeafsetExtension-PT-S16C2-LTLFireability-13 603823 m, 40290 m/sec, 1907602 t fired, .
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[[35mlola[0m][.] 52 LTL EXCL 19/399 8/2000 LeafsetExtension-PT-S16C2-LTLFireability-13 797149 m, 38665 m/sec, 2596046 t fired, .
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[[35mlola[0m][.] 52 LTL EXCL 84/399 34/2000 LeafsetExtension-PT-S16C2-LTLFireability-13 3535877 m, 40599 m/sec, 11192971 t fired, .
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[[35mlola[0m][.] 52 LTL EXCL 89/399 36/2000 LeafsetExtension-PT-S16C2-LTLFireability-13 3744196 m, 41663 m/sec, 11836027 t fired, .
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[[35mlola[0m][.] 52 LTL EXCL 94/399 38/2000 LeafsetExtension-PT-S16C2-LTLFireability-13 3946554 m, 40471 m/sec, 12450247 t fired, .
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[[35mlola[0m][.] 52 LTL EXCL 99/399 39/2000 LeafsetExtension-PT-S16C2-LTLFireability-13 4135691 m, 37827 m/sec, 13043282 t fired, .
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[[35mlola[0m][.] 52 LTL EXCL 104/399 41/2000 LeafsetExtension-PT-S16C2-LTLFireability-13 4335279 m, 39917 m/sec, 13656623 t fired, .
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[[35mlola[0m][I] FINISHED task # 52 (type EXCL) for LeafsetExtension-PT-S16C2-LTLFireability-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4405613
[[35mlola[0m][I] fired transitions : 13876360
[[35mlola[0m][I] time used : 106
[[35mlola[0m][I] memory pages used : 42
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 LeafsetExtension-PT-S16C2-LTLFireability-10
[[35mlola[0m][I] time limit : 436 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 43 (type EXCL) for LeafsetExtension-PT-S16C2-LTLFireability-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 20
[[35mlola[0m][I] fired transitions : 20
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 33 (type EXCL) for 32 LeafsetExtension-PT-S16C2-LTLFireability-08
[[35mlola[0m][I] time limit : 499 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 33 (type EXCL) for LeafsetExtension-PT-S16C2-LTLFireability-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1211
[[35mlola[0m][I] fired transitions : 1570
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 30 (type EXCL) for 29 LeafsetExtension-PT-S16C2-LTLFireability-07
[[35mlola[0m][I] time limit : 582 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 30 (type EXCL) for LeafsetExtension-PT-S16C2-LTLFireability-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 20
[[35mlola[0m][I] fired transitions : 20
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 27 (type EXCL) for 26 LeafsetExtension-PT-S16C2-LTLFireability-06
[[35mlola[0m][I] time limit : 698 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 27 (type EXCL) for LeafsetExtension-PT-S16C2-LTLFireability-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 20
[[35mlola[0m][I] fired transitions : 20
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 21 (type EXCL) for 20 LeafsetExtension-PT-S16C2-LTLFireability-04
[[35mlola[0m][I] time limit : 873 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 21 (type EXCL) for LeafsetExtension-PT-S16C2-LTLFireability-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 LeafsetExtension-PT-S16C2-LTLFireability-02
[[35mlola[0m][I] time limit : 1164 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for LeafsetExtension-PT-S16C2-LTLFireability-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 20
[[35mlola[0m][I] fired transitions : 20
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 LeafsetExtension-PT-S16C2-LTLFireability-01
[[35mlola[0m][I] time limit : 1746 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for LeafsetExtension-PT-S16C2-LTLFireability-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4026
[[35mlola[0m][I] fired transitions : 8600
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 LeafsetExtension-PT-S16C2-LTLFireability-00
[[35mlola[0m][I] time limit : 3493 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for LeafsetExtension-PT-S16C2-LTLFireability-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 20
[[35mlola[0m][I] fired transitions : 20
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LeafsetExtension-PT-S16C2"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is LeafsetExtension-PT-S16C2, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r225-tall-171649613900340"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/LeafsetExtension-PT-S16C2.tgz
mv LeafsetExtension-PT-S16C2 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;