About the Execution of LoLA for LamportFastMutEx-PT-6
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 9204.968 | 1220545.00 | 1236464.00 | 2912.00 | FFFFFFTT?TFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r225-tall-171649613800292.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is LamportFastMutEx-PT-6, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r225-tall-171649613800292
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 15K Apr 13 07:44 CTLCardinality.txt
-rw-r--r-- 1 mcc users 99K Apr 13 07:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 45K Apr 13 07:42 CTLFireability.txt
-rw-r--r-- 1 mcc users 253K Apr 13 07:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 8.3K Apr 22 14:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 41K Apr 22 14:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 14K Apr 22 14:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 61K Apr 22 14:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Apr 13 07:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 91K Apr 13 07:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 72K Apr 13 07:49 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 382K Apr 13 07:49 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.4K Apr 22 14:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 8.1K Apr 22 14:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 2 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 208K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-00
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-01
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-02
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-03
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-04
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-05
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-06
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-07
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-08
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-09
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-10
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-11
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-12
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-13
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-14
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717055662205
FORMULA LamportFastMutEx-PT-6-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-LTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-LTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-LTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mLamportFastMutEx-PT-6-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLamportFastMutEx-PT-6-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLamportFastMutEx-PT-6-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLamportFastMutEx-PT-6-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLamportFastMutEx-PT-6-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLamportFastMutEx-PT-6-LTLFireability-05: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mLamportFastMutEx-PT-6-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m] [1m[32mLamportFastMutEx-PT-6-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m] [1m[33mLamportFastMutEx-PT-6-LTLFireability-08: LTL unknown AGGR[0m
[[35mlola[0m] [1m[32mLamportFastMutEx-PT-6-LTLFireability-09: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mLamportFastMutEx-PT-6-LTLFireability-10: AG false findpath[0m
[[35mlola[0m] [1m[31mLamportFastMutEx-PT-6-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLamportFastMutEx-PT-6-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLamportFastMutEx-PT-6-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLamportFastMutEx-PT-6-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mLamportFastMutEx-PT-6-LTLFireability-15: CONJ false LTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 1220 secs. Pages in use: 378
BK_STOP 1717056882750
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 66 transitions removed,41 places removed
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 52 (type SKEL/SRCH) for 45 LamportFastMutEx-PT-6-LTLFireability-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 LamportFastMutEx-PT-6-LTLFireability-00
[[35mlola[0m][I] time limit : 180 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for LamportFastMutEx-PT-6-LTLFireability-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 26
[[35mlola[0m][I] fired transitions : 26
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 52 (type SKEL/SRCH) for LamportFastMutEx-PT-6-LTLFireability-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 LamportFastMutEx-PT-6-LTLFireability-07
[[35mlola[0m][I] time limit : 200 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 54 (type FNDP) for 30 LamportFastMutEx-PT-6-LTLFireability-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 55 (type EQUN) for 30 LamportFastMutEx-PT-6-LTLFireability-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 54 (type FNDP) for LamportFastMutEx-PT-6-LTLFireability-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 55 (type EQUN) for LamportFastMutEx-PT-6-LTLFireability-10 (obsolete)
[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for LamportFastMutEx-PT-6-LTLFireability-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 16228
[[35mlola[0m][I] fired transitions : 45648
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 45 LamportFastMutEx-PT-6-LTLFireability-15
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 50 (type EXCL) for LamportFastMutEx-PT-6-LTLFireability-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 6
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 LamportFastMutEx-PT-6-LTLFireability-14
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 43 (type EXCL) for LamportFastMutEx-PT-6-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 26
[[35mlola[0m][I] fired transitions : 26
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 40 (type EXCL) for 39 LamportFastMutEx-PT-6-LTLFireability-13
[[35mlola[0m][I] time limit : 300 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 40 (type EXCL) for LamportFastMutEx-PT-6-LTLFireability-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 26
[[35mlola[0m][I] fired transitions : 26
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 28 (type EXCL) for 27 LamportFastMutEx-PT-6-LTLFireability-09
[[35mlola[0m][I] time limit : 327 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 28 (type EXCL) for LamportFastMutEx-PT-6-LTLFireability-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 28
[[35mlola[0m][I] fired transitions : 42
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 LamportFastMutEx-PT-6-LTLFireability-06
[[35mlola[0m][I] time limit : 360 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for LamportFastMutEx-PT-6-LTLFireability-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 10756
[[35mlola[0m][I] fired transitions : 19002
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 LamportFastMutEx-PT-6-LTLFireability-05
[[35mlola[0m][I] time limit : 400 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for LamportFastMutEx-PT-6-LTLFireability-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 26
[[35mlola[0m][I] fired transitions : 26
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 LamportFastMutEx-PT-6-LTLFireability-04
[[35mlola[0m][I] time limit : 450 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for LamportFastMutEx-PT-6-LTLFireability-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 547
[[35mlola[0m][I] fired transitions : 659
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 LamportFastMutEx-PT-6-LTLFireability-03
[[35mlola[0m][I] time limit : 514 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for LamportFastMutEx-PT-6-LTLFireability-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 26
[[35mlola[0m][I] fired transitions : 26
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 45 LamportFastMutEx-PT-6-LTLFireability-15
[[35mlola[0m][I] time limit : 600 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for LamportFastMutEx-PT-6-LTLFireability-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 19763
[[35mlola[0m][I] fired transitions : 36731
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 LamportFastMutEx-PT-6-LTLFireability-12
[[35mlola[0m][I] time limit : 720 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for LamportFastMutEx-PT-6-LTLFireability-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 163770
[[35mlola[0m][I] fired transitions : 532428
[[35mlola[0m][I] time used : 2
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 LamportFastMutEx-PT-6-LTLFireability-11
[[35mlola[0m][I] time limit : 899 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 34 (type EXCL) for LamportFastMutEx-PT-6-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 279
[[35mlola[0m][I] fired transitions : 421
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 LamportFastMutEx-PT-6-LTLFireability-08
[[35mlola[0m][I] time limit : 1199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-LTLFireability-09: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-10: AG false findpath[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-15: CONJ false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-LTLFireability-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 3/1199 2/2000 LamportFastMutEx-PT-6-LTLFireability-08 202194 m, 40438 m/sec, 560738 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 55 (type EQUN) for LamportFastMutEx-PT-6-LTLFireability-10
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-LTLFireability-09: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-10: AG false findpath[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-LTLFireability-11: LTL false LTL model checker[0m
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[[35mlola[0m][.] 25 LTL EXCL 1198/1199 377/2000 LamportFastMutEx-PT-6-LTLFireability-08 57371757 m, 28040 m/sec, 213129313 t fired, .
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-6"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is LamportFastMutEx-PT-6, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r225-tall-171649613800292"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-6.tgz
mv LamportFastMutEx-PT-6 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;