About the Execution of LoLA for LamportFastMutEx-PT-6
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16208.300 | 761886.00 | 744320.00 | 4939.70 | FTFFF?TFTF??TT?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r225-tall-171649613800289.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is LamportFastMutEx-PT-6, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r225-tall-171649613800289
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 15K Apr 13 07:44 CTLCardinality.txt
-rw-r--r-- 1 mcc users 99K Apr 13 07:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 45K Apr 13 07:42 CTLFireability.txt
-rw-r--r-- 1 mcc users 253K Apr 13 07:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 8.3K Apr 22 14:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 41K Apr 22 14:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 14K Apr 22 14:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 61K Apr 22 14:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Apr 13 07:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 91K Apr 13 07:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 72K Apr 13 07:49 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 382K Apr 13 07:49 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.4K Apr 22 14:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 8.1K Apr 22 14:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 2 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 208K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-00
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-01
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-02
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-03
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-04
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-05
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-06
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-07
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-08
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-09
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-10
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-11
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-12
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-13
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-14
FORMULA_NAME LamportFastMutEx-PT-6-CTLCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717055230247
FORMULA LamportFastMutEx-PT-6-CTLCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-CTLCardinality-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-CTLCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-CTLCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-CTLCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-CTLCardinality-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-CTLCardinality-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-CTLCardinality-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-CTLCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-CTLCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-6-CTLCardinality-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717055992133
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 64 (type SKEL/SRCH) for 6 LamportFastMutEx-PT-6-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 64 (type SKEL/SRCH) for LamportFastMutEx-PT-6-CTLCardinality-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] Rule S: 66 transitions removed,41 places removed
[[35mlola[0m][I] LAUNCH task # 65 (type SKEL/SRCH) for 28 LamportFastMutEx-PT-6-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 65 (type SKEL/SRCH) for LamportFastMutEx-PT-6-CTLCardinality-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 14 (type CNST) for 13 LamportFastMutEx-PT-6-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 17 (type CNST) for 16 LamportFastMutEx-PT-6-CTLCardinality-2024-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 17 (type CNST) for LamportFastMutEx-PT-6-CTLCardinality-2024-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 14 (type CNST) for LamportFastMutEx-PT-6-CTLCardinality-2024-03
[[35mlola[0m][I] result : false
[*** LOG ERROR #0001 ***] [2024-05-30 07:47:33] [status_logger] string pointer is null
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 4 (type CNST) for 3 LamportFastMutEx-PT-6-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 4 (type CNST) for LamportFastMutEx-PT-6-CTLCardinality-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 40 (type CNST) for 39 LamportFastMutEx-PT-6-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 49 (type CNST) for 48 LamportFastMutEx-PT-6-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 40 (type CNST) for LamportFastMutEx-PT-6-CTLCardinality-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 49 (type CNST) for LamportFastMutEx-PT-6-CTLCardinality-2024-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 26 (type CNST) for 25 LamportFastMutEx-PT-6-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 28 LamportFastMutEx-PT-6-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 238 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 26 (type CNST) for LamportFastMutEx-PT-6-CTLCardinality-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 70 (type EQUN) for 28 LamportFastMutEx-PT-6-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for LamportFastMutEx-PT-6-CTLCardinality-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 6
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 70 (type EQUN) for LamportFastMutEx-PT-6-CTLCardinality-2024-08 (obsolete)
[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 LamportFastMutEx-PT-6-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 325 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for LamportFastMutEx-PT-6-CTLCardinality-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 104
[[35mlola[0m][I] fired transitions : 109
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 LamportFastMutEx-PT-6-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 397 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 LamportFastMutEx-PT-6-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 76 (type SKEL/EQUN) for 51 LamportFastMutEx-PT-6-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 73 (type SKEL/SRCH) for 51 LamportFastMutEx-PT-6-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for LamportFastMutEx-PT-6-CTLCardinality-2024-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 70 (type EQUN) for LamportFastMutEx-PT-6-CTLCardinality-2024-08
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 73 (type SKEL/SRCH) for LamportFastMutEx-PT-6-CTLCardinality-2024-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 76 (type EQUN) for LamportFastMutEx-PT-6-CTLCardinality-2024-13 (obsolete)
[[35mlola[0m][I] LAUNCH task # 77 (type FNDP) for 51 LamportFastMutEx-PT-6-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 78 (type EQUN) for 51 LamportFastMutEx-PT-6-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 77 (type FNDP) for LamportFastMutEx-PT-6-CTLCardinality-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 78 (type EQUN) for LamportFastMutEx-PT-6-CTLCardinality-2024-13 (obsolete)
[[35mlola[0m][I] FINISHED task # 76 (type SKEL/EQUN) for LamportFastMutEx-PT-6-CTLCardinality-2024-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 78 (type EQUN) for LamportFastMutEx-PT-6-CTLCardinality-2024-13
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 5/715 6/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 1199753 m, 239950 m/sec, 4478064 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 28 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 10/715 10/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 2263218 m, 212693 m/sec, 9189574 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 33 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 15/715 15/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 3293024 m, 205961 m/sec, 13734223 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 38 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 20/715 19/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 4312028 m, 203800 m/sec, 18307382 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 43 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 25/715 24/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 5319946 m, 201583 m/sec, 22839112 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 48 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 30/715 28/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 6304080 m, 196826 m/sec, 27364717 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 53 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 35/715 32/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 7278135 m, 194811 m/sec, 31820791 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 58 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 40/715 36/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 8228892 m, 190151 m/sec, 36263074 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 63 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 45/715 40/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 9163876 m, 186996 m/sec, 40727937 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 68 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 50/715 44/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 10102842 m, 187793 m/sec, 45151567 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 73 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 55/715 48/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 11017876 m, 183006 m/sec, 49548656 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 78 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 60/715 52/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 11934915 m, 183407 m/sec, 53820278 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 83 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 65/715 56/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 12850391 m, 183095 m/sec, 58075761 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 88 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 70/715 60/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 13739263 m, 177774 m/sec, 62400923 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 93 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 75/715 64/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 14634428 m, 179033 m/sec, 66680725 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 98 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 80/715 67/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 15516592 m, 176432 m/sec, 70979555 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 103 secs. Pages in use: 67
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 85/715 71/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 16402056 m, 177092 m/sec, 75236886 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 108 secs. Pages in use: 71
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 90/715 75/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 17279839 m, 175556 m/sec, 79498173 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 113 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 95/715 79/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 18148464 m, 173725 m/sec, 83775099 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 118 secs. Pages in use: 79
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 100/715 82/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 19005450 m, 171397 m/sec, 88059759 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 123 secs. Pages in use: 82
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 105/715 86/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 19868756 m, 172661 m/sec, 92311277 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 128 secs. Pages in use: 86
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 110/715 90/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 20729178 m, 172084 m/sec, 96570630 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 133 secs. Pages in use: 90
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 115/715 93/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 21591144 m, 172393 m/sec, 100788210 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 138 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 120/715 97/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 22445519 m, 170875 m/sec, 105073446 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 143 secs. Pages in use: 97
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 125/715 101/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 23295878 m, 170071 m/sec, 109278657 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 148 secs. Pages in use: 101
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 130/715 104/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 24135200 m, 167864 m/sec, 113527424 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 153 secs. Pages in use: 104
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 135/715 108/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 24975571 m, 168074 m/sec, 117726474 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 158 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 140/715 111/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 25822181 m, 169322 m/sec, 121871902 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 163 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 145/715 115/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 26662362 m, 168036 m/sec, 126132424 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 168 secs. Pages in use: 115
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 150/715 118/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 27499003 m, 167328 m/sec, 130300381 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 173 secs. Pages in use: 118
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 155/715 122/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 28327365 m, 165672 m/sec, 134496247 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 178 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 160/715 125/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 29162435 m, 167014 m/sec, 138650668 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 183 secs. Pages in use: 125
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 165/715 129/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 29987888 m, 165090 m/sec, 142845506 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 188 secs. Pages in use: 129
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 170/715 132/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 30811320 m, 164686 m/sec, 147035622 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 193 secs. Pages in use: 132
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 175/715 136/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 31628850 m, 163506 m/sec, 151309515 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 198 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 180/715 139/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 32444322 m, 163094 m/sec, 155501285 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 203 secs. Pages in use: 139
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 185/715 143/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 33254733 m, 162082 m/sec, 159739738 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 208 secs. Pages in use: 143
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 190/715 146/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 34073292 m, 163711 m/sec, 163917725 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 213 secs. Pages in use: 146
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 195/715 150/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 34883819 m, 162105 m/sec, 168138691 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 218 secs. Pages in use: 150
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 200/715 153/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 35692337 m, 161703 m/sec, 172267060 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 223 secs. Pages in use: 153
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 205/715 157/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 36503290 m, 162190 m/sec, 176419514 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 228 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 210/715 160/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 37314829 m, 162307 m/sec, 180592976 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 233 secs. Pages in use: 160
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 215/715 164/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 38124594 m, 161953 m/sec, 184713859 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 238 secs. Pages in use: 164
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 220/715 167/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 38927455 m, 160572 m/sec, 188802035 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 243 secs. Pages in use: 167
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 225/715 170/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 39736512 m, 161811 m/sec, 192914083 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 248 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 230/715 174/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 40537520 m, 160201 m/sec, 197049884 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 253 secs. Pages in use: 174
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 235/715 177/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 41338074 m, 160110 m/sec, 201139177 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 258 secs. Pages in use: 177
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 240/715 181/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 42133920 m, 159169 m/sec, 205279983 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 263 secs. Pages in use: 181
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 245/715 184/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 42910781 m, 155372 m/sec, 209332527 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 268 secs. Pages in use: 184
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 250/715 187/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 43686505 m, 155144 m/sec, 213409909 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 273 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 255/715 190/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 44465639 m, 155826 m/sec, 217457257 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 278 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 260/715 194/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 45245789 m, 156030 m/sec, 221484504 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 283 secs. Pages in use: 194
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 265/715 197/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 46023174 m, 155477 m/sec, 225545830 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 288 secs. Pages in use: 197
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 270/715 200/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 46791738 m, 153712 m/sec, 229583547 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 293 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 275/715 204/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 47564442 m, 154540 m/sec, 233525740 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 298 secs. Pages in use: 204
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 280/715 207/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 48344328 m, 155977 m/sec, 237621169 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 303 secs. Pages in use: 207
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 285/715 210/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 49122971 m, 155728 m/sec, 241592117 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 308 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 290/715 213/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 49898318 m, 155069 m/sec, 245616031 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 313 secs. Pages in use: 213
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 295/715 217/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 50665542 m, 153444 m/sec, 249639364 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 318 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 300/715 220/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 51431010 m, 153093 m/sec, 253666736 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 323 secs. Pages in use: 220
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 305/715 223/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 52207581 m, 155314 m/sec, 257690950 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 328 secs. Pages in use: 223
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 310/715 227/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 52997054 m, 157894 m/sec, 261705417 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 333 secs. Pages in use: 227
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 315/715 230/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 53777556 m, 156100 m/sec, 265722891 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 338 secs. Pages in use: 230
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 320/715 233/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 54546748 m, 153838 m/sec, 269735806 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 343 secs. Pages in use: 233
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 325/715 236/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 55303759 m, 151402 m/sec, 273743545 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 348 secs. Pages in use: 236
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 330/715 240/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 56056830 m, 150614 m/sec, 277776107 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 353 secs. Pages in use: 240
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 335/715 243/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 56810012 m, 150636 m/sec, 281681959 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 358 secs. Pages in use: 243
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 340/715 246/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 57561112 m, 150220 m/sec, 285622879 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 363 secs. Pages in use: 246
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 345/715 249/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 58306196 m, 149016 m/sec, 289614101 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 368 secs. Pages in use: 249
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 350/715 252/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 59055813 m, 149923 m/sec, 293545712 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 373 secs. Pages in use: 252
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 355/715 255/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 59802466 m, 149330 m/sec, 297513388 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 378 secs. Pages in use: 255
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 360/715 259/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 60550976 m, 149702 m/sec, 301487440 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 383 secs. Pages in use: 259
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 365/715 262/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 61298295 m, 149463 m/sec, 305420010 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 388 secs. Pages in use: 262
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 370/715 265/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 62043307 m, 149002 m/sec, 309322681 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 393 secs. Pages in use: 265
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 375/715 268/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 62788389 m, 149016 m/sec, 313328851 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 398 secs. Pages in use: 268
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 380/715 271/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 63539475 m, 150217 m/sec, 317305249 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 403 secs. Pages in use: 271
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 385/715 274/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 64286133 m, 149331 m/sec, 321305908 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 408 secs. Pages in use: 274
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 390/715 277/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 65032248 m, 149223 m/sec, 325225729 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 413 secs. Pages in use: 277
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 395/715 281/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 65781596 m, 149869 m/sec, 329240995 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 418 secs. Pages in use: 281
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 400/715 284/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 66530264 m, 149733 m/sec, 333254088 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 423 secs. Pages in use: 284
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 405/715 287/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 67285653 m, 151077 m/sec, 337281947 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 428 secs. Pages in use: 287
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 410/715 290/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 68042087 m, 151286 m/sec, 341202532 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 433 secs. Pages in use: 290
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 415/715 293/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 68793917 m, 150366 m/sec, 345210350 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 438 secs. Pages in use: 293
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 420/715 297/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 69547395 m, 150695 m/sec, 349200805 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 443 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 425/715 300/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 70306582 m, 151837 m/sec, 353220026 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 448 secs. Pages in use: 300
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 430/715 303/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 71054617 m, 149607 m/sec, 357271250 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 453 secs. Pages in use: 303
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 435/715 306/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 71805881 m, 150252 m/sec, 361274548 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 458 secs. Pages in use: 306
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 440/715 309/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 72560771 m, 150978 m/sec, 365334435 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 463 secs. Pages in use: 309
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 445/715 313/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 73319821 m, 151810 m/sec, 369348878 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 468 secs. Pages in use: 313
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 450/715 316/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 74060585 m, 148152 m/sec, 373409550 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 473 secs. Pages in use: 316
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 455/715 319/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 74815742 m, 151031 m/sec, 377421173 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 478 secs. Pages in use: 319
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 460/715 322/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 75570407 m, 150933 m/sec, 381419731 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 483 secs. Pages in use: 322
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 465/715 325/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 76316973 m, 149313 m/sec, 385465826 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 488 secs. Pages in use: 325
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 470/715 328/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 77068940 m, 150393 m/sec, 389454744 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 493 secs. Pages in use: 328
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 475/715 332/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 77819943 m, 150200 m/sec, 393530446 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 498 secs. Pages in use: 332
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 480/715 335/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 78566469 m, 149305 m/sec, 397541320 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 503 secs. Pages in use: 335
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 485/715 338/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 79308644 m, 148435 m/sec, 401533714 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 508 secs. Pages in use: 338
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 490/715 341/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 80047548 m, 147780 m/sec, 405529761 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 513 secs. Pages in use: 341
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 495/715 344/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 80785540 m, 147598 m/sec, 409548089 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 518 secs. Pages in use: 344
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 500/715 347/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 81526200 m, 148132 m/sec, 413503041 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 523 secs. Pages in use: 347
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 505/715 350/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 82271352 m, 149030 m/sec, 417445126 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 528 secs. Pages in use: 350
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 510/715 353/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 83007674 m, 147264 m/sec, 421443695 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 533 secs. Pages in use: 353
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 515/715 357/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 83750291 m, 148523 m/sec, 425495199 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 538 secs. Pages in use: 357
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 520/715 360/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 84493315 m, 148604 m/sec, 429491156 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 543 secs. Pages in use: 360
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 525/715 363/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 85230456 m, 147428 m/sec, 433487624 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 548 secs. Pages in use: 363
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 530/715 366/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 85967507 m, 147410 m/sec, 437454455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 553 secs. Pages in use: 366
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 535/715 369/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 86704165 m, 147331 m/sec, 441508122 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 558 secs. Pages in use: 369
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 540/715 372/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 87437326 m, 146632 m/sec, 445515715 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 563 secs. Pages in use: 372
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 545/715 375/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 88176488 m, 147832 m/sec, 449546228 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 568 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 550/715 378/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 88917263 m, 148155 m/sec, 453596887 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 573 secs. Pages in use: 378
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 555/715 381/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 89644824 m, 145512 m/sec, 457554115 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 578 secs. Pages in use: 381
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 560/715 385/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 90379016 m, 146838 m/sec, 461548537 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 583 secs. Pages in use: 385
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 565/715 388/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 91112974 m, 146791 m/sec, 465471603 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 588 secs. Pages in use: 388
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 570/715 391/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 91844826 m, 146370 m/sec, 469528173 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 593 secs. Pages in use: 391
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 575/715 394/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 92582127 m, 147460 m/sec, 473505667 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 598 secs. Pages in use: 394
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 580/715 397/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 93317707 m, 147116 m/sec, 477488370 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 603 secs. Pages in use: 397
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 585/715 400/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 94050556 m, 146569 m/sec, 481504911 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 608 secs. Pages in use: 400
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 590/715 403/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 94774655 m, 144819 m/sec, 485448650 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 613 secs. Pages in use: 403
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 595/715 406/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 95502778 m, 145624 m/sec, 489361588 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 618 secs. Pages in use: 406
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 600/715 409/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 96234688 m, 146382 m/sec, 493362335 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 623 secs. Pages in use: 409
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 605/715 412/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 96956158 m, 144294 m/sec, 497281563 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 628 secs. Pages in use: 412
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 610/715 415/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 97675558 m, 143880 m/sec, 501285422 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 633 secs. Pages in use: 415
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 615/715 418/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 98402727 m, 145433 m/sec, 505292883 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 638 secs. Pages in use: 418
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 620/715 422/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 99126601 m, 144774 m/sec, 509306900 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 643 secs. Pages in use: 422
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 625/715 425/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 99845928 m, 143865 m/sec, 513281048 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 648 secs. Pages in use: 425
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 630/715 428/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 100568458 m, 144506 m/sec, 517213588 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 653 secs. Pages in use: 428
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 635/715 431/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 101294766 m, 145261 m/sec, 521099148 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 658 secs. Pages in use: 431
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 640/715 434/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 102026698 m, 146386 m/sec, 525159446 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 663 secs. Pages in use: 434
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 645/715 437/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 102740164 m, 142693 m/sec, 529063421 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 668 secs. Pages in use: 437
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 650/715 440/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 103454067 m, 142780 m/sec, 533021935 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 673 secs. Pages in use: 440
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 655/715 443/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 104172537 m, 143694 m/sec, 537000455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 678 secs. Pages in use: 443
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 660/715 446/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 104886103 m, 142713 m/sec, 540922848 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 683 secs. Pages in use: 446
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 665/715 449/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 105586723 m, 140124 m/sec, 544849492 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 688 secs. Pages in use: 449
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 670/715 452/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 106290360 m, 140727 m/sec, 548663928 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 693 secs. Pages in use: 452
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 675/715 455/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 106998388 m, 141605 m/sec, 552603384 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 698 secs. Pages in use: 455
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 680/715 458/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 107706359 m, 141594 m/sec, 556497580 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 703 secs. Pages in use: 458
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 685/715 461/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 108417454 m, 142219 m/sec, 560383774 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 708 secs. Pages in use: 461
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 690/715 464/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 109117308 m, 139970 m/sec, 564275404 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 713 secs. Pages in use: 464
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 695/715 466/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 109588865 m, 94311 m/sec, 566892522 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 718 secs. Pages in use: 466
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 701/715 466/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 109620473 m, 6321 m/sec, 567062894 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 724 secs. Pages in use: 466
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 706/715 466/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 109662099 m, 8325 m/sec, 567287293 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 729 secs. Pages in use: 466
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 712/715 466/2000 LamportFastMutEx-PT-6-CTLCardinality-2024-11 109679194 m, 3419 m/sec, 567387791 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 735 secs. Pages in use: 466
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 46 (type EXCL) for LamportFastMutEx-PT-6-CTLCardinality-2024-11 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-02: CONJ false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[31mLamportFastMutEx-PT-6-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mLamportFastMutEx-PT-6-CTLCardinality-2024-13: CONJ true CONJ[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-11: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] LamportFastMutEx-PT-6-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 758 secs. Pages in use: 466
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 59 (type EXCL) for 58 LamportFastMutEx-PT-6-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 710 sec
[[35mlola[0m][I] memory limit: 2000 pages
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 408 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-6"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is LamportFastMutEx-PT-6, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r225-tall-171649613800289"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-6.tgz
mv LamportFastMutEx-PT-6 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;