Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r223-tall-171649611600498.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-5568
Executing tool greatspnxred
Input is MAPKbis-PT-5310, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r223-tall-171649611600498
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 700K
-rw-r--r-- 1 mcc users 9.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 84K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 15K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 66K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Apr 22 14:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.7K Apr 22 14:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 11 16:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 123K Apr 11 16:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 22K Apr 11 16:01 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 82K Apr 11 16:01 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 22 14:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 170K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2024-00
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2024-01
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2024-02
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2024-03
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2024-04
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2024-05
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2024-06
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2024-07
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2024-08
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2024-09
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2024-10
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2024-11
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2023-12
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2023-13
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2023-14
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1716565890031

Invoking MCC driver with
BK_TOOL=greatspnxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=MAPKbis-PT-5310
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool greatspn
Invoking reducer
Running Version 202405141337
[2024-05-24 15:51:31] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-24 15:51:31] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-24 15:51:31] [INFO ] Load time of PNML (sax parser for PT used): 81 ms
[2024-05-24 15:51:31] [INFO ] Transformed 106 places.
[2024-05-24 15:51:31] [INFO ] Transformed 173 transitions.
[2024-05-24 15:51:31] [INFO ] Found NUPN structural information;
[2024-05-24 15:51:31] [INFO ] Parsed PT model containing 106 places and 173 transitions and 986 arcs in 187 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
Deduced a syphon composed of 11 places in 2 ms
Reduce places removed 15 places and 41 transitions.
Reduce places removed 7 places and 0 transitions.
FORMULA MAPKbis-PT-5310-CTLFireability-2024-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA MAPKbis-PT-5310-CTLFireability-2023-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 66 out of 84 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 84/84 places, 132/132 transitions.
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 84 transition count 130
Applied a total of 2 rules in 18 ms. Remains 84 /84 variables (removed 0) and now considering 130/132 (removed 2) transitions.
[2024-05-24 15:51:31] [INFO ] Flow matrix only has 84 transitions (discarded 46 similar events)
// Phase 1: matrix 84 rows 84 cols
[2024-05-24 15:51:31] [INFO ] Computed 42 invariants in 14 ms
[2024-05-24 15:51:31] [INFO ] Implicit Places using invariants in 213 ms returned []
[2024-05-24 15:51:31] [INFO ] Flow matrix only has 84 transitions (discarded 46 similar events)
[2024-05-24 15:51:31] [INFO ] Invariant cache hit.
[2024-05-24 15:51:31] [INFO ] State equation strengthened by 42 read => feed constraints.
[2024-05-24 15:51:31] [INFO ] Implicit Places using invariants and state equation in 129 ms returned []
Implicit Place search using SMT with State Equation took 371 ms to find 0 implicit places.
Running 129 sub problems to find dead transitions.
[2024-05-24 15:51:31] [INFO ] Flow matrix only has 84 transitions (discarded 46 similar events)
[2024-05-24 15:51:31] [INFO ] Invariant cache hit.
[2024-05-24 15:51:31] [INFO ] State equation strengthened by 42 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/84 variables, 84/84 constraints. Problems are: Problem set: 0 solved, 129 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/84 variables, 42/126 constraints. Problems are: Problem set: 0 solved, 129 unsolved
[2024-05-24 15:51:32] [INFO ] Deduced a trap composed of 3 places in 34 ms of which 10 ms to minimize.
At refinement iteration 2 (INCLUDED_ONLY) 0/84 variables, 1/127 constraints. Problems are: Problem set: 0 solved, 129 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/84 variables, 0/127 constraints. Problems are: Problem set: 0 solved, 129 unsolved
At refinement iteration 4 (OVERLAPS) 84/168 variables, 84/211 constraints. Problems are: Problem set: 0 solved, 129 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/168 variables, 42/253 constraints. Problems are: Problem set: 0 solved, 129 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/168 variables, 0/253 constraints. Problems are: Problem set: 0 solved, 129 unsolved
At refinement iteration 7 (OVERLAPS) 0/168 variables, 0/253 constraints. Problems are: Problem set: 0 solved, 129 unsolved
No progress, stopping.
After SMT solving in domain Real declared 168/168 variables, and 253 constraints, problems are : Problem set: 0 solved, 129 unsolved in 2547 ms.
Refiners :[Domain max(s): 84/84 constraints, Positive P Invariants (semi-flows): 42/42 constraints, State Equation: 84/84 constraints, ReadFeed: 42/42 constraints, PredecessorRefiner: 129/129 constraints, Known Traps: 1/1 constraints]
Escalating to Integer solving :Problem set: 0 solved, 129 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/84 variables, 84/84 constraints. Problems are: Problem set: 0 solved, 129 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/84 variables, 42/126 constraints. Problems are: Problem set: 0 solved, 129 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/84 variables, 1/127 constraints. Problems are: Problem set: 0 solved, 129 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/84 variables, 0/127 constraints. Problems are: Problem set: 0 solved, 129 unsolved
At refinement iteration 4 (OVERLAPS) 84/168 variables, 84/211 constraints. Problems are: Problem set: 0 solved, 129 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/168 variables, 42/253 constraints. Problems are: Problem set: 0 solved, 129 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/168 variables, 129/382 constraints. Problems are: Problem set: 0 solved, 129 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/168 variables, 0/382 constraints. Problems are: Problem set: 0 solved, 129 unsolved
At refinement iteration 8 (OVERLAPS) 0/168 variables, 0/382 constraints. Problems are: Problem set: 0 solved, 129 unsolved
No progress, stopping.
After SMT solving in domain Int declared 168/168 variables, and 382 constraints, problems are : Problem set: 0 solved, 129 unsolved in 1712 ms.
Refiners :[Domain max(s): 84/84 constraints, Positive P Invariants (semi-flows): 42/42 constraints, State Equation: 84/84 constraints, ReadFeed: 42/42 constraints, PredecessorRefiner: 129/129 constraints, Known Traps: 1/1 constraints]
After SMT, in 4323ms problems are : Problem set: 0 solved, 129 unsolved
Search for dead transitions found 0 dead transitions in 4340ms
Starting structural reductions in LTL mode, iteration 1 : 84/84 places, 130/132 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4749 ms. Remains : 84/84 places, 130/132 transitions.
Support contains 66 out of 84 places after structural reductions.
[2024-05-24 15:51:36] [INFO ] Flatten gal took : 30 ms
[2024-05-24 15:51:36] [INFO ] Flatten gal took : 18 ms
[2024-05-24 15:51:36] [INFO ] Input system was already deterministic with 130 transitions.
Support contains 64 out of 84 places (down from 66) after GAL structural reductions.
Reduction of identical properties reduced properties to check from 60 to 55
RANDOM walk for 40000 steps (8 resets) in 1468 ms. (27 steps per ms) remains 2/55 properties
BEST_FIRST walk for 40003 steps (8 resets) in 187 ms. (212 steps per ms) remains 2/2 properties
BEST_FIRST walk for 33646 steps (7 resets) in 134 ms. (249 steps per ms) remains 0/2 properties
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 8 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 8 ms
[2024-05-24 15:51:37] [INFO ] Input system was already deterministic with 130 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 84/84 places, 130/130 transitions.
Applied a total of 0 rules in 2 ms. Remains 84 /84 variables (removed 0) and now considering 130/130 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 84/84 places, 130/130 transitions.
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 7 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 7 ms
[2024-05-24 15:51:37] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 84/84 places, 130/130 transitions.
Applied a total of 0 rules in 2 ms. Remains 84 /84 variables (removed 0) and now considering 130/130 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 84/84 places, 130/130 transitions.
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 6 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 6 ms
[2024-05-24 15:51:37] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 84/84 places, 130/130 transitions.
Applied a total of 0 rules in 2 ms. Remains 84 /84 variables (removed 0) and now considering 130/130 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 84/84 places, 130/130 transitions.
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 6 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 6 ms
[2024-05-24 15:51:37] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 84/84 places, 130/130 transitions.
Applied a total of 0 rules in 9 ms. Remains 84 /84 variables (removed 0) and now considering 130/130 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 84/84 places, 130/130 transitions.
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 6 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 6 ms
[2024-05-24 15:51:37] [INFO ] Input system was already deterministic with 130 transitions.
RANDOM walk for 343 steps (0 resets) in 5 ms. (57 steps per ms) remains 0/1 properties
FORMULA MAPKbis-PT-5310-CTLFireability-2024-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 84/84 places, 130/130 transitions.
Applied a total of 0 rules in 2 ms. Remains 84 /84 variables (removed 0) and now considering 130/130 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 84/84 places, 130/130 transitions.
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 5 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 6 ms
[2024-05-24 15:51:37] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 84/84 places, 130/130 transitions.
Applied a total of 0 rules in 2 ms. Remains 84 /84 variables (removed 0) and now considering 130/130 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 84/84 places, 130/130 transitions.
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 6 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 6 ms
[2024-05-24 15:51:37] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 84/84 places, 130/130 transitions.
Applied a total of 0 rules in 2 ms. Remains 84 /84 variables (removed 0) and now considering 130/130 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 84/84 places, 130/130 transitions.
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 5 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 5 ms
[2024-05-24 15:51:37] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 84/84 places, 130/130 transitions.
Applied a total of 0 rules in 2 ms. Remains 84 /84 variables (removed 0) and now considering 130/130 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 84/84 places, 130/130 transitions.
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 5 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 5 ms
[2024-05-24 15:51:37] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 84/84 places, 130/130 transitions.
Applied a total of 0 rules in 2 ms. Remains 84 /84 variables (removed 0) and now considering 130/130 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 84/84 places, 130/130 transitions.
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 5 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 5 ms
[2024-05-24 15:51:37] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 84/84 places, 130/130 transitions.
Applied a total of 0 rules in 1 ms. Remains 84 /84 variables (removed 0) and now considering 130/130 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 84/84 places, 130/130 transitions.
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 4 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 5 ms
[2024-05-24 15:51:37] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 84/84 places, 130/130 transitions.
Applied a total of 0 rules in 2 ms. Remains 84 /84 variables (removed 0) and now considering 130/130 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 84/84 places, 130/130 transitions.
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 4 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 5 ms
[2024-05-24 15:51:37] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 84/84 places, 130/130 transitions.
Applied a total of 0 rules in 1 ms. Remains 84 /84 variables (removed 0) and now considering 130/130 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 84/84 places, 130/130 transitions.
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 4 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 4 ms
[2024-05-24 15:51:37] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 84/84 places, 130/130 transitions.
Applied a total of 0 rules in 5 ms. Remains 84 /84 variables (removed 0) and now considering 130/130 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 84/84 places, 130/130 transitions.
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 5 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 5 ms
[2024-05-24 15:51:37] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 84/84 places, 130/130 transitions.
Applied a total of 0 rules in 6 ms. Remains 84 /84 variables (removed 0) and now considering 130/130 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 84/84 places, 130/130 transitions.
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 5 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 4 ms
[2024-05-24 15:51:37] [INFO ] Input system was already deterministic with 130 transitions.
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 5 ms
[2024-05-24 15:51:37] [INFO ] Flatten gal took : 5 ms
[2024-05-24 15:51:37] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2024-05-24 15:51:37] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 84 places, 130 transitions and 670 arcs took 2 ms.
Total runtime 6439 ms.
There are residual formulas that ITS could not solve within timeout
----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2023
----------------------------------------------------------------------

Running MAPKbis-PT-5310

IS_COLORED=
IS_NUPN=

LOADING PETRI NET FILE /home/mcc/execution/412/model.pnml (PNML) ...
PNML VERSION 2009, P/T NET.
COLOR CLASSES: 0
CONSTANTS: 0
PLACES: 84
TRANSITIONS: 130
COLOR VARS: 0
MEASURES: 0
LOADING TIME: [User 0.005s, Sys 0.000s]


SAVING FILE /home/mcc/execution/412/model (.net / .def) ...
EXPORT TIME: [User 0.000s, Sys 0.000s]


----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2022, University of Torino, Italy.
website: https://github.com/greatspn/SOURCES

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 538
MODEL NAME: /home/mcc/execution/412/model
84 places, 130 transitions.

Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Building monolithic NSF...
FORMULA MAPKbis-PT-5310-CTLFireability-2024-00 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA MAPKbis-PT-5310-CTLFireability-2024-03 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA MAPKbis-PT-5310-CTLFireability-2024-07 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA MAPKbis-PT-5310-CTLFireability-2024-08 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA MAPKbis-PT-5310-CTLFireability-2024-01 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA MAPKbis-PT-5310-CTLFireability-2024-10 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA MAPKbis-PT-5310-CTLFireability-2024-11 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA MAPKbis-PT-5310-CTLFireability-2024-09 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA MAPKbis-PT-5310-CTLFireability-2023-14 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA MAPKbis-PT-5310-CTLFireability-2023-15 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA MAPKbis-PT-5310-CTLFireability-2024-05 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA MAPKbis-PT-5310-CTLFireability-2023-13 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA MAPKbis-PT-5310-CTLFireability-2024-06 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
Ok.
EXITCODE: 0
----------------------------------------------------------------------

BK_STOP 1716565952985

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MAPKbis-PT-5310"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="greatspnxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool greatspnxred"
echo " Input is MAPKbis-PT-5310, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r223-tall-171649611600498"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/MAPKbis-PT-5310.tgz
mv MAPKbis-PT-5310 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;