Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r223-tall-171649610900210.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool greatspnxred
Input is LamportFastMutEx-COL-3, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r223-tall-171649610900210
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 520K
-rw-r--r-- 1 mcc users 8.6K Apr 13 07:42 CTLCardinality.txt
-rw-r--r-- 1 mcc users 88K Apr 13 07:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Apr 13 07:39 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Apr 13 07:39 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Apr 22 14:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 10K Apr 13 07:48 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 95K Apr 13 07:48 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 13 07:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 103K Apr 13 07:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 22 14:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 2 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 39K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-00
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-01
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-02
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-03
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-04
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-05
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-06
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-07
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-08
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-09
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-10
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-11
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-12
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-13
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-14
FORMULA_NAME LamportFastMutEx-COL-3-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1716523015030

Invoking MCC driver with
BK_TOOL=greatspnxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=LamportFastMutEx-COL-3
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool greatspn
Invoking reducer
Running Version 202405141337
[2024-05-24 03:56:56] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-24 03:56:56] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-24 03:56:56] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-05-24 03:56:56] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-05-24 03:56:56] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 579 ms
[2024-05-24 03:56:56] [INFO ] Imported 18 HL places and 17 HL transitions for a total of 100 PT places and 192.0 transition bindings in 16 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 15 ms.
[2024-05-24 03:56:56] [INFO ] Built PT skeleton of HLPN with 18 places and 17 transitions 68 arcs in 4 ms.
[2024-05-24 03:56:56] [INFO ] Skeletonized 5 HLPN properties in 1 ms. Removed 11 properties that had guard overlaps.
Computed a total of 3 stabilizing places and 0 stable transitions
Remains 3 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
RANDOM walk for 346 steps (0 resets) in 16 ms. (20 steps per ms) remains 0/3 properties
[2024-05-24 03:56:57] [INFO ] Flatten gal took : 14 ms
[2024-05-24 03:56:57] [INFO ] Flatten gal took : 2 ms
Domain [pid(4), pid(4)] of place P_wait breaks symmetries in sort pid
Symmetric sort wr.t. initial and guards and successors and join/free detected :P_bool
Arc [3:1*[$i, 1]] contains constants of sort P_bool
Transition T_setbi_2 : constants on arcs in [[3:1*[$i, 1]]] introduces in P_bool(2) partition with 1 elements that refines current partition to 2 subsets.
[2024-05-24 03:56:57] [INFO ] Unfolded HLPN to a Petri net with 100 places and 156 transitions 664 arcs in 24 ms.
[2024-05-24 03:56:57] [INFO ] Unfolded 16 HLPN properties in 0 ms.
Deduced a syphon composed of 29 places in 1 ms
Reduce places removed 29 places and 42 transitions.
Support contains 71 out of 71 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 114/114 transitions.
Applied a total of 0 rules in 6 ms. Remains 71 /71 variables (removed 0) and now considering 114/114 (removed 0) transitions.
[2024-05-24 03:56:57] [INFO ] Flow matrix only has 96 transitions (discarded 18 similar events)
// Phase 1: matrix 96 rows 71 cols
[2024-05-24 03:56:57] [INFO ] Computed 17 invariants in 6 ms
[2024-05-24 03:56:57] [INFO ] Implicit Places using invariants in 149 ms returned []
[2024-05-24 03:56:57] [INFO ] Flow matrix only has 96 transitions (discarded 18 similar events)
[2024-05-24 03:56:57] [INFO ] Invariant cache hit.
[2024-05-24 03:56:57] [INFO ] State equation strengthened by 27 read => feed constraints.
[2024-05-24 03:56:57] [INFO ] Implicit Places using invariants and state equation in 95 ms returned []
Implicit Place search using SMT with State Equation took 295 ms to find 0 implicit places.
Running 111 sub problems to find dead transitions.
[2024-05-24 03:56:57] [INFO ] Flow matrix only has 96 transitions (discarded 18 similar events)
[2024-05-24 03:56:57] [INFO ] Invariant cache hit.
[2024-05-24 03:56:57] [INFO ] State equation strengthened by 27 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/71 variables, 17/17 constraints. Problems are: Problem set: 0 solved, 111 unsolved
[2024-05-24 03:56:57] [INFO ] Deduced a trap composed of 12 places in 59 ms of which 10 ms to minimize.
[2024-05-24 03:56:57] [INFO ] Deduced a trap composed of 13 places in 40 ms of which 2 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 9 places in 37 ms of which 1 ms to minimize.
Problem TDEAD3 is UNSAT
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 11 places in 43 ms of which 1 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 16 places in 39 ms of which 1 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 9 places in 28 ms of which 0 ms to minimize.
Problem TDEAD5 is UNSAT
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 14 places in 38 ms of which 1 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 11 places in 36 ms of which 1 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 5 places in 32 ms of which 1 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 5 places in 31 ms of which 0 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 10 places in 27 ms of which 0 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 5 places in 55 ms of which 1 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 17 places in 53 ms of which 1 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 9 places in 31 ms of which 0 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 5 places in 34 ms of which 1 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 5 places in 26 ms of which 0 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 9 places in 50 ms of which 1 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 13 places in 33 ms of which 1 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 12 places in 59 ms of which 1 ms to minimize.
[2024-05-24 03:56:58] [INFO ] Deduced a trap composed of 12 places in 36 ms of which 5 ms to minimize.
Problem TDEAD3 is UNSAT
Problem TDEAD4 is UNSAT
Problem TDEAD5 is UNSAT
Problem TDEAD22 is UNSAT
Problem TDEAD46 is UNSAT
Problem TDEAD51 is UNSAT
Problem TDEAD54 is UNSAT
Problem TDEAD57 is UNSAT
At refinement iteration 1 (INCLUDED_ONLY) 0/71 variables, 20/37 constraints. Problems are: Problem set: 8 solved, 103 unsolved
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 10 places in 41 ms of which 6 ms to minimize.
Problem TDEAD18 is UNSAT
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 9 places in 35 ms of which 1 ms to minimize.
Problem TDEAD26 is UNSAT
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 8 places in 19 ms of which 1 ms to minimize.
Problem TDEAD27 is UNSAT
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 8 places in 29 ms of which 0 ms to minimize.
Problem TDEAD28 is UNSAT
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 19 places in 39 ms of which 1 ms to minimize.
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 17 places in 49 ms of which 1 ms to minimize.
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 8 places in 18 ms of which 1 ms to minimize.
Problem TDEAD29 is UNSAT
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 17 places in 42 ms of which 1 ms to minimize.
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 17 places in 74 ms of which 1 ms to minimize.
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 18 places in 60 ms of which 1 ms to minimize.
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 17 places in 56 ms of which 1 ms to minimize.
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 18 places in 50 ms of which 1 ms to minimize.
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 18 places in 28 ms of which 1 ms to minimize.
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 17 places in 32 ms of which 1 ms to minimize.
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 16 places in 33 ms of which 1 ms to minimize.
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 17 places in 31 ms of which 1 ms to minimize.
Problem TDEAD42 is UNSAT
Problem TDEAD50 is UNSAT
Problem TDEAD60 is UNSAT
Problem TDEAD61 is UNSAT
Problem TDEAD62 is UNSAT
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 15 places in 37 ms of which 0 ms to minimize.
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 13 places in 28 ms of which 1 ms to minimize.
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 11 places in 29 ms of which 0 ms to minimize.
[2024-05-24 03:56:59] [INFO ] Deduced a trap composed of 12 places in 50 ms of which 1 ms to minimize.
Problem TDEAD18 is UNSAT
Problem TDEAD26 is UNSAT
Problem TDEAD27 is UNSAT
Problem TDEAD28 is UNSAT
Problem TDEAD29 is UNSAT
Problem TDEAD42 is UNSAT
Problem TDEAD50 is UNSAT
Problem TDEAD60 is UNSAT
Problem TDEAD61 is UNSAT
Problem TDEAD62 is UNSAT
At refinement iteration 2 (INCLUDED_ONLY) 0/71 variables, 20/57 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-05-24 03:57:00] [INFO ] Deduced a trap composed of 23 places in 55 ms of which 2 ms to minimize.
[2024-05-24 03:57:00] [INFO ] Deduced a trap composed of 11 places in 53 ms of which 2 ms to minimize.
[2024-05-24 03:57:00] [INFO ] Deduced a trap composed of 14 places in 43 ms of which 1 ms to minimize.
[2024-05-24 03:57:00] [INFO ] Deduced a trap composed of 25 places in 46 ms of which 2 ms to minimize.
[2024-05-24 03:57:00] [INFO ] Deduced a trap composed of 14 places in 38 ms of which 1 ms to minimize.
[2024-05-24 03:57:00] [INFO ] Deduced a trap composed of 26 places in 42 ms of which 0 ms to minimize.
[2024-05-24 03:57:00] [INFO ] Deduced a trap composed of 16 places in 49 ms of which 0 ms to minimize.
[2024-05-24 03:57:00] [INFO ] Deduced a trap composed of 16 places in 48 ms of which 1 ms to minimize.
[2024-05-24 03:57:00] [INFO ] Deduced a trap composed of 15 places in 47 ms of which 1 ms to minimize.
At refinement iteration 3 (INCLUDED_ONLY) 0/71 variables, 9/66 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-05-24 03:57:00] [INFO ] Deduced a trap composed of 12 places in 39 ms of which 1 ms to minimize.
At refinement iteration 4 (INCLUDED_ONLY) 0/71 variables, 1/67 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-05-24 03:57:01] [INFO ] Deduced a trap composed of 18 places in 39 ms of which 1 ms to minimize.
[2024-05-24 03:57:01] [INFO ] Deduced a trap composed of 19 places in 35 ms of which 1 ms to minimize.
[2024-05-24 03:57:01] [INFO ] Deduced a trap composed of 18 places in 32 ms of which 0 ms to minimize.
[2024-05-24 03:57:01] [INFO ] Deduced a trap composed of 17 places in 35 ms of which 1 ms to minimize.
At refinement iteration 5 (INCLUDED_ONLY) 0/71 variables, 4/71 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-05-24 03:57:01] [INFO ] Deduced a trap composed of 15 places in 34 ms of which 1 ms to minimize.
[2024-05-24 03:57:01] [INFO ] Deduced a trap composed of 20 places in 31 ms of which 0 ms to minimize.
At refinement iteration 6 (INCLUDED_ONLY) 0/71 variables, 2/73 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/71 variables, 0/73 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 8 (OVERLAPS) 96/167 variables, 71/144 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/167 variables, 27/171 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/167 variables, 0/171 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 11 (OVERLAPS) 0/167 variables, 0/171 constraints. Problems are: Problem set: 18 solved, 93 unsolved
No progress, stopping.
After SMT solving in domain Real declared 167/167 variables, and 171 constraints, problems are : Problem set: 18 solved, 93 unsolved in 5663 ms.
Refiners :[Positive P Invariants (semi-flows): 17/17 constraints, State Equation: 71/71 constraints, ReadFeed: 27/27 constraints, PredecessorRefiner: 111/111 constraints, Known Traps: 56/56 constraints]
Escalating to Integer solving :Problem set: 18 solved, 93 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/68 variables, 5/5 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/68 variables, 34/39 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/68 variables, 0/39 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 3 (OVERLAPS) 3/71 variables, 12/51 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/71 variables, 22/73 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-05-24 03:57:03] [INFO ] Deduced a trap composed of 17 places in 43 ms of which 8 ms to minimize.
[2024-05-24 03:57:03] [INFO ] Deduced a trap composed of 12 places in 22 ms of which 1 ms to minimize.
At refinement iteration 5 (INCLUDED_ONLY) 0/71 variables, 2/75 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/71 variables, 0/75 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 7 (OVERLAPS) 96/167 variables, 71/146 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/167 variables, 27/173 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/167 variables, 93/266 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-05-24 03:57:04] [INFO ] Deduced a trap composed of 15 places in 42 ms of which 1 ms to minimize.
[2024-05-24 03:57:04] [INFO ] Deduced a trap composed of 28 places in 39 ms of which 1 ms to minimize.
[2024-05-24 03:57:04] [INFO ] Deduced a trap composed of 18 places in 31 ms of which 1 ms to minimize.
At refinement iteration 10 (INCLUDED_ONLY) 0/167 variables, 3/269 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-05-24 03:57:05] [INFO ] Deduced a trap composed of 18 places in 40 ms of which 1 ms to minimize.
[2024-05-24 03:57:05] [INFO ] Deduced a trap composed of 14 places in 31 ms of which 1 ms to minimize.
At refinement iteration 11 (INCLUDED_ONLY) 0/167 variables, 2/271 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-05-24 03:57:06] [INFO ] Deduced a trap composed of 17 places in 42 ms of which 1 ms to minimize.
[2024-05-24 03:57:06] [INFO ] Deduced a trap composed of 17 places in 37 ms of which 1 ms to minimize.
At refinement iteration 12 (INCLUDED_ONLY) 0/167 variables, 2/273 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-05-24 03:57:07] [INFO ] Deduced a trap composed of 17 places in 40 ms of which 0 ms to minimize.
[2024-05-24 03:57:07] [INFO ] Deduced a trap composed of 14 places in 35 ms of which 1 ms to minimize.
At refinement iteration 13 (INCLUDED_ONLY) 0/167 variables, 2/275 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-05-24 03:57:08] [INFO ] Deduced a trap composed of 18 places in 33 ms of which 1 ms to minimize.
[2024-05-24 03:57:08] [INFO ] Deduced a trap composed of 14 places in 39 ms of which 0 ms to minimize.
[2024-05-24 03:57:08] [INFO ] Deduced a trap composed of 15 places in 35 ms of which 1 ms to minimize.
At refinement iteration 14 (INCLUDED_ONLY) 0/167 variables, 3/278 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 15 (INCLUDED_ONLY) 0/167 variables, 0/278 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 16 (OVERLAPS) 0/167 variables, 0/278 constraints. Problems are: Problem set: 18 solved, 93 unsolved
No progress, stopping.
After SMT solving in domain Int declared 167/167 variables, and 278 constraints, problems are : Problem set: 18 solved, 93 unsolved in 7179 ms.
Refiners :[Positive P Invariants (semi-flows): 17/17 constraints, State Equation: 71/71 constraints, ReadFeed: 27/27 constraints, PredecessorRefiner: 93/111 constraints, Known Traps: 70/70 constraints]
After SMT, in 12908ms problems are : Problem set: 18 solved, 93 unsolved
Search for dead transitions found 18 dead transitions in 12922ms
Found 18 dead transitions using SMT.
Drop transitions (Dead Transitions using SMT only with invariants) removed 18 transitions
Dead transitions reduction (with SMT) removed 18 transitions
Starting structural reductions in LTL mode, iteration 1 : 71/71 places, 96/114 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 13240 ms. Remains : 71/71 places, 96/114 transitions.
Support contains 71 out of 71 places after structural reductions.
[2024-05-24 03:57:10] [INFO ] Flatten gal took : 19 ms
[2024-05-24 03:57:10] [INFO ] Flatten gal took : 22 ms
[2024-05-24 03:57:10] [INFO ] Input system was already deterministic with 96 transitions.
Reduction of identical properties reduced properties to check from 44 to 39
RANDOM walk for 40000 steps (8 resets) in 2184 ms. (18 steps per ms) remains 3/39 properties
BEST_FIRST walk for 40002 steps (8 resets) in 697 ms. (57 steps per ms) remains 3/3 properties
BEST_FIRST walk for 40002 steps (8 resets) in 534 ms. (74 steps per ms) remains 3/3 properties
BEST_FIRST walk for 40002 steps (8 resets) in 341 ms. (116 steps per ms) remains 3/3 properties
[2024-05-24 03:57:11] [INFO ] Flow matrix only has 84 transitions (discarded 12 similar events)
// Phase 1: matrix 84 rows 71 cols
[2024-05-24 03:57:11] [INFO ] Computed 17 invariants in 1 ms
[2024-05-24 03:57:11] [INFO ] State equation strengthened by 24 read => feed constraints.
Problem AtomicPropp23 is UNSAT
Problem AtomicPropp28 is UNSAT
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/28 variables, 4/4 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/28 variables, 0/4 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 2 (OVERLAPS) 43/71 variables, 13/17 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/71 variables, 0/17 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 4 (OVERLAPS) 84/155 variables, 71/88 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/155 variables, 24/112 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/155 variables, 0/112 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 7 (OVERLAPS) 0/155 variables, 0/112 constraints. Problems are: Problem set: 2 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Real declared 155/155 variables, and 112 constraints, problems are : Problem set: 2 solved, 1 unsolved in 309 ms.
Refiners :[Positive P Invariants (semi-flows): 17/17 constraints, State Equation: 71/71 constraints, ReadFeed: 24/24 constraints, PredecessorRefiner: 3/3 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 2 solved, 1 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/12 variables, 0/0 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 1 (OVERLAPS) 53/65 variables, 14/14 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/65 variables, 0/14 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 84/149 variables, 65/79 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/149 variables, 24/103 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/149 variables, 1/104 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/149 variables, 0/104 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 7 (OVERLAPS) 6/155 variables, 6/110 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/155 variables, 3/113 constraints. Problems are: Problem set: 2 solved, 1 unsolved
[2024-05-24 03:57:12] [INFO ] Deduced a trap composed of 25 places in 40 ms of which 1 ms to minimize.
[2024-05-24 03:57:12] [INFO ] Deduced a trap composed of 9 places in 33 ms of which 1 ms to minimize.
[2024-05-24 03:57:12] [INFO ] Deduced a trap composed of 8 places in 21 ms of which 1 ms to minimize.
[2024-05-24 03:57:12] [INFO ] Deduced a trap composed of 18 places in 34 ms of which 0 ms to minimize.
[2024-05-24 03:57:12] [INFO ] Deduced a trap composed of 13 places in 35 ms of which 1 ms to minimize.
[2024-05-24 03:57:12] [INFO ] Deduced a trap composed of 24 places in 33 ms of which 1 ms to minimize.
[2024-05-24 03:57:12] [INFO ] Deduced a trap composed of 13 places in 38 ms of which 1 ms to minimize.
[2024-05-24 03:57:12] [INFO ] Deduced a trap composed of 8 places in 20 ms of which 0 ms to minimize.
[2024-05-24 03:57:12] [INFO ] Deduced a trap composed of 18 places in 34 ms of which 1 ms to minimize.
[2024-05-24 03:57:12] [INFO ] Deduced a trap composed of 12 places in 39 ms of which 0 ms to minimize.
[2024-05-24 03:57:12] [INFO ] Deduced a trap composed of 8 places in 22 ms of which 0 ms to minimize.
[2024-05-24 03:57:12] [INFO ] Deduced a trap composed of 15 places in 40 ms of which 1 ms to minimize.
[2024-05-24 03:57:12] [INFO ] Deduced a trap composed of 12 places in 39 ms of which 1 ms to minimize.
[2024-05-24 03:57:12] [INFO ] Deduced a trap composed of 20 places in 42 ms of which 0 ms to minimize.
[2024-05-24 03:57:12] [INFO ] Deduced a trap composed of 13 places in 42 ms of which 0 ms to minimize.
Problem AtomicPropp40 is UNSAT
After SMT solving in domain Int declared 155/155 variables, and 128 constraints, problems are : Problem set: 3 solved, 0 unsolved in 729 ms.
Refiners :[Positive P Invariants (semi-flows): 17/17 constraints, State Equation: 71/71 constraints, ReadFeed: 24/24 constraints, PredecessorRefiner: 1/3 constraints, Known Traps: 15/15 constraints]
After SMT, in 1052ms problems are : Problem set: 3 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 3 atomic propositions for a total of 16 simplifications.
[2024-05-24 03:57:12] [INFO ] Flatten gal took : 21 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 20 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
Computed a total of 1 stabilizing places and 3 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 8 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 5 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 7 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
RANDOM walk for 89 steps (0 resets) in 4 ms. (17 steps per ms) remains 0/1 properties
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-00 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 5 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 5 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 14 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 5 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 9 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 4 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 5 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 7 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 10 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 6 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 19 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 19 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 5 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 5 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 5 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 17 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 4 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 4 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 4 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 9 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 4 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 5 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 3 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 5 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 4 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 0 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 5 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 6 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 3 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 4 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 3 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 4 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 3 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 3 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 96/96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 3 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 4 ms
[2024-05-24 03:57:13] [INFO ] Input system was already deterministic with 96 transitions.
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 9 ms
[2024-05-24 03:57:13] [INFO ] Flatten gal took : 8 ms
[2024-05-24 03:57:13] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 22 ms.
[2024-05-24 03:57:13] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 71 places, 96 transitions and 408 arcs took 20 ms.
Total runtime 17828 ms.
There are residual formulas that ITS could not solve within timeout
----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2023
----------------------------------------------------------------------

Running LamportFastMutEx-COL-3

IS_COLORED=
IS_NUPN=

LOADING PETRI NET FILE /home/mcc/execution/410/model.pnml (PNML) ...
PNML VERSION 2009, P/T NET.
COLOR CLASSES: 0
CONSTANTS: 0
PLACES: 71
TRANSITIONS: 96
COLOR VARS: 0
MEASURES: 0
LOADING TIME: [User 0.000s, Sys 0.002s]


SAVING FILE /home/mcc/execution/410/model (.net / .def) ...
EXPORT TIME: [User 0.000s, Sys 0.000s]


----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2022, University of Torino, Italy.
website: https://github.com/greatspn/SOURCES

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 807
MODEL NAME: /home/mcc/execution/410/model
71 places, 96 transitions.

Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Building monolithic NSF...
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-03 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-02 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-01 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-07 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-05 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-08 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-06 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-04 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-12 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-10 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-13 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-09 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-14 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-15 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA LamportFastMutEx-COL-3-CTLFireability-2024-11 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
Ok.
EXITCODE: 0
----------------------------------------------------------------------

BK_STOP 1716523049751

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-3"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="greatspnxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool greatspnxred"
echo " Input is LamportFastMutEx-COL-3, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r223-tall-171649610900210"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-3.tgz
mv LamportFastMutEx-COL-3 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;