Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r219-smll-171649597800039.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is HirschbergSinclair-PT-05, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r219-smll-171649597800039
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 624K
-rw-r--r-- 1 mcc users 12K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 92K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.9K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 5.4K Apr 22 14:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Apr 22 14:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.4K Apr 22 14:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 21K Apr 22 14:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Apr 13 03:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 125K Apr 13 03:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.9K Apr 13 03:02 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 51K Apr 13 03:02 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 22 14:48 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:48 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 157K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-00
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-01
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-02
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-03
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-04
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-05
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-06
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-07
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-08
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-09
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-10
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-11
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-12
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-13
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-14
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1716638482854

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HirschbergSinclair-PT-05
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-25 12:01:26] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-05-25 12:01:26] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-25 12:01:26] [INFO ] Load time of PNML (sax parser for PT used): 103 ms
[2024-05-25 12:01:26] [INFO ] Transformed 124 places.
[2024-05-25 12:01:26] [INFO ] Transformed 111 transitions.
[2024-05-25 12:01:26] [INFO ] Parsed PT model containing 124 places and 111 transitions and 340 arcs in 240 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 30 ms.
Working with output stream class java.io.PrintStream
Incomplete random walk after 10000 steps, including 90 resets, run finished after 706 ms. (steps per millisecond=14 ) properties (out of 16) seen :6
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-13 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-12 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-07 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-06 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-00 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10000 steps, including 20 resets, run finished after 84 ms. (steps per millisecond=119 ) properties (out of 10) seen :1
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-01 TRUE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 26 resets, run finished after 115 ms. (steps per millisecond=86 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 23 resets, run finished after 169 ms. (steps per millisecond=59 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 26 resets, run finished after 183 ms. (steps per millisecond=54 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 29 resets, run finished after 179 ms. (steps per millisecond=55 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 26 resets, run finished after 99 ms. (steps per millisecond=101 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 26 resets, run finished after 97 ms. (steps per millisecond=103 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 26 resets, run finished after 101 ms. (steps per millisecond=99 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 27 resets, run finished after 132 ms. (steps per millisecond=75 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 26 resets, run finished after 115 ms. (steps per millisecond=86 ) properties (out of 9) seen :1
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-14 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Running SMT prover for 8 properties.
// Phase 1: matrix 111 rows 124 cols
[2024-05-25 12:01:28] [INFO ] Computed 13 invariants in 27 ms
[2024-05-25 12:01:29] [INFO ] After 354ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:8
[2024-05-25 12:01:29] [INFO ] [Nat]Absence check using 10 positive place invariants in 14 ms returned sat
[2024-05-25 12:01:29] [INFO ] [Nat]Absence check using 10 positive and 3 generalized place invariants in 3 ms returned sat
[2024-05-25 12:01:29] [INFO ] After 146ms SMT Verify possible using state equation in natural domain returned unsat :7 sat :1
[2024-05-25 12:01:29] [INFO ] Deduced a trap composed of 14 places in 134 ms of which 13 ms to minimize.
[2024-05-25 12:01:29] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 167 ms
[2024-05-25 12:01:29] [INFO ] After 324ms SMT Verify possible using trap constraints in natural domain returned unsat :7 sat :1
Attempting to minimize the solution found.
Minimization took 18 ms.
[2024-05-25 12:01:29] [INFO ] After 528ms SMT Verify possible using all constraints in natural domain returned unsat :7 sat :1
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-11 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-10 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-09 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-05 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-04 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 8 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 4 ms.
Support contains 2 out of 124 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 124/124 places, 111/111 transitions.
Graph (complete) has 236 edges and 124 vertex of which 115 are kept as prefixes of interest. Removing 9 places using SCC suffix rule.1 ms
Discarding 9 places :
Also discarding 0 output transitions
Drop transitions removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Drop transitions removed 47 transitions
Trivial Post-agglo rules discarded 47 transitions
Performed 47 trivial Post agglomeration. Transition count delta: 47
Iterating post reduction 0 with 52 rules applied. Total rules applied 53 place count 115 transition count 59
Reduce places removed 47 places and 0 transitions.
Graph (complete) has 111 edges and 68 vertex of which 51 are kept as prefixes of interest. Removing 17 places using SCC suffix rule.1 ms
Discarding 17 places :
Also discarding 0 output transitions
Iterating post reduction 1 with 48 rules applied. Total rules applied 101 place count 51 transition count 59
Drop transitions removed 17 transitions
Reduce isomorphic transitions removed 17 transitions.
Iterating post reduction 2 with 17 rules applied. Total rules applied 118 place count 51 transition count 42
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 118 place count 51 transition count 41
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 120 place count 50 transition count 41
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 3 with 1 rules applied. Total rules applied 121 place count 50 transition count 40
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 122 place count 49 transition count 40
Reduce places removed 5 places and 5 transitions.
Iterating global reduction 4 with 5 rules applied. Total rules applied 127 place count 44 transition count 35
Reduce places removed 4 places and 0 transitions.
Drop transitions removed 12 transitions
Trivial Post-agglo rules discarded 12 transitions
Performed 12 trivial Post agglomeration. Transition count delta: 12
Iterating post reduction 4 with 16 rules applied. Total rules applied 143 place count 40 transition count 23
Reduce places removed 12 places and 0 transitions.
Iterating post reduction 5 with 12 rules applied. Total rules applied 155 place count 28 transition count 23
Performed 12 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 12 Pre rules applied. Total rules applied 155 place count 28 transition count 11
Deduced a syphon composed of 12 places in 1 ms
Ensure Unique test removed 1 places
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 6 with 25 rules applied. Total rules applied 180 place count 15 transition count 11
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 6 with 1 rules applied. Total rules applied 181 place count 14 transition count 11
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 7 with 1 Pre rules applied. Total rules applied 181 place count 14 transition count 10
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 7 with 2 rules applied. Total rules applied 183 place count 13 transition count 10
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 7 with 2 rules applied. Total rules applied 185 place count 12 transition count 9
Applied a total of 185 rules in 62 ms. Remains 12 /124 variables (removed 112) and now considering 9/111 (removed 102) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 63 ms. Remains : 12/124 places, 9/111 transitions.
Finished random walk after 17 steps, including 1 resets, run visited all 1 properties in 1 ms. (steps per millisecond=17 )
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-02 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 3486 ms.
starting LoLA
BK_INPUT HirschbergSinclair-PT-05
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1716638492231

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 56 (type EXCL) for 21 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-07
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 52 (type FNDP) for 21 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type EQUN) for 21 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type SRCH) for 21 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 55 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-07
lola: result : true
lola: markings : 17
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 56 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-07
lola: result : true
lola: markings : 18
lola: fired transitions : 17
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 52 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-07 (obsolete)
lola: CANCELED task # 53 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-07 (obsolete)
lola: LAUNCH task # 66 (type EXCL) for 3 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-01
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 79 (type FNDP) for 42 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type EQUN) for 42 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type SRCH) for 42 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 52 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-07
lola: result : true
lola: fired transitions : 15
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 66 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-01
lola: result : true
lola: markings : 23
lola: fired transitions : 22
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 103 (type EXCL) for 6 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-02
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 103 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-02
lola: result : true
lola: markings : 35
lola: fired transitions : 36
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 69 (type EXCL) for 24 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-08
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 82 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-14
lola: result : true
lola: markings : 17
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 79 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-14 (obsolete)
lola: CANCELED task # 80 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-14 (obsolete)
lola: LAUNCH task # 86 (type FNDP) for 36 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 87 (type EQUN) for 36 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SRCH) for 36 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 79 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-14
lola: result : true
lola: fired transitions : 15
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 86 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-12
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 87 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-12 (obsolete)
lola: CANCELED task # 89 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-12 (obsolete)
lola: LAUNCH task # 116 (type FNDP) for 30 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-53.sara.
lola: LAUNCH task # 143 (type EQUN) for 30 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 145 (type SRCH) for 30 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-80.sara.

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 145 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-10
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 116 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 143 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-10 (obsolete)
lola: LAUNCH task # 111 (type FNDP) for 45 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type EQUN) for 45 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 150 (type SRCH) for 45 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 116 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-10
lola: result : unknown
lola: fired transitions : 4057
lola: tried executions : 2030
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-143.sara.
FINISHED task # 53 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-07
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-87.sara.


lola: FINISHED task # 150 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-15
lola: result : true
lola: markings : 71
lola: fired transitions : 70
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 111 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-15 (obsolete)
lola: CANCELED task # 122 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-15 (obsolete)
lola: LAUNCH task # 108 (type FNDP) for 9 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 114 (type EQUN) for 9 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 132 (type SRCH) for 9 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 87 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-12
lola: result : true
lola: FINISHED task # 69 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-08
lola: result : false
lola: markings : 5447
lola: fired transitions : 8017
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 128 (type EXCL) for 27 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-09
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 128 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-09
lola: result : false
lola: markings : 12
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 125 (type EXCL) for 0 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-00
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 125 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-00
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 136 (type EXCL) for 18 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-06
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 136 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-06
lola: result : true
lola: markings : 41
lola: fired transitions : 40
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 141 (type EXCL) for 33 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-11
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 111 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-15
lola: result : true
lola: fired transitions : 69
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-114.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 143 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-10
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-122.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 114 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-03
lola: result : false
lola: CANCELED task # 108 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-03 (obsolete)
lola: CANCELED task # 132 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-03 (obsolete)
lola: LAUNCH task # 92 (type FNDP) for 12 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 93 (type EQUN) for 12 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type SRCH) for 12 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 108 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-03
lola: result : unknown
lola: fired transitions : 32380
lola: tried executions : 352
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-93.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 95 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-04
lola: result : false
lola: markings : 16369
lola: fired transitions : 29276
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 92 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-04 (obsolete)
lola: CANCELED task # 93 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-04 (obsolete)
lola: LAUNCH task # 105 (type FNDP) for 15 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 109 (type EQUN) for 15 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 148 (type SRCH) for 15 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 92 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-04
lola: result : unknown
lola: fired transitions : 63550
lola: tried executions : 1017
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 93 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-04
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-109.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 148 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-05
lola: result : false
lola: markings : 24506
lola: fired transitions : 40614
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 105 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 109 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-05 (obsolete)
lola: LAUNCH task # 72 (type FNDP) for 39 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type EQUN) for 39 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SRCH) for 39 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 72 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-13
lola: result : true
lola: fired transitions : 76
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 73 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-13 (obsolete)
lola: CANCELED task # 75 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-13 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 121 (type FNDP) for 33 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 138 (type EQUN) for 33 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 140 (type SRCH) for 33 HirschbergSinclair-PT-05-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 105 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-05
lola: result : unknown
lola: fired transitions : 26932
lola: tried executions : 526
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 109 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-05
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 140 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-11
lola: result : false
lola: markings : 1369
lola: fired transitions : 1624
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 121 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-11 (obsolete)
lola: CANCELED task # 138 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-11 (obsolete)
lola: CANCELED task # 141 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-2024-11 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-00: EF true tandem / relaxed
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-01: EF true tandem / relaxed
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-02: AG false tandem / relaxed
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-03: EF false state equation
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-04: AG true tandem / insertion
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-05: EF false tandem / insertion
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-06: EF true tandem / relaxed
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-07: AG false tandem / insertion
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-08: AG true tandem / relaxed
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-09: AG true tandem / relaxed
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-10: AG true tandem / insertion
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-11: AG true tandem / insertion
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-12: AG false findpath
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-13: AG false findpath
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-14: AG false tandem / insertion
HirschbergSinclair-PT-05-ReachabilityCardinality-2024-15: EF true tandem / insertion


Time elapsed: 1 secs. Pages in use: 2
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-138.sara.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HirschbergSinclair-PT-05"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is HirschbergSinclair-PT-05, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r219-smll-171649597800039"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HirschbergSinclair-PT-05.tgz
mv HirschbergSinclair-PT-05 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;