About the Execution of LoLA for HirschbergSinclair-PT-05
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 3190.231 | 288630.00 | 290144.00 | 951.40 | TFFTTTFTFTFFFFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r203-smll-171649588200060.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is HirschbergSinclair-PT-05, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r203-smll-171649588200060
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 624K
-rw-r--r-- 1 mcc users 12K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 92K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.9K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 5.4K Apr 22 14:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Apr 22 14:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.4K Apr 22 14:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 21K Apr 22 14:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Apr 13 03:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 125K Apr 13 03:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.9K Apr 13 03:02 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 51K Apr 13 03:02 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 22 14:48 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:48 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 157K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-00
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-01
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-02
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-03
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-04
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-05
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-06
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-07
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-08
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-09
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-10
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-11
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-12
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-13
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-14
FORMULA_NAME HirschbergSinclair-PT-05-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717067105099
FORMULA HirschbergSinclair-PT-05-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-05-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-05-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-05-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-05-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-05-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-05-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-05-LTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-05-LTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-05-LTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-05-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-05-LTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-05-LTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-05-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-05-LTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-05-LTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[32mHirschbergSinclair-PT-05-LTLFireability-00: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mHirschbergSinclair-PT-05-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mHirschbergSinclair-PT-05-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mHirschbergSinclair-PT-05-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m] [1m[32mHirschbergSinclair-PT-05-LTLFireability-04: LTL true LTL model checker[0m
[[35mlola[0m] [1m[32mHirschbergSinclair-PT-05-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mHirschbergSinclair-PT-05-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mHirschbergSinclair-PT-05-LTLFireability-07: F true state space / EG[0m
[[35mlola[0m] [1m[31mHirschbergSinclair-PT-05-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mHirschbergSinclair-PT-05-LTLFireability-09: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mHirschbergSinclair-PT-05-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[31mHirschbergSinclair-PT-05-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mHirschbergSinclair-PT-05-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mHirschbergSinclair-PT-05-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mHirschbergSinclair-PT-05-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mHirschbergSinclair-PT-05-LTLFireability-15: LTL true LTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 288 secs. Pages in use: 119
BK_STOP 1717067393729
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 HirschbergSinclair-PT-05-LTLFireability-06
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 56 (type EQUN) for 21 HirschbergSinclair-PT-05-LTLFireability-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for HirschbergSinclair-PT-05-LTLFireability-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 112
[[35mlola[0m][I] fired transitions : 112
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 HirschbergSinclair-PT-05-LTLFireability-08
[[35mlola[0m][I] time limit : 225 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 25 (type EXCL) for HirschbergSinclair-PT-05-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 280
[[35mlola[0m][I] fired transitions : 280
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 HirschbergSinclair-PT-05-LTLFireability-14
[[35mlola[0m][I] time limit : 240 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for HirschbergSinclair-PT-05-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 112
[[35mlola[0m][I] fired transitions : 112
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 44 (type EXCL) for 43 HirschbergSinclair-PT-05-LTLFireability-13
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 44 (type EXCL) for HirschbergSinclair-PT-05-LTLFireability-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 112
[[35mlola[0m][I] fired transitions : 112
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 40 HirschbergSinclair-PT-05-LTLFireability-12
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 56 (type EQUN) for HirschbergSinclair-PT-05-LTLFireability-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-07: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 5/276 6/2000 HirschbergSinclair-PT-05-LTLFireability-12 760511 m, 152102 m/sec, 3547597 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-07: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 10/276 9/2000 HirschbergSinclair-PT-05-LTLFireability-12 1227785 m, 93454 m/sec, 7412616 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-07: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 LTL EXCL 15/276 11/2000 HirschbergSinclair-PT-05-LTLFireability-12 1584307 m, 71304 m/sec, 10839676 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 41 (type EXCL) for HirschbergSinclair-PT-05-LTLFireability-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1719870
[[35mlola[0m][I] fired transitions : 12266121
[[35mlola[0m][I] time used : 17
[[35mlola[0m][I] memory pages used : 12
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 37 HirschbergSinclair-PT-05-LTLFireability-11
[[35mlola[0m][I] time limit : 298 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for HirschbergSinclair-PT-05-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 113
[[35mlola[0m][I] fired transitions : 113
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 30 HirschbergSinclair-PT-05-LTLFireability-10
[[35mlola[0m][I] time limit : 325 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mHirschbergSinclair-PT-05-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HirschbergSinclair-PT-05-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 35 LTL EXCL 3/325 4/2000 HirschbergSinclair-PT-05-LTLFireability-10 476912 m, 95382 m/sec, 2107064 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 12/447 11/2000 HirschbergSinclair-PT-05-LTLFireability-04 1599187 m, 128099 m/sec, 7639318 t fired, .
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[[35mlola[0m][.] 1 LTL EXCL 33/671 23/2000 HirschbergSinclair-PT-05-LTLFireability-00 3430072 m, 73177 m/sec, 22927996 t fired, .
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[[35mlola[0m][.] 1 LTL EXCL 38/671 25/2000 HirschbergSinclair-PT-05-LTLFireability-00 3763981 m, 66781 m/sec, 26410937 t fired, .
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[[35mlola[0m][.] 1 LTL EXCL 43/671 27/2000 HirschbergSinclair-PT-05-LTLFireability-00 4086816 m, 64567 m/sec, 29931092 t fired, .
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[[35mlola[0m][I] FINISHED task # 53 (type EXCL) for HirschbergSinclair-PT-05-LTLFireability-07
[[35mlola[0m][I] result : false
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[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 71
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[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] FINISHED task # 50 (type EXCL) for HirschbergSinclair-PT-05-LTLFireability-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 286920
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[[35mlola[0m][I] time used : 2
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 HirschbergSinclair-PT-05-LTLFireability-05
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[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for HirschbergSinclair-PT-05-LTLFireability-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 218550
[[35mlola[0m][I] fired transitions : 636022
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HirschbergSinclair-PT-05"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is HirschbergSinclair-PT-05, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r203-smll-171649588200060"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/HirschbergSinclair-PT-05.tgz
mv HirschbergSinclair-PT-05 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;