About the Execution of LoLA for HexagonalGrid-PT-126
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 874.855 | 140357.00 | 141446.00 | 566.00 | TFFTTTTFTFTFFFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r203-smll-171649588100010.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is HexagonalGrid-PT-126, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r203-smll-171649588100010
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 476K
-rw-r--r-- 1 mcc users 7.1K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 75K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.8K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 62K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 22 14:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Apr 22 14:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 13 03:21 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 123K Apr 13 03:21 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Apr 13 03:17 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 60K Apr 13 03:17 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:48 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:48 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rwxr-xr-x 1 mcc users 18K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2024-00
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2024-01
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2024-02
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2024-03
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2024-04
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2024-05
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2024-06
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2024-07
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2024-08
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2024-09
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2024-10
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2024-11
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2023-12
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2023-13
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2023-14
FORMULA_NAME HexagonalGrid-PT-126-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717047275787
FORMULA HexagonalGrid-PT-126-CTLFireability-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HexagonalGrid-PT-126-CTLFireability-2023-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HexagonalGrid-PT-126-CTLFireability-2023-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HexagonalGrid-PT-126-CTLFireability-2023-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HexagonalGrid-PT-126-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HexagonalGrid-PT-126-CTLFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HexagonalGrid-PT-126-CTLFireability-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HexagonalGrid-PT-126-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HexagonalGrid-PT-126-CTLFireability-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HexagonalGrid-PT-126-CTLFireability-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HexagonalGrid-PT-126-CTLFireability-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HexagonalGrid-PT-126-CTLFireability-2023-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HexagonalGrid-PT-126-CTLFireability-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HexagonalGrid-PT-126-CTLFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HexagonalGrid-PT-126-CTLFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HexagonalGrid-PT-126-CTLFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[32mHexagonalGrid-PT-126-CTLFireability-2024-00: EFEG true state space /EFEG[0m
[[35mlola[0m] [1m[31mHexagonalGrid-PT-126-CTLFireability-2024-01: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mHexagonalGrid-PT-126-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mHexagonalGrid-PT-126-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mHexagonalGrid-PT-126-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mHexagonalGrid-PT-126-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mHexagonalGrid-PT-126-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mHexagonalGrid-PT-126-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mHexagonalGrid-PT-126-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mHexagonalGrid-PT-126-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mHexagonalGrid-PT-126-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mHexagonalGrid-PT-126-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mHexagonalGrid-PT-126-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mHexagonalGrid-PT-126-CTLFireability-2023-13: SP ACTL false LTL model checker[0m
[[35mlola[0m] [1m[31mHexagonalGrid-PT-126-CTLFireability-2023-14: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mHexagonalGrid-PT-126-CTLFireability-2023-15: CTL true CTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 141 secs. Pages in use: 11
BK_STOP 1717047416144
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 28 (type EXCL) for 27 HexagonalGrid-PT-126-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 28 (type EXCL) for HexagonalGrid-PT-126-CTLFireability-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 26
[[35mlola[0m][I] fired transitions : 26
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 HexagonalGrid-PT-126-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 52 (type EQUN) for 0 HexagonalGrid-PT-126-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 54 (type EQUN) for 0 HexagonalGrid-PT-126-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 43 (type EXCL) for HexagonalGrid-PT-126-CTLFireability-2023-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 856
[[35mlola[0m][I] fired transitions : 1400
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 HexagonalGrid-PT-126-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 54 (type EQUN) for HexagonalGrid-PT-126-CTLFireability-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 52 (type EQUN) for HexagonalGrid-PT-126-CTLFireability-2024-00
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for HexagonalGrid-PT-126-CTLFireability-2023-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 749205
[[35mlola[0m][I] fired transitions : 4777694
[[35mlola[0m][I] time used : 5
[[35mlola[0m][I] memory pages used : 4
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 HexagonalGrid-PT-126-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for HexagonalGrid-PT-126-CTLFireability-2023-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 15
[[35mlola[0m][I] fired transitions : 24
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 HexagonalGrid-PT-126-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 299 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mHexagonalGrid-PT-126-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mHexagonalGrid-PT-126-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mHexagonalGrid-PT-126-CTLFireability-2023-14: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mHexagonalGrid-PT-126-CTLFireability-2023-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] HexagonalGrid-PT-126-CTLFireability-2024-00: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] HexagonalGrid-PT-126-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HexagonalGrid-PT-126-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HexagonalGrid-PT-126-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HexagonalGrid-PT-126-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HexagonalGrid-PT-126-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HexagonalGrid-PT-126-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HexagonalGrid-PT-126-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HexagonalGrid-PT-126-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HexagonalGrid-PT-126-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HexagonalGrid-PT-126-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] HexagonalGrid-PT-126-CTLFireability-2023-13: SP ACTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 0/299 1/2000 HexagonalGrid-PT-126-CTLFireability-2024-11 36849 m, 7369 m/sec, 114745 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 34 (type EXCL) for HexagonalGrid-PT-126-CTLFireability-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 307268
[[35mlola[0m][I] fired transitions : 1079450
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 HexagonalGrid-PT-126-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 326 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 25 (type EXCL) for HexagonalGrid-PT-126-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 194
[[35mlola[0m][I] fired transitions : 804
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 HexagonalGrid-PT-126-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for HexagonalGrid-PT-126-CTLFireability-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 96
[[35mlola[0m][I] fired transitions : 103
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 HexagonalGrid-PT-126-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for HexagonalGrid-PT-126-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 305539
[[35mlola[0m][I] fired transitions : 1183040
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 HexagonalGrid-PT-126-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 449 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for HexagonalGrid-PT-126-CTLFireability-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 129
[[35mlola[0m][I] fired transitions : 149
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 HexagonalGrid-PT-126-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 513 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for HexagonalGrid-PT-126-CTLFireability-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 548
[[35mlola[0m][I] fired transitions : 704
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 0 HexagonalGrid-PT-126-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 598 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 49 (type EXCL) for HexagonalGrid-PT-126-CTLFireability-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 47
[[35mlola[0m][I] fired transitions : 47
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 39 HexagonalGrid-PT-126-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 718 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for HexagonalGrid-PT-126-CTLFireability-2023-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 100
[[35mlola[0m][I] fired transitions : 100
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 HexagonalGrid-PT-126-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 898 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for HexagonalGrid-PT-126-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 44
[[35mlola[0m][I] fired transitions : 125
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 HexagonalGrid-PT-126-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 1197 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mHexagonalGrid-PT-126-CTLFireability-2024-00: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[31mHexagonalGrid-PT-126-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mHexagonalGrid-PT-126-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mHexagonalGrid-PT-126-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mHexagonalGrid-PT-126-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mHexagonalGrid-PT-126-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mHexagonalGrid-PT-126-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mHexagonalGrid-PT-126-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mHexagonalGrid-PT-126-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mHexagonalGrid-PT-126-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mHexagonalGrid-PT-126-CTLFireability-2023-13: SP ACTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mHexagonalGrid-PT-126-CTLFireability-2023-14: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mHexagonalGrid-PT-126-CTLFireability-2023-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] HexagonalGrid-PT-126-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] HexagonalGrid-PT-126-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] HexagonalGrid-PT-126-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 16 CTL EXCL 3/1197 2/2000 HexagonalGrid-PT-126-CTLFireability-2024-05 434320 m, 86864 m/sec, 2208119 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 8/1197 5/2000 HexagonalGrid-PT-126-CTLFireability-2024-05 1132056 m, 139547 m/sec, 7009079 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 13/1197 8/2000 HexagonalGrid-PT-126-CTLFireability-2024-05 1716015 m, 116791 m/sec, 11840498 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 18/1197 9/2000 HexagonalGrid-PT-126-CTLFireability-2024-05 2067979 m, 70392 m/sec, 17014248 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 23/1197 9/2000 HexagonalGrid-PT-126-CTLFireability-2024-05 2137470 m, 13898 m/sec, 21966797 t fired, .
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[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 HexagonalGrid-PT-126-CTLFireability-2024-10
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[[35mlola[0m][.] 31 CTL EXCL 2/1783 2/2000 HexagonalGrid-PT-126-CTLFireability-2024-10 371761 m, 74352 m/sec, 1204372 t fired, .
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[[35mlola[0m][.] 31 CTL EXCL 7/1783 5/2000 HexagonalGrid-PT-126-CTLFireability-2024-10 1066184 m, 138884 m/sec, 4558513 t fired, .
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[[35mlola[0m][.] 31 CTL EXCL 12/1783 7/2000 HexagonalGrid-PT-126-CTLFireability-2024-10 1588058 m, 104374 m/sec, 7929929 t fired, .
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[[35mlola[0m][.] 31 CTL EXCL 17/1783 9/2000 HexagonalGrid-PT-126-CTLFireability-2024-10 1994359 m, 81260 m/sec, 11324020 t fired, .
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[[35mlola[0m][.] 31 CTL EXCL 22/1783 10/2000 HexagonalGrid-PT-126-CTLFireability-2024-10 2313964 m, 63921 m/sec, 14751219 t fired, .
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[[35mlola[0m][.] 31 CTL EXCL 27/1783 11/2000 HexagonalGrid-PT-126-CTLFireability-2024-10 2554970 m, 48201 m/sec, 18260506 t fired, .
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[[35mlola[0m][.] 31 CTL EXCL 32/1783 11/2000 HexagonalGrid-PT-126-CTLFireability-2024-10 2651415 m, 19289 m/sec, 22206761 t fired, .
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[[35mlola[0m][.] 31 CTL EXCL 37/1783 11/2000 HexagonalGrid-PT-126-CTLFireability-2024-10 2657246 m, 1166 m/sec, 26049618 t fired, .
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[[35mlola[0m][.] 31 CTL EXCL 42/1783 11/2000 HexagonalGrid-PT-126-CTLFireability-2024-10 2660521 m, 655 m/sec, 29831818 t fired, .
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[[35mlola[0m][.] 31 CTL EXCL 47/1783 11/2000 HexagonalGrid-PT-126-CTLFireability-2024-10 2662628 m, 421 m/sec, 33662125 t fired, .
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[[35mlola[0m][.] 31 CTL EXCL 52/1783 11/2000 HexagonalGrid-PT-126-CTLFireability-2024-10 2663975 m, 269 m/sec, 37661338 t fired, .
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[[35mlola[0m][I] result : true
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[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 HexagonalGrid-PT-126-CTLFireability-2024-01
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[[35mlola[0m][.] 4 CTL EXCL 3/3512 3/2000 HexagonalGrid-PT-126-CTLFireability-2024-01 516699 m, 103339 m/sec, 2301312 t fired, .
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[[35mlola[0m][.] 4 CTL EXCL 8/3512 5/2000 HexagonalGrid-PT-126-CTLFireability-2024-01 1120445 m, 120749 m/sec, 6406659 t fired, .
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[[35mlola[0m][.] 4 CTL EXCL 13/3512 7/2000 HexagonalGrid-PT-126-CTLFireability-2024-01 1591661 m, 94243 m/sec, 10651614 t fired, .
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[[35mlola[0m][.] 4 CTL EXCL 18/3512 9/2000 HexagonalGrid-PT-126-CTLFireability-2024-01 1982375 m, 78142 m/sec, 15016904 t fired, .
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[[35mlola[0m][.] 4 CTL EXCL 23/3512 10/2000 HexagonalGrid-PT-126-CTLFireability-2024-01 2291206 m, 61766 m/sec, 19433019 t fired, .
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[[35mlola[0m][.] 4 CTL EXCL 28/3512 11/2000 HexagonalGrid-PT-126-CTLFireability-2024-01 2530778 m, 47914 m/sec, 23998064 t fired, .
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[[35mlola[0m][.] 4 CTL EXCL 33/3512 11/2000 HexagonalGrid-PT-126-CTLFireability-2024-01 2599724 m, 13789 m/sec, 28758750 t fired, .
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[[35mlola[0m][.] 4 CTL EXCL 38/3512 11/2000 HexagonalGrid-PT-126-CTLFireability-2024-01 2619021 m, 3859 m/sec, 33087057 t fired, .
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[[35mlola[0m][.] 4 CTL EXCL 43/3512 11/2000 HexagonalGrid-PT-126-CTLFireability-2024-01 2635578 m, 3311 m/sec, 37479978 t fired, .
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[[35mlola[0m][.] 4 CTL EXCL 48/3512 11/2000 HexagonalGrid-PT-126-CTLFireability-2024-01 2650964 m, 3077 m/sec, 41876448 t fired, .
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[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HexagonalGrid-PT-126"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is HexagonalGrid-PT-126, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r203-smll-171649588100010"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/HexagonalGrid-PT-126.tgz
mv HexagonalGrid-PT-126 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;