About the Execution of LoLA for GPPP-PT-C0100N0000010000
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16206.968 | 446427.00 | 430525.00 | 1803.80 | F????????F???F?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r181-tall-171640605200428.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is GPPP-PT-C0100N0000010000, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r181-tall-171640605200428
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 464K
-rw-r--r-- 1 mcc users 7.4K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 78K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K May 19 07:10 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K May 19 15:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 19 07:18 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 19 18:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 12 08:59 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 114K Apr 12 08:59 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.4K Apr 12 08:58 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 53K Apr 12 08:58 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:46 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:46 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 17 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 1 May 18 16:42 large_marking
-rw-r--r-- 1 mcc users 21K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-00
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-01
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-02
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-03
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-04
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-05
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-06
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-07
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-08
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-09
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-10
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-11
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-12
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-13
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-14
FORMULA_NAME GPPP-PT-C0100N0000010000-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717058402261
FORMULA GPPP-PT-C0100N0000010000-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GPPP-PT-C0100N0000010000-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GPPP-PT-C0100N0000010000-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717058848688
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 GPPP-PT-C0100N0000010000-LTLFireability-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for GPPP-PT-C0100N0000010000-LTLFireability-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 36 (type EXCL) for 35 GPPP-PT-C0100N0000010000-LTLFireability-09
[[35mlola[0m][I] time limit : 171 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 36 (type EXCL) for GPPP-PT-C0100N0000010000-LTLFireability-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 406
[[35mlola[0m][I] fired transitions : 406
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 GPPP-PT-C0100N0000010000-LTLFireability-01
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 61 (type FNDP) for 47 GPPP-PT-C0100N0000010000-LTLFireability-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 62 (type EQUN) for 47 GPPP-PT-C0100N0000010000-LTLFireability-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 64 (type EQUN) for 9 GPPP-PT-C0100N0000010000-LTLFireability-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 61 (type FNDP) for GPPP-PT-C0100N0000010000-LTLFireability-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 62 (type EQUN) for GPPP-PT-C0100N0000010000-LTLFireability-13 (obsolete)
[[35mlola[0m][I] FINISHED task # 64 (type EQUN) for GPPP-PT-C0100N0000010000-LTLFireability-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 62 (type EQUN) for GPPP-PT-C0100N0000010000-LTLFireability-13
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 5/240 17/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 2473579 m, 494715 m/sec, 6065267 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 10/240 31/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 4601969 m, 425678 m/sec, 11572087 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 15/240 44/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 6593578 m, 398321 m/sec, 16838743 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 20/240 56/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 8520862 m, 385456 m/sec, 21987316 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 25/240 69/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 10429237 m, 381675 m/sec, 27096792 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 69
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 30/240 81/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 12298133 m, 373779 m/sec, 32083356 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 81
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 35/240 92/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 14086825 m, 357738 m/sec, 36857917 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 40/240 103/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 15678577 m, 318350 m/sec, 41275934 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 103
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 45/240 115/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 17540707 m, 372426 m/sec, 46235797 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 115
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 50/240 126/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 19247025 m, 341263 m/sec, 50820305 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 126
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 55/240 137/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 20948381 m, 340271 m/sec, 55499503 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 137
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 60/240 149/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 22736440 m, 357611 m/sec, 60305935 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 149
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 65/240 160/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 24406396 m, 333991 m/sec, 64922228 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 160
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 70/240 171/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 26098949 m, 338510 m/sec, 69466982 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 171
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 75/240 182/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 27876948 m, 355599 m/sec, 74366725 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 182
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 80/240 192/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 29396306 m, 303871 m/sec, 78634895 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 85/240 204/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 31249324 m, 370603 m/sec, 83543710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 204
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 90/240 214/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 32794041 m, 308943 m/sec, 87878995 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 95/240 225/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 34447607 m, 330713 m/sec, 92305079 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 225
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 100/240 236/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 36144979 m, 339474 m/sec, 96972177 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 236
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 105/240 246/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 37639745 m, 298953 m/sec, 101172863 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 246
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 110/240 256/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 39279233 m, 327897 m/sec, 105564216 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 256
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 115/240 267/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 40951979 m, 334549 m/sec, 110175661 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 267
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 120/240 277/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 42439486 m, 297501 m/sec, 114354669 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 277
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 125/240 286/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 43907969 m, 293696 m/sec, 118436191 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 130/240 298/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 45728059 m, 364018 m/sec, 123284529 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 298
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 135/240 308/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 47231180 m, 300624 m/sec, 127486037 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 308
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 140/240 317/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 48673235 m, 288411 m/sec, 131544202 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 317
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 145/240 328/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 50370211 m, 339395 m/sec, 136068457 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 328
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 150/240 339/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 51984710 m, 322899 m/sec, 140547865 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 339
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 155/240 349/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 53481786 m, 299415 m/sec, 144738044 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 349
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 160/240 358/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 54885994 m, 280841 m/sec, 148718494 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 358
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 165/240 369/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 56644841 m, 351769 m/sec, 153360481 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 369
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 170/240 380/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 58257080 m, 322447 m/sec, 157835691 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 380
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 175/240 389/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 59709665 m, 290517 m/sec, 161928118 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 389
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 180/240 398/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 61139903 m, 286047 m/sec, 165954678 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 398
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 185/240 409/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 62743977 m, 320814 m/sec, 170237858 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 409
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 190/240 420/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 64400947 m, 331394 m/sec, 174810877 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 190 secs. Pages in use: 420
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 195/240 429/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 65876710 m, 295152 m/sec, 178954181 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 195 secs. Pages in use: 429
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 200/240 438/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 67295077 m, 283673 m/sec, 182949216 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 200 secs. Pages in use: 438
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 205/240 447/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 68682339 m, 277452 m/sec, 186865448 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 205 secs. Pages in use: 447
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 210/240 459/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 70460564 m, 355645 m/sec, 191545891 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 210 secs. Pages in use: 459
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 215/240 469/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 71998047 m, 307496 m/sec, 195839675 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 215 secs. Pages in use: 469
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 220/240 478/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 73433828 m, 287156 m/sec, 199882183 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 220 secs. Pages in use: 478
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 225/240 487/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 74830102 m, 279254 m/sec, 203811113 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 225 secs. Pages in use: 487
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 230/240 496/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 76211624 m, 276304 m/sec, 207724388 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 230 secs. Pages in use: 496
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 235/240 508/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 78003665 m, 358408 m/sec, 212445817 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 235 secs. Pages in use: 508
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 240/240 518/2000 GPPP-PT-C0100N0000010000-LTLFireability-01 79568615 m, 312990 m/sec, 216817743 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 240 secs. Pages in use: 518
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 4 (type EXCL) for GPPP-PT-C0100N0000010000-LTLFireability-01 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 245 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 54 (type EXCL) for 53 GPPP-PT-C0100N0000010000-LTLFireability-15
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 GPPP-PT-C0100N0000010000-LTLFireability-01
[[35mlola[0m][I] time limit : 3355 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 54 (type EXCL) for GPPP-PT-C0100N0000010000-LTLFireability-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 406
[[35mlola[0m][I] fired transitions : 406
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] CANCELED task # 4 (type EXCL) for GPPP-PT-C0100N0000010000-LTLFireability-01 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 250 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 GPPP-PT-C0100N0000010000-LTLFireability-14
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 51 (type EXCL) for GPPP-PT-C0100N0000010000-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4862
[[35mlola[0m][I] fired transitions : 5890
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 45 (type EXCL) for 44 GPPP-PT-C0100N0000010000-LTLFireability-12
[[35mlola[0m][I] time limit : 279 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 45 (type EXCL) for GPPP-PT-C0100N0000010000-LTLFireability-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 41 GPPP-PT-C0100N0000010000-LTLFireability-11
[[35mlola[0m][I] time limit : 304 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 42 (type EXCL) for GPPP-PT-C0100N0000010000-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 406
[[35mlola[0m][I] fired transitions : 406
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 38 GPPP-PT-C0100N0000010000-LTLFireability-10
[[35mlola[0m][I] time limit : 335 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 39 (type EXCL) for GPPP-PT-C0100N0000010000-LTLFireability-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 33 (type EXCL) for 32 GPPP-PT-C0100N0000010000-LTLFireability-08
[[35mlola[0m][I] time limit : 372 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 33 (type EXCL) for GPPP-PT-C0100N0000010000-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4847
[[35mlola[0m][I] fired transitions : 5868
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 GPPP-PT-C0100N0000010000-LTLFireability-06
[[35mlola[0m][I] time limit : 418 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for GPPP-PT-C0100N0000010000-LTLFireability-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 406
[[35mlola[0m][I] fired transitions : 406
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 GPPP-PT-C0100N0000010000-LTLFireability-05
[[35mlola[0m][I] time limit : 478 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 5/478 17/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 2477528 m, 495505 m/sec, 6702305 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 255 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 10/478 30/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 4489207 m, 402335 m/sec, 12614440 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 260 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 15/478 43/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 6504460 m, 403050 m/sec, 18510060 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 265 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 20/478 55/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 8353569 m, 369821 m/sec, 24071498 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 270 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 25/478 66/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 10058332 m, 340952 m/sec, 29400259 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 275 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 30/478 78/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 11917104 m, 371754 m/sec, 34927318 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 280 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 35/478 90/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 13705316 m, 357642 m/sec, 40293828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 285 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 40/478 100/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 15321464 m, 323229 m/sec, 45380349 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 290 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 45/478 112/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 17140129 m, 363733 m/sec, 50790360 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 295 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 50/478 123/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 18739920 m, 319958 m/sec, 55823952 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 300 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 55/478 134/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 20440039 m, 340023 m/sec, 60946185 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 305 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 60/478 144/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 22061135 m, 324219 m/sec, 66038586 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 310 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 65/478 154/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 23543012 m, 296375 m/sec, 70788299 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 315 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 70/478 166/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 25410967 m, 373591 m/sec, 76295880 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 320 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 75/478 176/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 26939996 m, 305805 m/sec, 81158742 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 325 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 80/478 186/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 28448827 m, 301766 m/sec, 85890240 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 85/478 197/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 30253680 m, 360970 m/sec, 91349065 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 90/478 207/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 31753307 m, 299925 m/sec, 96128822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 95/478 217/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 33201240 m, 289586 m/sec, 100763824 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 100/478 229/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 35072829 m, 374317 m/sec, 106275926 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 105/478 239/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 36615870 m, 308608 m/sec, 111196272 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 110/478 248/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 38092432 m, 295312 m/sec, 115914534 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 115/478 258/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 39581382 m, 297790 m/sec, 120536193 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 120/478 270/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 41397343 m, 363192 m/sec, 126036977 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 125/478 280/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 42901554 m, 300842 m/sec, 130849065 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 130/478 289/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 44315016 m, 282692 m/sec, 135403503 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 135/478 298/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 45765686 m, 290134 m/sec, 139969773 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 140/478 310/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 47592799 m, 365422 m/sec, 145415894 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 145/478 320/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 49083848 m, 298209 m/sec, 150164286 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 150/478 329/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 50513661 m, 285962 m/sec, 154740031 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 155/478 338/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 51880069 m, 273281 m/sec, 159168597 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 160/478 349/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 53521382 m, 328262 m/sec, 164052956 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 165/478 359/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 55175625 m, 330848 m/sec, 169240863 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 170/478 369/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 56629094 m, 290693 m/sec, 173863017 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 420 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 175/478 378/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 58029467 m, 280074 m/sec, 178368621 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 425 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000010000-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-13: AG false findpath[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000010000-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-01: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000010000-LTLFireability-07: CONJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 LTL EXCL 192/478 379/2000 GPPP-PT-C0100N0000010000-LTLFireability-05 58227969 m, 39700 m/sec, 179025797 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 445 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 407 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GPPP-PT-C0100N0000010000"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is GPPP-PT-C0100N0000010000, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r181-tall-171640605200428"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/GPPP-PT-C0100N0000010000.tgz
mv GPPP-PT-C0100N0000010000 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;