About the Execution of LoLA for GPPP-PT-C0100N0000000100
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16208.000 | 1562899.00 | 1571504.00 | 4330.30 | ??F????????????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r181-tall-171640605200410.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is GPPP-PT-C0100N0000000100, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r181-tall-171640605200410
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 556K
-rw-r--r-- 1 mcc users 6.9K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 32K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K May 19 07:10 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K May 19 15:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 22 14:46 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:46 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Apr 12 09:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 186K Apr 12 09:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 12 09:09 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 89K Apr 12 09:09 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:46 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:46 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 17 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 1 May 18 16:42 large_marking
-rw-r--r-- 1 mcc users 21K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2024-00
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2024-01
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2024-02
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2024-03
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2024-04
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2024-05
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2024-06
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2024-07
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2024-08
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2024-09
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2024-10
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2024-11
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2023-12
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2023-13
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2023-14
FORMULA_NAME GPPP-PT-C0100N0000000100-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717056881177
FORMULA GPPP-PT-C0100N0000000100-CTLFireability-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717058444076
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 GPPP-PT-C0100N0000000100-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 120 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 7 (type CNST) for 6 GPPP-PT-C0100N0000000100-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 7 (type CNST) for GPPP-PT-C0100N0000000100-CTLFireability-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 64 (type FNDP) for 40 GPPP-PT-C0100N0000000100-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 65 (type EQUN) for 40 GPPP-PT-C0100N0000000100-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 64 (type FNDP) for GPPP-PT-C0100N0000000100-CTLFireability-2023-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 65 (type EQUN) for GPPP-PT-C0100N0000000100-CTLFireability-2023-12 (obsolete)
[[35mlola[0m][I] LAUNCH task # 72 (type EQUN) for 31 GPPP-PT-C0100N0000000100-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 80 (type EQUN) for 61 GPPP-PT-C0100N0000000100-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 65 (type EQUN) for GPPP-PT-C0100N0000000100-CTLFireability-2023-12
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 80 (type EQUN) for GPPP-PT-C0100N0000000100-CTLFireability-2023-15
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 72 (type EQUN) for GPPP-PT-C0100N0000000100-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000000100-CTLFireability-2024-02: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 CTL EXCL 5/211 6/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 1381397 m, 276279 m/sec, 8538517 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 CTL EXCL 10/211 12/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 2709091 m, 265538 m/sec, 16987037 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 CTL EXCL 15/211 17/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 3985071 m, 255196 m/sec, 25105571 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 CTL EXCL 20/211 23/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 5281006 m, 259187 m/sec, 33352010 t fired, .
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[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 CTL EXCL 25/211 28/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 6568172 m, 257433 m/sec, 41538352 t fired, .
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[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ 0 2 0 0 2 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 30/211 33/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 7813109 m, 248987 m/sec, 49442733 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 35/211 39/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 9064444 m, 250267 m/sec, 57400731 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 40/211 44/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 10291541 m, 245419 m/sec, 65229045 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 45/211 49/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 11507382 m, 243168 m/sec, 72960114 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 50/211 54/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 12725305 m, 243584 m/sec, 80693414 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 75/211 79/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 18730959 m, 240199 m/sec, 118916819 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 80/211 84/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 19917808 m, 237369 m/sec, 126452255 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 85/211 89/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 21098253 m, 236089 m/sec, 133989925 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 90/211 94/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 22270380 m, 234425 m/sec, 141406777 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 95/211 99/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 23426856 m, 231295 m/sec, 148804344 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 100/211 104/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 24594946 m, 233618 m/sec, 156195891 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 115/211 119/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 28103302 m, 230095 m/sec, 178556169 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 120/211 123/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 29272817 m, 233903 m/sec, 185966354 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 125/211 128/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 30416593 m, 228755 m/sec, 193277880 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 130/211 133/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 31576609 m, 232003 m/sec, 200612620 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 135/211 138/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 32708315 m, 226341 m/sec, 207837141 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 160/211 162/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 38509602 m, 230289 m/sec, 244734976 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 165/211 167/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 39654293 m, 228938 m/sec, 252023265 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 170/211 172/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 40777610 m, 224663 m/sec, 259187906 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 175/211 177/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 41942704 m, 233018 m/sec, 266567585 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 23 CTL EXCL 180/211 181/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 43074913 m, 226441 m/sec, 273797999 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 185/211 186/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 44201246 m, 225266 m/sec, 280943740 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 CTL EXCL 205/211 205/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 48668763 m, 220374 m/sec, 309359839 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 CTL EXCL 210/211 210/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-06 49795165 m, 225280 m/sec, 316548930 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 GPPP-PT-C0100N0000000100-CTLFireability-2024-06
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[[35mlola[0m][I] FINISHED task # 59 (type EXCL) for GPPP-PT-C0100N0000000100-CTLFireability-2023-14
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[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000000100-CTLFireability-2024-02: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL true CTL model checker[0m
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ 0 1 0 0 5 0 0 4
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][I] LAUNCH task # 56 (type EXCL) for 51 GPPP-PT-C0100N0000000100-CTLFireability-2023-13
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[[35mlola[0m][I] FINISHED task # 56 (type EXCL) for GPPP-PT-C0100N0000000100-CTLFireability-2023-13
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[[35mlola[0m][I] FINISHED task # 54 (type EXCL) for GPPP-PT-C0100N0000000100-CTLFireability-2023-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 405
[[35mlola[0m][I] fired transitions : 406
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 40 GPPP-PT-C0100N0000000100-CTLFireability-2023-12
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[[35mlola[0m][I] FINISHED task # 49 (type EXCL) for GPPP-PT-C0100N0000000100-CTLFireability-2023-12
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[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 GPPP-PT-C0100N0000000100-CTLFireability-2024-10
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[[35mlola[0m][I] FINISHED task # 35 (type EXCL) for GPPP-PT-C0100N0000000100-CTLFireability-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 404
[[35mlola[0m][I] fired transitions : 808
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 GPPP-PT-C0100N0000000100-CTLFireability-2024-08
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[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000000100-CTLFireability-2024-02: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ true CONJ[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ true CONJ[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL true CTL model checker[0m
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 5/307 4/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 833018 m, 166603 m/sec, 8285596 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 10/307 7/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 1611908 m, 155778 m/sec, 16367823 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 15/307 11/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 2390990 m, 155816 m/sec, 24402804 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 20/307 14/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 3150112 m, 151824 m/sec, 32232361 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 25/307 17/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 3890595 m, 148096 m/sec, 39920740 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 30/307 20/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 4646532 m, 151187 m/sec, 47703637 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 35/307 23/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 5387113 m, 148116 m/sec, 55354101 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 40/307 26/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 6110775 m, 144732 m/sec, 62851020 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 45/307 29/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 6846169 m, 147078 m/sec, 70433275 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 50/307 32/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 7560932 m, 142952 m/sec, 77843498 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 55/307 35/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 8281023 m, 144018 m/sec, 85264187 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 60/307 38/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 8994160 m, 142627 m/sec, 92665453 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 65/307 41/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 9725032 m, 146174 m/sec, 100189292 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 70/307 44/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 10434506 m, 141894 m/sec, 107555910 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 75/307 47/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 11156614 m, 144421 m/sec, 114981710 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 80/307 50/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 11850425 m, 138762 m/sec, 122190851 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 85/307 53/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 12576241 m, 145163 m/sec, 129654813 t fired, .
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[[35mlola[0m][.] 29 CTL EXCL 90/307 56/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 13287875 m, 142326 m/sec, 137046294 t fired, .
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[[35mlola[0m][.] 29 CTL EXCL 95/307 59/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 14027285 m, 147882 m/sec, 144660055 t fired, .
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[[35mlola[0m][.] 29 CTL EXCL 100/307 62/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 14748051 m, 144153 m/sec, 152107601 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 105/307 65/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 15464363 m, 143262 m/sec, 159519017 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 110/307 68/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 16181861 m, 143499 m/sec, 166923349 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 115/307 71/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 16888741 m, 141376 m/sec, 174244790 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 120/307 74/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 17587510 m, 139753 m/sec, 181455403 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 125/307 77/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 18310973 m, 144692 m/sec, 188945188 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 130/307 80/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 19031959 m, 144197 m/sec, 196382752 t fired, .
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[[35mlola[0m][.] 29 CTL EXCL 140/307 86/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 20458790 m, 143656 m/sec, 211133705 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 145/307 89/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 21167099 m, 141661 m/sec, 218471242 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 150/307 92/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 21874114 m, 141403 m/sec, 225757519 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 155/307 95/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 22578282 m, 140833 m/sec, 233052636 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 160/307 98/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 23287313 m, 141806 m/sec, 240363891 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 165/307 101/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 23987217 m, 139980 m/sec, 247605058 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 170/307 104/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 24680286 m, 138613 m/sec, 254775964 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 175/307 107/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 25384032 m, 140749 m/sec, 262033496 t fired, .
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[[35mlola[0m][.] 29 CTL EXCL 180/307 110/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 26069913 m, 137176 m/sec, 269160011 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 185/307 113/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 26764480 m, 138913 m/sec, 276305198 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 190/307 116/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 27474804 m, 142064 m/sec, 283674075 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 195/307 119/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 28185550 m, 142149 m/sec, 290993903 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 200/307 122/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 28874485 m, 137787 m/sec, 298135444 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 205/307 125/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 29579807 m, 141064 m/sec, 305398706 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 210/307 128/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 30270304 m, 138099 m/sec, 312560953 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 215/307 131/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 30962958 m, 138530 m/sec, 319698616 t fired, .
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[[35mlola[0m][.] 29 CTL EXCL 220/307 133/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 31659459 m, 139300 m/sec, 326902372 t fired, .
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[[35mlola[0m][.] 29 CTL EXCL 225/307 136/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 32351467 m, 138401 m/sec, 334075952 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 230/307 139/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 33048241 m, 139354 m/sec, 341251290 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 235/307 142/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 33728762 m, 136104 m/sec, 348310428 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 240/307 145/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 34424590 m, 139165 m/sec, 355471898 t fired, .
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[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL false CTL model checker[0m
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 245/307 148/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 35103141 m, 135710 m/sec, 362511109 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 250/307 151/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 35774757 m, 134323 m/sec, 369443288 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 255/307 154/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 36475320 m, 140112 m/sec, 376670123 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 260/307 157/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 37160493 m, 137034 m/sec, 383789297 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 265/307 159/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 37855505 m, 139002 m/sec, 390940068 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 270/307 162/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 38544752 m, 137849 m/sec, 398086114 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 275/307 165/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 39227376 m, 136524 m/sec, 405121097 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 280/307 168/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 39901016 m, 134728 m/sec, 412083931 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 285/307 171/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 40575254 m, 134847 m/sec, 419084213 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 290/307 174/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 41270384 m, 139026 m/sec, 426234860 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 295/307 177/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 41952896 m, 136502 m/sec, 433309542 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 29 CTL EXCL 300/307 180/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 42628004 m, 135021 m/sec, 440264146 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 5/307 6/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 1414500 m, 282900 m/sec, 8995869 t fired, .
[[35mlola[0m][.] 29 CTL EXCL 5/3070 4/5 GPPP-PT-C0100N0000000100-CTLFireability-2024-08 841018 m, -8493839 m/sec, 8366015 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 10/307 12/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 2732099 m, 263519 m/sec, 17650277 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 15/307 17/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 4015671 m, 256714 m/sec, 26050305 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 20/307 23/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 5289340 m, 254733 m/sec, 34374767 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 25/307 28/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 6540857 m, 250303 m/sec, 42558918 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 30/307 33/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 7772376 m, 246303 m/sec, 50631244 t fired, .
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[[35mlola[0m][.] 26 CTL EXCL 35/307 38/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 9003475 m, 246219 m/sec, 58721535 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 45/307 48/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 11421740 m, 240146 m/sec, 74545393 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 50/307 53/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 12617298 m, 239111 m/sec, 82411470 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 55/307 58/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 13811477 m, 238835 m/sec, 90199455 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 60/307 63/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 14990193 m, 235743 m/sec, 97931789 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 65/307 68/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 16164561 m, 234873 m/sec, 105642941 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 70/307 73/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 17370253 m, 241138 m/sec, 113519330 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 75/307 78/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 18550335 m, 236016 m/sec, 121293478 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 80/307 83/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 19729462 m, 235825 m/sec, 128968201 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 85/307 88/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 20872541 m, 228615 m/sec, 136510303 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 90/307 93/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 22020953 m, 229682 m/sec, 143986912 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 95/307 98/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 23154318 m, 226673 m/sec, 151444177 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 100/307 102/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 24274273 m, 223991 m/sec, 158770387 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 105/307 107/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 25436278 m, 232401 m/sec, 166358774 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 110/307 112/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 26564085 m, 225561 m/sec, 173801157 t fired, .
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[[35mlola[0m][.] 26 CTL EXCL 115/307 117/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 27702241 m, 227631 m/sec, 181209758 t fired, .
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[[35mlola[0m][.] 26 CTL EXCL 120/307 122/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 28824427 m, 224437 m/sec, 188573676 t fired, .
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[[35mlola[0m][.] 26 CTL EXCL 125/307 126/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 29946931 m, 224500 m/sec, 195948543 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 130/307 131/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 31068762 m, 224366 m/sec, 203266513 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 135/307 136/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 32175006 m, 221248 m/sec, 210515639 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 140/307 140/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 33297940 m, 224586 m/sec, 217918769 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 145/307 145/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 34439909 m, 228393 m/sec, 225357881 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 150/307 150/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 35561951 m, 224408 m/sec, 232732074 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 155/307 154/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 36673000 m, 222209 m/sec, 240012507 t fired, .
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[[35mlola[0m][.] 26 CTL EXCL 165/307 164/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 38916994 m, 221493 m/sec, 254708382 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 170/307 169/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 40021743 m, 220949 m/sec, 261971838 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 175/307 173/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 41131566 m, 221964 m/sec, 269195850 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 180/307 178/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 42249719 m, 223630 m/sec, 276517012 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 185/307 183/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 43343144 m, 218685 m/sec, 283734687 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 190/307 187/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 44435830 m, 218537 m/sec, 290867713 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 195/307 192/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 45530759 m, 218985 m/sec, 298018325 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 200/307 196/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 46622612 m, 218370 m/sec, 305168961 t fired, .
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[[35mlola[0m][.] 26 CTL EXCL 205/307 201/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 47700227 m, 215523 m/sec, 312240719 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 210/307 205/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 48765962 m, 213147 m/sec, 319255432 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 215/307 210/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 49876559 m, 222119 m/sec, 326511753 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 220/307 215/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 51011660 m, 227020 m/sec, 333936109 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 225/307 220/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 52180745 m, 233817 m/sec, 342309879 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 230/307 224/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 53307007 m, 225252 m/sec, 350339089 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 235/307 229/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 54412835 m, 221165 m/sec, 358251314 t fired, .
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[[35mlola[0m][.] 26 CTL EXCL 240/307 234/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 55504494 m, 218331 m/sec, 366069216 t fired, .
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[[35mlola[0m][.] 26 CTL EXCL 250/307 243/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 57642946 m, 212501 m/sec, 381374649 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 255/307 247/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 58704664 m, 212343 m/sec, 388974773 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 260/307 251/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 59746019 m, 208271 m/sec, 396435781 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 265/307 256/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 60779802 m, 206756 m/sec, 403861777 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 270/307 260/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 61815406 m, 207120 m/sec, 411250716 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 275/307 264/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 62839660 m, 204850 m/sec, 418580872 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 280/307 269/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 63862254 m, 204518 m/sec, 425928111 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 285/307 273/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 64904059 m, 208361 m/sec, 433363466 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 290/307 277/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 65929475 m, 205083 m/sec, 440700118 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 295/307 282/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 66946665 m, 203438 m/sec, 448007736 t fired, .
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[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ true CONJ[0m
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 26 CTL EXCL 300/307 286/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 67963448 m, 203356 m/sec, 455254715 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 305/307 290/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-07 69001427 m, 207595 m/sec, 462694367 t fired, .
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[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000000100-CTLFireability-2024-02: INITIAL false preprocessing[0m
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[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL true CTL model checker[0m
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 2 0 0 2 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 GPPP-PT-C0100N0000000100-CTLFireability-2024-07
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[[35mlola[0m][I] FINISHED task # 20 (type EXCL) for GPPP-PT-C0100N0000000100-CTLFireability-2024-05
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[[35mlola[0m][I] CANCELED task # 26 (type EXCL) for GPPP-PT-C0100N0000000100-CTLFireability-2024-07 (memory limit exceeded)
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[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000000100-CTLFireability-2024-02: INITIAL false preprocessing[0m
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000000100-CTLFireability-2024-02: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000000100-CTLFireability-2023-12: CONJ true CONJ[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000000100-CTLFireability-2023-13: CONJ true CONJ[0m
[[35mlola[0m][.] [1m[32mGPPP-PT-C0100N0000000100-CTLFireability-2023-14: CTL true CTL model checker[0m
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 5/344 5/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 1097101 m, 219420 m/sec, 8661352 t fired, .
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[[35mlola[0m][.] [1m[31mGPPP-PT-C0100N0000000100-CTLFireability-2024-10: CTL false CTL model checker[0m
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 10/344 9/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 2103358 m, 201251 m/sec, 17031203 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 15/344 13/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 3085479 m, 196424 m/sec, 25196553 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 20/344 18/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 4061982 m, 195300 m/sec, 33306713 t fired, .
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[[35mlola[0m][.] 18 CTL EXCL 25/344 22/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 5020333 m, 191670 m/sec, 41312653 t fired, .
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[[35mlola[0m][.] 18 CTL EXCL 30/344 26/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 5977772 m, 191487 m/sec, 49232422 t fired, .
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[[35mlola[0m][.] 18 CTL EXCL 35/344 30/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 6928509 m, 190147 m/sec, 57149645 t fired, .
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[[35mlola[0m][.] 18 CTL EXCL 40/344 34/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 7877758 m, 189849 m/sec, 65077378 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 65/344 54/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 12644110 m, 192306 m/sec, 104688478 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 70/344 58/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 13585003 m, 188178 m/sec, 112529422 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 75/344 61/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 14508527 m, 184704 m/sec, 120172310 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 80/344 65/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 15416224 m, 181539 m/sec, 127721801 t fired, .
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[[35mlola[0m][.] 18 CTL EXCL 85/344 69/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 16321991 m, 181153 m/sec, 135269919 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 105/344 84/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 19952886 m, 180905 m/sec, 165450559 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 110/344 88/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 20858198 m, 181062 m/sec, 172983884 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 115/344 92/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 21749399 m, 178240 m/sec, 180408684 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 120/344 96/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 22642696 m, 178659 m/sec, 187844267 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 125/344 99/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 23537628 m, 178986 m/sec, 195296367 t fired, .
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[[35mlola[0m][.] 18 CTL EXCL 130/344 103/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 24423172 m, 177108 m/sec, 202630331 t fired, .
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[[35mlola[0m][.] 18 CTL EXCL 145/344 114/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 27061356 m, 176207 m/sec, 224562270 t fired, .
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[[35mlola[0m][.] 18 CTL EXCL 150/344 118/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 27965549 m, 180838 m/sec, 232085464 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 155/344 122/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 28851633 m, 177216 m/sec, 239464430 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 160/344 125/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 29746446 m, 178962 m/sec, 246911091 t fired, .
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[[35mlola[0m][.] 18 CTL EXCL 165/344 129/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 30621183 m, 174947 m/sec, 254203482 t fired, .
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[[35mlola[0m][.] 18 CTL EXCL 170/344 133/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 31500244 m, 175812 m/sec, 261511675 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 190/344 148/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 35036797 m, 175192 m/sec, 290882414 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 195/344 151/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 35898618 m, 172364 m/sec, 298047618 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 200/344 155/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 36802828 m, 180842 m/sec, 305583604 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 205/344 159/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 37701155 m, 179665 m/sec, 313058465 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 210/344 163/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 38592779 m, 178324 m/sec, 320494589 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 215/344 166/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 39488690 m, 179182 m/sec, 327915083 t fired, .
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[[35mlola[0m][.] 18 CTL EXCL 225/344 174/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 41278329 m, 181158 m/sec, 342784371 t fired, .
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[[35mlola[0m][.] 18 CTL EXCL 230/344 178/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 42167393 m, 177812 m/sec, 350176906 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 235/344 181/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 43048035 m, 176128 m/sec, 357508817 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 240/344 185/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 43920245 m, 174442 m/sec, 364770841 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 245/344 189/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 44781325 m, 172216 m/sec, 371932258 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 250/344 192/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 45668990 m, 177533 m/sec, 379316457 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 255/344 196/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 46546586 m, 175519 m/sec, 386634198 t fired, .
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[[35mlola[0m][.] 18 CTL EXCL 260/344 200/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 47421966 m, 175076 m/sec, 393913753 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 275/344 211/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 50035106 m, 174068 m/sec, 415613609 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 280/344 214/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 50905117 m, 174002 m/sec, 422839483 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 285/344 218/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 51762383 m, 171453 m/sec, 429968817 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 290/344 221/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 52619318 m, 171387 m/sec, 437090012 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 295/344 225/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 53470386 m, 170213 m/sec, 444169291 t fired, .
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[[35mlola[0m][.] 18 CTL EXCL 300/344 229/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 54329028 m, 171728 m/sec, 451306915 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 315/344 240/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 57059584 m, 188397 m/sec, 474634242 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 320/344 244/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 57953796 m, 178842 m/sec, 482731110 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 325/344 248/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 58841056 m, 177452 m/sec, 490766664 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 330/344 251/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 59708569 m, 173502 m/sec, 498620798 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 18 CTL EXCL 335/344 255/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 60558656 m, 170017 m/sec, 506338986 t fired, .
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[[35mlola[0m][.] 18 CTL EXCL 340/344 258/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 61418938 m, 172056 m/sec, 514114975 t fired, .
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[[35mlola[0m][I] LAUNCH task # 18 (type EXCL) for 15 GPPP-PT-C0100N0000000100-CTLFireability-2024-05
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[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for GPPP-PT-C0100N0000000100-CTLFireability-2024-03
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[[35mlola[0m][.] 18 CTL EXCL 5/344 5/5 GPPP-PT-C0100N0000000100-CTLFireability-2024-05 1101351 m, -12063517 m/sec, 8694163 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-09: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2023-15: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for GPPP-PT-C0100N0000000100-CTLFireability-2024-00
[[35mlola[0m][I] result : true
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[[35mlola[0m][I] LAUNCH task # 69 (type EXCL) for 31 GPPP-PT-C0100N0000000100-CTLFireability-2024-09
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[[35mlola[0m][I] FINISHED task # 69 (type EXCL) for GPPP-PT-C0100N0000000100-CTLFireability-2024-09
[[35mlola[0m][I] result : false
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[[35mlola[0m][I] FINISHED task # 68 (type EXCL) for GPPP-PT-C0100N0000000100-CTLFireability-2023-15
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] 13 CTL EXCL 5/800 5/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-04 1159189 m, 231837 m/sec, 8616289 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-05: DISJ 0 0 0 0 3 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] 13 CTL EXCL 10/800 10/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-04 2282330 m, 224628 m/sec, 17120794 t fired, .
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] GPPP-PT-C0100N0000000100-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] 13 CTL EXCL 15/800 14/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-04 3374610 m, 218456 m/sec, 25383056 t fired, .
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[[35mlola[0m][.] 13 CTL EXCL 80/800 69/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-04 16860228 m, 201991 m/sec, 127362183 t fired, .
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[[35mlola[0m][.] 13 CTL EXCL 285/800 231/2000 GPPP-PT-C0100N0000000100-CTLFireability-2024-04 56537450 m, 176380 m/sec, 439466049 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 410 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GPPP-PT-C0100N0000000100"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is GPPP-PT-C0100N0000000100, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r181-tall-171640605200410"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/GPPP-PT-C0100N0000000100.tgz
mv GPPP-PT-C0100N0000000100 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;