Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r179-tall-171640601700514.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool greatspnxred
Input is GPUForwardProgress-PT-16a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r179-tall-171640601700514
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 500K
-rw-r--r-- 1 mcc users 7.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 80K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Apr 22 14:47 LTLCardinality.txt
-rw-r--r-- 1 mcc users 21K Apr 22 14:47 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:47 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 22 14:47 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 11 22:36 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 144K Apr 11 22:36 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Apr 11 22:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 81K Apr 11 22:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:47 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:47 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 26K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2024-00
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2024-01
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2024-02
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2024-03
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2024-04
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2024-05
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2024-06
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2024-07
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2024-08
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2024-09
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2024-10
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2024-11
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2023-12
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2023-13
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2023-14
FORMULA_NAME GPUForwardProgress-PT-16a-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1716476715139

Invoking MCC driver with
BK_TOOL=greatspnxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=GPUForwardProgress-PT-16a
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool greatspn
Invoking reducer
Running Version 202405141337
[2024-05-23 15:05:16] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-23 15:05:16] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-23 15:05:16] [INFO ] Load time of PNML (sax parser for PT used): 54 ms
[2024-05-23 15:05:16] [INFO ] Transformed 72 places.
[2024-05-23 15:05:16] [INFO ] Transformed 89 transitions.
[2024-05-23 15:05:16] [INFO ] Found NUPN structural information;
[2024-05-23 15:05:16] [INFO ] Parsed PT model containing 72 places and 89 transitions and 341 arcs in 155 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
Ensure Unique test removed 18 transitions
Reduce redundant transitions removed 18 transitions.
Support contains 65 out of 72 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Applied a total of 0 rules in 9 ms. Remains 72 /72 variables (removed 0) and now considering 71/71 (removed 0) transitions.
// Phase 1: matrix 71 rows 72 cols
[2024-05-23 15:05:16] [INFO ] Computed 18 invariants in 5 ms
[2024-05-23 15:05:16] [INFO ] Implicit Places using invariants in 175 ms returned []
[2024-05-23 15:05:16] [INFO ] Invariant cache hit.
[2024-05-23 15:05:16] [INFO ] State equation strengthened by 17 read => feed constraints.
[2024-05-23 15:05:16] [INFO ] Implicit Places using invariants and state equation in 87 ms returned []
Implicit Place search using SMT with State Equation took 292 ms to find 0 implicit places.
Running 70 sub problems to find dead transitions.
[2024-05-23 15:05:16] [INFO ] Invariant cache hit.
[2024-05-23 15:05:16] [INFO ] State equation strengthened by 17 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/71 variables, 71/71 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/71 variables, 18/89 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/71 variables, 0/89 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 3 (OVERLAPS) 70/141 variables, 71/160 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/141 variables, 16/176 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/141 variables, 0/176 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 6 (OVERLAPS) 1/142 variables, 1/177 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/142 variables, 1/178 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/142 variables, 0/178 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 9 (OVERLAPS) 1/143 variables, 1/179 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/143 variables, 0/179 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 11 (OVERLAPS) 0/143 variables, 0/179 constraints. Problems are: Problem set: 0 solved, 70 unsolved
No progress, stopping.
After SMT solving in domain Real declared 143/143 variables, and 179 constraints, problems are : Problem set: 0 solved, 70 unsolved in 2866 ms.
Refiners :[Domain max(s): 72/72 constraints, Generalized P Invariants (flows): 18/18 constraints, State Equation: 72/72 constraints, ReadFeed: 17/17 constraints, PredecessorRefiner: 70/70 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 70 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/71 variables, 71/71 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/71 variables, 18/89 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/71 variables, 0/89 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 3 (OVERLAPS) 70/141 variables, 71/160 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/141 variables, 16/176 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/141 variables, 70/246 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/141 variables, 0/246 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 7 (OVERLAPS) 1/142 variables, 1/247 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/142 variables, 1/248 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/142 variables, 0/248 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 10 (OVERLAPS) 1/143 variables, 1/249 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 11 (INCLUDED_ONLY) 0/143 variables, 0/249 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 12 (OVERLAPS) 0/143 variables, 0/249 constraints. Problems are: Problem set: 0 solved, 70 unsolved
No progress, stopping.
After SMT solving in domain Int declared 143/143 variables, and 249 constraints, problems are : Problem set: 0 solved, 70 unsolved in 3033 ms.
Refiners :[Domain max(s): 72/72 constraints, Generalized P Invariants (flows): 18/18 constraints, State Equation: 72/72 constraints, ReadFeed: 17/17 constraints, PredecessorRefiner: 70/70 constraints, Known Traps: 0/0 constraints]
After SMT, in 5987ms problems are : Problem set: 0 solved, 70 unsolved
Search for dead transitions found 0 dead transitions in 6008ms
Finished structural reductions in LTL mode , in 1 iterations and 6328 ms. Remains : 72/72 places, 71/71 transitions.
Support contains 65 out of 72 places after structural reductions.
[2024-05-23 15:05:23] [INFO ] Flatten gal took : 26 ms
[2024-05-23 15:05:23] [INFO ] Flatten gal took : 10 ms
[2024-05-23 15:05:23] [INFO ] Input system was already deterministic with 71 transitions.
Support contains 64 out of 72 places (down from 65) after GAL structural reductions.
Reduction of identical properties reduced properties to check from 67 to 57
RANDOM walk for 40000 steps (175 resets) in 1582 ms. (25 steps per ms) remains 2/57 properties
BEST_FIRST walk for 40004 steps (356 resets) in 193 ms. (206 steps per ms) remains 2/2 properties
BEST_FIRST walk for 40003 steps (8 resets) in 70 ms. (563 steps per ms) remains 1/2 properties
[2024-05-23 15:05:23] [INFO ] Invariant cache hit.
[2024-05-23 15:05:23] [INFO ] State equation strengthened by 17 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/18 variables, 18/18 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/18 variables, 1/19 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/18 variables, 0/19 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 51/69 variables, 16/35 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/69 variables, 51/86 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/69 variables, 0/86 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 6 (OVERLAPS) 2/71 variables, 1/87 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/71 variables, 2/89 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/71 variables, 0/89 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 9 (OVERLAPS) 70/141 variables, 71/160 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/141 variables, 16/176 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 11 (INCLUDED_ONLY) 0/141 variables, 0/176 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 12 (OVERLAPS) 1/142 variables, 1/177 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 13 (INCLUDED_ONLY) 0/142 variables, 1/178 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 14 (INCLUDED_ONLY) 0/142 variables, 0/178 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 15 (OVERLAPS) 1/143 variables, 1/179 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 16 (INCLUDED_ONLY) 0/143 variables, 0/179 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 17 (OVERLAPS) 0/143 variables, 0/179 constraints. Problems are: Problem set: 0 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Real declared 143/143 variables, and 179 constraints, problems are : Problem set: 0 solved, 1 unsolved in 98 ms.
Refiners :[Domain max(s): 72/72 constraints, Generalized P Invariants (flows): 18/18 constraints, State Equation: 72/72 constraints, ReadFeed: 17/17 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 1 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/18 variables, 18/18 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/18 variables, 1/19 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/18 variables, 0/19 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 51/69 variables, 16/35 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/69 variables, 51/86 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/69 variables, 0/86 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 6 (OVERLAPS) 2/71 variables, 1/87 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/71 variables, 2/89 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/71 variables, 0/89 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 9 (OVERLAPS) 70/141 variables, 71/160 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/141 variables, 16/176 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 11 (INCLUDED_ONLY) 0/141 variables, 1/177 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 12 (INCLUDED_ONLY) 0/141 variables, 0/177 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 13 (OVERLAPS) 1/142 variables, 1/178 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 14 (INCLUDED_ONLY) 0/142 variables, 1/179 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 15 (INCLUDED_ONLY) 0/142 variables, 0/179 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 16 (OVERLAPS) 1/143 variables, 1/180 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 17 (INCLUDED_ONLY) 0/143 variables, 0/180 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 18 (OVERLAPS) 0/143 variables, 0/180 constraints. Problems are: Problem set: 0 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Int declared 143/143 variables, and 180 constraints, problems are : Problem set: 0 solved, 1 unsolved in 117 ms.
Refiners :[Domain max(s): 72/72 constraints, Generalized P Invariants (flows): 18/18 constraints, State Equation: 72/72 constraints, ReadFeed: 17/17 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 221ms problems are : Problem set: 0 solved, 1 unsolved
Finished Parikh walk after 197 steps, including 2 resets, run visited all 1 properties in 2 ms. (steps per millisecond=98 )
Parikh walk visited 1 properties in 12 ms.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 10 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 17 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 71 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Graph (complete) has 226 edges and 72 vertex of which 54 are kept as prefixes of interest. Removing 18 places using SCC suffix rule.2 ms
Starting structural reductions in SI_CTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Graph (complete) has 226 edges and 72 vertex of which 54 are kept as prefixes of interest. Removing 18 places using SCC suffix rule.1 ms
Discarding 18 places :
Also discarding 1 output transitions
Drop transitions (Output transitions of discarded places.) removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Performed 13 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 13 Pre rules applied. Total rules applied 1 place count 53 transition count 56
Deduced a syphon composed of 13 places in 0 ms
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 0 with 26 rules applied. Total rules applied 27 place count 40 transition count 56
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 29 place count 39 transition count 55
Applied a total of 29 rules in 23 ms. Remains 39 /72 variables (removed 33) and now considering 55/71 (removed 16) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 23 ms. Remains : 39/72 places, 55/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 3 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 71 transition count 71
Applied a total of 1 rules in 2 ms. Remains 71 /72 variables (removed 1) and now considering 71/71 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 71/72 places, 71/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 5 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 6 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 71 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Applied a total of 0 rules in 1 ms. Remains 72 /72 variables (removed 0) and now considering 71/71 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 72/72 places, 71/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 5 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 5 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 71 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 71 transition count 71
Applied a total of 1 rules in 2 ms. Remains 71 /72 variables (removed 1) and now considering 71/71 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 71/72 places, 71/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 5 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 71 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Graph (complete) has 226 edges and 72 vertex of which 54 are kept as prefixes of interest. Removing 18 places using SCC suffix rule.1 ms
Discarding 18 places :
Also discarding 1 output transitions
Drop transitions (Output transitions of discarded places.) removed 1 transitions
Performed 14 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 14 Pre rules applied. Total rules applied 1 place count 54 transition count 56
Deduced a syphon composed of 14 places in 1 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 0 with 28 rules applied. Total rules applied 29 place count 40 transition count 56
Applied a total of 29 rules in 5 ms. Remains 40 /72 variables (removed 32) and now considering 56/71 (removed 15) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 40/72 places, 56/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 71 transition count 71
Applied a total of 1 rules in 2 ms. Remains 71 /72 variables (removed 1) and now considering 71/71 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 71/72 places, 71/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 71 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 71 transition count 71
Applied a total of 1 rules in 2 ms. Remains 71 /72 variables (removed 1) and now considering 71/71 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 71/72 places, 71/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 5 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 5 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 71 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 71 transition count 71
Applied a total of 1 rules in 2 ms. Remains 71 /72 variables (removed 1) and now considering 71/71 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 71/72 places, 71/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 5 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 71 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Applied a total of 0 rules in 1 ms. Remains 72 /72 variables (removed 0) and now considering 71/71 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 72/72 places, 71/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 5 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 71 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 71 transition count 71
Applied a total of 1 rules in 2 ms. Remains 71 /72 variables (removed 1) and now considering 71/71 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 71/72 places, 71/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 71 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Applied a total of 0 rules in 1 ms. Remains 72 /72 variables (removed 0) and now considering 71/71 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 72/72 places, 71/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 71 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 71 transition count 71
Applied a total of 1 rules in 2 ms. Remains 71 /72 variables (removed 1) and now considering 71/71 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 71/72 places, 71/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 71 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 71 transition count 71
Applied a total of 1 rules in 2 ms. Remains 71 /72 variables (removed 1) and now considering 71/71 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 71/72 places, 71/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 71 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 71 transition count 71
Applied a total of 1 rules in 2 ms. Remains 71 /72 variables (removed 1) and now considering 71/71 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 71/72 places, 71/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 71 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 71 transition count 71
Applied a total of 1 rules in 2 ms. Remains 71 /72 variables (removed 1) and now considering 71/71 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 71/72 places, 71/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 8 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 71 transitions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 71/71 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 71 transition count 71
Applied a total of 1 rules in 1 ms. Remains 71 /72 variables (removed 1) and now considering 71/71 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 71/72 places, 71/71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Input system was already deterministic with 71 transitions.
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 4 ms
[2024-05-23 15:05:24] [INFO ] Flatten gal took : 8 ms
[2024-05-23 15:05:24] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2024-05-23 15:05:24] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 72 places, 71 transitions and 305 arcs took 2 ms.
Total runtime 8327 ms.
There are residual formulas that ITS could not solve within timeout
----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2023
----------------------------------------------------------------------

Running GPUForwardProgress-PT-16a

IS_COLORED=
IS_NUPN=

LOADING PETRI NET FILE /home/mcc/execution/405/model.pnml (PNML) ...
PNML VERSION 2009, P/T NET.
COLOR CLASSES: 0
CONSTANTS: 0
PLACES: 72
TRANSITIONS: 71
COLOR VARS: 0
MEASURES: 0
LOADING TIME: [User 0.000s, Sys 0.001s]


SAVING FILE /home/mcc/execution/405/model (.net / .def) ...
EXPORT TIME: [User 0.000s, Sys 0.000s]


----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2022, University of Torino, Italy.
website: https://github.com/greatspn/SOURCES

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 539
MODEL NAME: /home/mcc/execution/405/model
72 places, 71 transitions.

Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Creating all event NSFs..
Building monolithic NSF...
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2024-01 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2024-03 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2024-00 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2024-02 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2024-05 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2024-04 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2024-06 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2024-07 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2024-09 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2023-12 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2023-13 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2024-08 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2023-14 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2024-11 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2023-15 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA GPUForwardProgress-PT-16a-CTLFireability-2024-10 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
Ok.
EXITCODE: 0
----------------------------------------------------------------------

BK_STOP 1716476732954

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GPUForwardProgress-PT-16a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="greatspnxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool greatspnxred"
echo " Input is GPUForwardProgress-PT-16a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r179-tall-171640601700514"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GPUForwardProgress-PT-16a.tgz
mv GPUForwardProgress-PT-16a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;