fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r175-smll-171636280400323
Last Updated
July 7, 2024

About the Execution of 2023-gold for FamilyReunion-PT-L00200M0020C010P010G005

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
14153.312 3600000.00 3856808.00 9863.60 TFFTTT??F??F??TF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r175-smll-171636280400323.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is FamilyReunion-PT-L00200M0020C010P010G005, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r175-smll-171636280400323
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 130M
-rw-r--r-- 1 mcc users 1.2M Apr 12 04:02 CTLCardinality.txt
-rw-r--r-- 1 mcc users 6.7M Apr 12 04:02 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0M Apr 12 01:12 CTLFireability.txt
-rw-r--r-- 1 mcc users 6.3M Apr 12 01:12 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 770K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 2.8M Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.2M Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 3.1M Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 1.8M Apr 12 11:45 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 9.7M Apr 12 11:45 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.3M Apr 12 09:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 26M Apr 12 09:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 180K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 507K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 62M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-00
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-01
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-02
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-03
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-04
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-05
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-06
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-07
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-08
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-09
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-10
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-11
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-12
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-13
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-14
FORMULA_NAME FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1716668715723

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FamilyReunion-PT-L00200M0020C010P010G005
Not applying reductions.
Model is PT
LTLFireability PT
Running Version 202304061127
[2024-05-25 20:25:19] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2024-05-25 20:25:19] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-25 20:25:22] [INFO ] Load time of PNML (sax parser for PT used): 3168 ms
[2024-05-25 20:25:22] [INFO ] Transformed 143908 places.
[2024-05-25 20:25:23] [INFO ] Transformed 134279 transitions.
[2024-05-25 20:25:23] [INFO ] Parsed PT model containing 143908 places and 134279 transitions and 411469 arcs in 3853 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 191 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 6 formulas.
Reduce places removed 56 places and 0 transitions.
FORMULA FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 19104 out of 143852 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 143852/143852 places, 134279/134279 transitions.
Reduce places removed 674 places and 0 transitions.
Discarding 21104 places :
Implicit places reduction removed 21104 places
Iterating post reduction 0 with 21778 rules applied. Total rules applied 21778 place count 122074 transition count 134279
Discarding 1005 places :
Symmetric choice reduction at 1 with 1005 rule applications. Total rules 22783 place count 121069 transition count 132269
Iterating global reduction 1 with 1005 rules applied. Total rules applied 23788 place count 121069 transition count 132269
Discarding 5 places :
Symmetric choice reduction at 1 with 5 rule applications. Total rules 23793 place count 121064 transition count 131264
Iterating global reduction 1 with 5 rules applied. Total rules applied 23798 place count 121064 transition count 131264
Applied a total of 23798 rules in 13123 ms. Remains 121064 /143852 variables (removed 22788) and now considering 131264/134279 (removed 3015) transitions.
// Phase 1: matrix 131264 rows 121064 cols
[2024-05-25 20:26:34] [INFO ] Computed 9051 invariants in 55758 ms
[2024-05-25 20:26:50] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:26:50] [INFO ] Implicit Places using invariants in 71616 ms returned []
Implicit Place search using SMT only with invariants took 71663 ms to find 0 implicit places.
[2024-05-25 20:26:50] [INFO ] Invariant cache hit.
[2024-05-25 20:27:05] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:27:05] [INFO ] Dead Transitions using invariants and state equation in 15173 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 121064/143852 places, 131264/134279 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 99974 ms. Remains : 121064/143852 places, 131264/134279 transitions.
Support contains 19104 out of 121064 places after structural reductions.
[2024-05-25 20:27:11] [INFO ] Flatten gal took : 4385 ms
[2024-05-25 20:27:15] [INFO ] Flatten gal took : 3814 ms
[2024-05-25 20:27:23] [INFO ] Input system was already deterministic with 131264 transitions.
Support contains 10662 out of 121064 places (down from 19104) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 3785 ms. (steps per millisecond=2 ) properties (out of 19) seen :6
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 758 ms. (steps per millisecond=13 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 131 ms. (steps per millisecond=76 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 784 ms. (steps per millisecond=12 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 459 ms. (steps per millisecond=21 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 132 ms. (steps per millisecond=75 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 457 ms. (steps per millisecond=21 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 61 ms. (steps per millisecond=163 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 13) seen :0
Running SMT prover for 13 properties.
[2024-05-25 20:27:32] [INFO ] Invariant cache hit.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.checkResults(DeadlockTester.java:800)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:614)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:342)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:226)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:96)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:71)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:802)
at fr.lip6.move.gal.application.Application.start(Application.java:182)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2024-05-25 20:27:57] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2024-05-25 20:27:57] [INFO ] After 25035ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 13 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 6039 out of 121064 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 121064/121064 places, 131264/131264 transitions.
Graph (complete) has 177284 edges and 121064 vertex of which 120653 are kept as prefixes of interest. Removing 411 places using SCC suffix rule.183 ms
Discarding 411 places :
Also discarding 211 output transitions
Drop transitions removed 211 transitions
Drop transitions removed 400 transitions
Reduce isomorphic transitions removed 400 transitions.
Discarding 4421 places :
Implicit places reduction removed 4421 places
Drop transitions removed 66913 transitions
Trivial Post-agglo rules discarded 66913 transitions
Performed 66913 trivial Post agglomeration. Transition count delta: 66913
Iterating post reduction 0 with 71734 rules applied. Total rules applied 71735 place count 116232 transition count 63740
Reduce places removed 66913 places and 0 transitions.
Performed 2213 Post agglomeration using F-continuation condition.Transition count delta: 2213
Iterating post reduction 1 with 69126 rules applied. Total rules applied 140861 place count 49319 transition count 61527
Reduce places removed 2213 places and 0 transitions.
Iterating post reduction 2 with 2213 rules applied. Total rules applied 143074 place count 47106 transition count 61527
Performed 5626 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 5626 Pre rules applied. Total rules applied 143074 place count 47106 transition count 55901
Deduced a syphon composed of 5626 places in 83 ms
Ensure Unique test removed 2812 places
Reduce places removed 8438 places and 0 transitions.
Iterating global reduction 3 with 14064 rules applied. Total rules applied 157138 place count 38668 transition count 55901
Discarding 2 places :
Implicit places reduction removed 2 places
Performed 201 Post agglomeration using F-continuation condition.Transition count delta: 201
Iterating post reduction 3 with 203 rules applied. Total rules applied 157341 place count 38666 transition count 55700
Reduce places removed 201 places and 0 transitions.
Iterating post reduction 4 with 201 rules applied. Total rules applied 157542 place count 38465 transition count 55700
Performed 5630 Post agglomeration using F-continuation condition.Transition count delta: 5630
Deduced a syphon composed of 5630 places in 43 ms
Reduce places removed 5630 places and 0 transitions.
Iterating global reduction 5 with 11260 rules applied. Total rules applied 168802 place count 32835 transition count 50070
Free-agglomeration rule applied 2211 times.
Iterating global reduction 5 with 2211 rules applied. Total rules applied 171013 place count 32835 transition count 47859
Ensure Unique test removed 201 places
Reduce places removed 2412 places and 0 transitions.
Ensure Unique test removed 2010 transitions
Reduce isomorphic transitions removed 2010 transitions.
Iterating post reduction 5 with 4422 rules applied. Total rules applied 175435 place count 30423 transition count 45849
Performed 201 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 201 Pre rules applied. Total rules applied 175435 place count 30423 transition count 45648
Deduced a syphon composed of 201 places in 40 ms
Ensure Unique test removed 201 places
Reduce places removed 402 places and 0 transitions.
Iterating global reduction 6 with 603 rules applied. Total rules applied 176038 place count 30021 transition count 45648
Free-agglomeration rule (complex) applied 9458 times.
Iterating global reduction 6 with 9458 rules applied. Total rules applied 185496 place count 30021 transition count 86390
Ensure Unique test removed 603 places
Reduce places removed 10061 places and 0 transitions.
Iterating post reduction 6 with 10061 rules applied. Total rules applied 195557 place count 19960 transition count 86390
Discarding 39 places :
Symmetric choice reduction at 7 with 39 rule applications. Total rules 195596 place count 19921 transition count 30361
Iterating global reduction 7 with 39 rules applied. Total rules applied 195635 place count 19921 transition count 30361
Free-agglomeration rule (complex) applied 202 times.
Iterating global reduction 7 with 202 rules applied. Total rules applied 195837 place count 19921 transition count 30164
Reduce places removed 202 places and 0 transitions.
Iterating post reduction 7 with 202 rules applied. Total rules applied 196039 place count 19719 transition count 30164
Discarding 5 places :
Symmetric choice reduction at 8 with 5 rule applications. Total rules 196044 place count 19714 transition count 30154
Iterating global reduction 8 with 5 rules applied. Total rules applied 196049 place count 19714 transition count 30154
Applied a total of 196049 rules in 84851 ms. Remains 19714 /121064 variables (removed 101350) and now considering 30154/131264 (removed 101110) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 84853 ms. Remains : 19714/121064 places, 30154/131264 transitions.
Computed a total of 121064 stabilizing places and 131264 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 121064 transition count 131264
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202304061127/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F(p0)))'
Support contains 2211 out of 121064 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 121064/121064 places, 131264/131264 transitions.
Graph (complete) has 177284 edges and 121064 vertex of which 108774 are kept as prefixes of interest. Removing 12290 places using SCC suffix rule.312 ms
Discarding 12290 places :
Also discarding 14684 output transitions
Drop transitions removed 14684 transitions
Reduce places removed 201 places and 201 transitions.
Discarding 4222 places :
Implicit places reduction removed 4222 places
Drop transitions removed 68742 transitions
Trivial Post-agglo rules discarded 68742 transitions
Performed 68742 trivial Post agglomeration. Transition count delta: 68742
Iterating post reduction 0 with 72964 rules applied. Total rules applied 72965 place count 104351 transition count 47637
Reduce places removed 68742 places and 0 transitions.
Iterating post reduction 1 with 68742 rules applied. Total rules applied 141707 place count 35609 transition count 47637
Performed 5628 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 5628 Pre rules applied. Total rules applied 141707 place count 35609 transition count 42009
Deduced a syphon composed of 5628 places in 36 ms
Ensure Unique test removed 2814 places
Reduce places removed 8442 places and 0 transitions.
Iterating global reduction 2 with 14070 rules applied. Total rules applied 155777 place count 27167 transition count 42009
Drop transitions removed 2211 transitions
Trivial Post-agglo rules discarded 2211 transitions
Performed 2211 trivial Post agglomeration. Transition count delta: 2211
Iterating post reduction 2 with 2211 rules applied. Total rules applied 157988 place count 27167 transition count 39798
Reduce places removed 2211 places and 0 transitions.
Iterating post reduction 3 with 2211 rules applied. Total rules applied 160199 place count 24956 transition count 39798
Performed 201 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 201 Pre rules applied. Total rules applied 160199 place count 24956 transition count 39597
Deduced a syphon composed of 201 places in 28 ms
Reduce places removed 201 places and 0 transitions.
Iterating global reduction 4 with 402 rules applied. Total rules applied 160601 place count 24755 transition count 39597
Performed 5025 Post agglomeration using F-continuation condition.Transition count delta: 5025
Deduced a syphon composed of 5025 places in 16 ms
Reduce places removed 5025 places and 0 transitions.
Iterating global reduction 4 with 10050 rules applied. Total rules applied 170651 place count 19730 transition count 34572
Applied a total of 170651 rules in 22977 ms. Remains 19730 /121064 variables (removed 101334) and now considering 34572/131264 (removed 96692) transitions.
// Phase 1: matrix 34572 rows 19730 cols
[2024-05-25 20:29:48] [INFO ] Computed 1208 invariants in 2180 ms
[2024-05-25 20:29:51] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:29:51] [INFO ] Implicit Places using invariants in 5327 ms returned []
Implicit Place search using SMT only with invariants took 5335 ms to find 0 implicit places.
[2024-05-25 20:29:51] [INFO ] Invariant cache hit.
[2024-05-25 20:29:54] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:29:54] [INFO ] Dead Transitions using invariants and state equation in 2811 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 19730/121064 places, 34572/131264 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 31129 ms. Remains : 19730/121064 places, 34572/131264 transitions.
ANTLR Tool version 4.9.3 used for code generation does not match the current runtime version 4.7.2ANTLR Runtime version 4.9.3 used for parser compilation does not match the current runtime version 4.7.2ANTLR Tool version 4.9.3 used for code generation does not match the current runtime version 4.7.2ANTLR Runtime version 4.9.3 used for parser compilation does not match the current runtime version 4.7.2Stuttering acceptance computed with spot in 275 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-00 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={} source=0 dest: 1}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(AND (LT s4983 1) (LT s5503 1) (LT s6023 1) (LT s6543 1) (LT s4723 1) (LT s5324 1) (LT s5763 1) (LT s6803 1) (LT s6364 1) (LT s6722 1) (LT s6462 1) (LT...], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null][true, true]]
Product exploration timeout after 79840 steps with 37 reset in 10001 ms.
Product exploration timeout after 82550 steps with 39 reset in 10001 ms.
Computed a total of 19730 stabilizing places and 34572 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 19730 transition count 34572
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [p0, (X p0), (F (G p0))]
False Knowledge obtained : []
Property proved to be true thanks to knowledge (Minato strategy)
Knowledge based reduction with 3 factoid took 36 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-00 TRUE TECHNIQUES KNOWLEDGE
Treatment of property FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-00 finished in 113134 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202304061127/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(p0))'
Support contains 201 out of 121064 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 121064/121064 places, 131264/131264 transitions.
Graph (complete) has 177284 edges and 121064 vertex of which 104553 are kept as prefixes of interest. Removing 16511 places using SCC suffix rule.232 ms
Discarding 16511 places :
Also discarding 20312 output transitions
Drop transitions removed 20312 transitions
Reduce places removed 201 places and 201 transitions.
Discarding 4222 places :
Implicit places reduction removed 4222 places
Drop transitions removed 68541 transitions
Trivial Post-agglo rules discarded 68541 transitions
Performed 68541 trivial Post agglomeration. Transition count delta: 68541
Iterating post reduction 0 with 72763 rules applied. Total rules applied 72764 place count 100130 transition count 42210
Reduce places removed 68541 places and 0 transitions.
Iterating post reduction 1 with 68541 rules applied. Total rules applied 141305 place count 31589 transition count 42210
Performed 4623 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 4623 Pre rules applied. Total rules applied 141305 place count 31589 transition count 37587
Deduced a syphon composed of 4623 places in 21 ms
Ensure Unique test removed 2211 places
Reduce places removed 6834 places and 0 transitions.
Iterating global reduction 2 with 11457 rules applied. Total rules applied 152762 place count 24755 transition count 37587
Drop transitions removed 2211 transitions
Trivial Post-agglo rules discarded 2211 transitions
Performed 2211 trivial Post agglomeration. Transition count delta: 2211
Iterating post reduction 2 with 2211 rules applied. Total rules applied 154973 place count 24755 transition count 35376
Reduce places removed 2211 places and 0 transitions.
Iterating post reduction 3 with 2211 rules applied. Total rules applied 157184 place count 22544 transition count 35376
Performed 5025 Post agglomeration using F-continuation condition.Transition count delta: 5025
Deduced a syphon composed of 5025 places in 12 ms
Reduce places removed 5025 places and 0 transitions.
Iterating global reduction 4 with 10050 rules applied. Total rules applied 167234 place count 17519 transition count 30351
Applied a total of 167234 rules in 20966 ms. Remains 17519 /121064 variables (removed 103545) and now considering 30351/131264 (removed 100913) transitions.
// Phase 1: matrix 30351 rows 17519 cols
[2024-05-25 20:31:39] [INFO ] Computed 1208 invariants in 1880 ms
[2024-05-25 20:31:41] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:31:41] [INFO ] Implicit Places using invariants in 4125 ms returned []
Implicit Place search using SMT only with invariants took 4126 ms to find 0 implicit places.
[2024-05-25 20:31:41] [INFO ] Invariant cache hit.
[2024-05-25 20:31:43] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:31:43] [INFO ] Dead Transitions using invariants and state equation in 2333 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 17519/121064 places, 30351/131264 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 27428 ms. Remains : 17519/121064 places, 30351/131264 transitions.
Stuttering acceptance computed with spot in 50 ms :[true, (NOT p0)]
Running random walk in product with property : FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-02 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=(NOT p0), acceptance={} source=1 dest: 0}, { cond=p0, acceptance={} source=1 dest: 1}]], initial=1, aps=[p0:(AND (LT s17377 1) (LT s17442 1) (LT s17507 1) (LT s17385 1) (LT s17450 1) (LT s17515 1) (LT s17361 1) (LT s17426 1) (LT s17320 1) (LT s17491 1) (LT s1...], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null][true, true]]
Entered a terminal (fully accepting) state of product in 600 steps with 0 reset in 80 ms.
FORMULA FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-02 FALSE TECHNIQUES STUTTER_TEST
Treatment of property FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-02 finished in 27707 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202304061127/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 2211 out of 121064 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 121064/121064 places, 131264/131264 transitions.
Graph (complete) has 177284 edges and 121064 vertex of which 96904 are kept as prefixes of interest. Removing 24160 places using SCC suffix rule.195 ms
Discarding 24160 places :
Also discarding 29558 output transitions
Drop transitions removed 29558 transitions
Reduce places removed 201 places and 201 transitions.
Discarding 4222 places :
Implicit places reduction removed 4222 places
Drop transitions removed 64119 transitions
Trivial Post-agglo rules discarded 64119 transitions
Performed 64119 trivial Post agglomeration. Transition count delta: 64119
Iterating post reduction 0 with 68341 rules applied. Total rules applied 68342 place count 92481 transition count 37386
Reduce places removed 64119 places and 0 transitions.
Iterating post reduction 1 with 64119 rules applied. Total rules applied 132461 place count 28362 transition count 37386
Performed 4824 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 4824 Pre rules applied. Total rules applied 132461 place count 28362 transition count 32562
Deduced a syphon composed of 4824 places in 19 ms
Ensure Unique test removed 2211 places
Reduce places removed 7035 places and 0 transitions.
Iterating global reduction 2 with 11859 rules applied. Total rules applied 144320 place count 21327 transition count 32562
Performed 4623 Post agglomeration using F-continuation condition.Transition count delta: 4623
Deduced a syphon composed of 4623 places in 17 ms
Reduce places removed 4623 places and 0 transitions.
Iterating global reduction 2 with 9246 rules applied. Total rules applied 153566 place count 16704 transition count 27939
Applied a total of 153566 rules in 20448 ms. Remains 16704 /121064 variables (removed 104360) and now considering 27939/131264 (removed 103325) transitions.
// Phase 1: matrix 27939 rows 16704 cols
[2024-05-25 20:32:05] [INFO ] Computed 805 invariants in 688 ms
[2024-05-25 20:32:07] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:32:07] [INFO ] Implicit Places using invariants in 3213 ms returned []
Implicit Place search using SMT only with invariants took 3214 ms to find 0 implicit places.
[2024-05-25 20:32:07] [INFO ] Invariant cache hit.
[2024-05-25 20:32:09] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:32:09] [INFO ] Dead Transitions using invariants and state equation in 2168 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 16704/121064 places, 27939/131264 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 25833 ms. Remains : 16704/121064 places, 27939/131264 transitions.
Stuttering acceptance computed with spot in 38 ms :[(NOT p0)]
Running random walk in product with property : FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-03 automaton TGBA Formula[mat=[[{ cond=p0, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(AND (LT s15861 1) (LT s16381 1) (LT s14821 1) (LT s15341 1) (LT s16300 1) (LT s16641 1) (LT s14561 1) (LT s15601 1) (LT s15260 1) (LT s15520 1) (LT s1...], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null][true]]
Product exploration timeout after 72490 steps with 40 reset in 10003 ms.
Product exploration timeout after 69500 steps with 38 reset in 10001 ms.
Computed a total of 16704 stabilizing places and 27939 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 16704 transition count 27939
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [p0, (X p0), (F (G p0))]
False Knowledge obtained : []
Property proved to be true thanks to knowledge (Minato strategy)
Knowledge based reduction with 3 factoid took 16 ms. Reduced automaton from 1 states, 2 edges and 1 AP (stutter insensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-03 TRUE TECHNIQUES KNOWLEDGE
Treatment of property FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-03 finished in 80711 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202304061127/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(((p1 U X(p2))||X(p3)||p0)))'
Support contains 1407 out of 121064 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in LTL mode, iteration 0 : 121064/121064 places, 131264/131264 transitions.
Discarding 4222 places :
Implicit places reduction removed 4222 places
Iterating post reduction 0 with 4222 rules applied. Total rules applied 4222 place count 116842 transition count 131264
Applied a total of 4222 rules in 3332 ms. Remains 116842 /121064 variables (removed 4222) and now considering 131264/131264 (removed 0) transitions.
// Phase 1: matrix 131264 rows 116842 cols
[2024-05-25 20:33:36] [INFO ] Computed 4829 invariants in 28679 ms
[2024-05-25 20:33:51] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:33:51] [INFO ] Implicit Places using invariants in 43189 ms returned []
Implicit Place search using SMT only with invariants took 43190 ms to find 0 implicit places.
[2024-05-25 20:33:51] [INFO ] Invariant cache hit.
[2024-05-25 20:34:05] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:34:05] [INFO ] Dead Transitions using invariants and state equation in 13977 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 116842/121064 places, 131264/131264 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 60523 ms. Remains : 116842/121064 places, 131264/131264 transitions.
Stuttering acceptance computed with spot in 108 ms :[(AND (NOT p0) (NOT p2) (NOT p3)), (AND (NOT p0) (NOT p2) (NOT p3))]
Running random walk in product with property : FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-05 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p0) (NOT p2) (NOT p3)), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(OR (GEQ s60104 1) (GEQ s60364 1) (GEQ s60624 1) (GEQ s60884 1) (GEQ s59974 1) (GEQ s60494 1) (GEQ s61014 1) (GEQ s60705 1) (GEQ s60835 1) (GEQ s60234 ...], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null][false, false]]
Product exploration timeout after 10100 steps with 5050 reset in 10002 ms.
Product exploration timeout after 10180 steps with 5090 reset in 10007 ms.
Computed a total of 116842 stabilizing places and 131264 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 116842 transition count 131264
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Could not satisfy deadlock states : solver returned unknown
Knowledge obtained : [(AND (NOT p0) p2 (NOT p3)), (X (NOT (AND (NOT p0) (NOT p2) (NOT p3)))), (X (X (NOT (AND (NOT p0) (NOT p2) (NOT p3))))), (F (OR (G p0) (G (NOT p0)))), (F (OR (G p2) (G (NOT p2)))), (F (OR (G p3) (G (NOT p3))))]
False Knowledge obtained : []
Property proved to be true thanks to knowledge (Minato strategy)
Knowledge based reduction with 6 factoid took 18 ms. Reduced automaton from 2 states, 2 edges and 3 AP (stutter sensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-05 TRUE TECHNIQUES KNOWLEDGE
Treatment of property FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-05 finished in 110411 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202304061127/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(F((X(p1)&&p0)))))'
Support contains 201 out of 121064 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 121064/121064 places, 131264/131264 transitions.
Discarding 4222 places :
Implicit places reduction removed 4222 places
Iterating post reduction 0 with 4222 rules applied. Total rules applied 4222 place count 116842 transition count 131264
Applied a total of 4222 rules in 2963 ms. Remains 116842 /121064 variables (removed 4222) and now considering 131264/131264 (removed 0) transitions.
[2024-05-25 20:34:58] [INFO ] Invariant cache hit.
[2024-05-25 20:35:12] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:35:12] [INFO ] Implicit Places using invariants in 14124 ms returned []
Implicit Place search using SMT only with invariants took 14137 ms to find 0 implicit places.
[2024-05-25 20:35:12] [INFO ] Invariant cache hit.
[2024-05-25 20:35:26] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:35:26] [INFO ] Dead Transitions using invariants and state equation in 14163 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 116842/121064 places, 131264/131264 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31286 ms. Remains : 116842/121064 places, 131264/131264 transitions.
Stuttering acceptance computed with spot in 180 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p1) (NOT p0))]
Running random walk in product with property : FamilyReunion-PT-L00200M0020C010P010G005-LTLFireability-06 automaton TGBA Formula[mat=[[{ cond=(AND p0 (NOT p1)), acceptance={0} source=0 dest: 0}, { cond=(AND (NOT p0) (NOT p1)), acceptance={0} source=0 dest: 1}], [{ cond=p0, acceptance={0} source=1 dest: 0}, { cond=(NOT p0), acceptance={0} source=1 dest: 1}], [{ cond=true, acceptance={} source=2 dest: 1}], [{ cond=true, acceptance={} source=3 dest: 2}]], initial=3, aps=[p0:(AND (LT s75072 1) (LT s75137 1) (LT s75202 1) (LT s75080 1) (LT s75056 1) (LT s75145 1) (LT s75210 1) (LT s75121 1) (LT s75186 1) (LT s75015 1) (LT s7...], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Product exploration timeout after 19030 steps with 4757 reset in 10003 ms.
Product exploration timeout after 19600 steps with 4900 reset in 10004 ms.
Computed a total of 116842 stabilizing places and 131264 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 116842 transition count 131264
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Could not satisfy deadlock states : solver returned unknown
Knowledge obtained : [(AND p0 p1), (X (X p0)), (F (OR (G p0) (G (NOT p0)))), (F (OR (G p1) (G (NOT p1))))]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 134 ms. Reduced automaton from 4 states, 6 edges and 2 AP (stutter sensitive) to 4 states, 6 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 157 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p1) (NOT p0))]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1037 ms. (steps per millisecond=9 ) properties (out of 3) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 226 ms. (steps per millisecond=44 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2024-05-25 20:36:17] [INFO ] Invariant cache hit.
[2024-05-25 20:36:42] [INFO ] After 25013ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 201 out of 116842 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 116842/116842 places, 131264/131264 transitions.
Graph (complete) has 168840 edges and 116842 vertex of which 60099 are kept as prefixes of interest. Removing 56743 places using SCC suffix rule.58 ms
Discarding 56743 places :
Also discarding 67346 output transitions
Drop transitions removed 67346 transitions
Drop transitions removed 54873 transitions
Trivial Post-agglo rules discarded 54873 transitions
Performed 54873 trivial Post agglomeration. Transition count delta: 54873
Iterating post reduction 0 with 54873 rules applied. Total rules applied 54874 place count 60099 transition count 9045
Reduce places removed 54873 places and 0 transitions.
Iterating post reduction 1 with 54873 rules applied. Total rules applied 109747 place count 5226 transition count 9045
Discarding 4020 places :
Symmetric choice reduction at 2 with 4020 rule applications. Total rules 113767 place count 1206 transition count 5025
Iterating global reduction 2 with 4020 rules applied. Total rules applied 117787 place count 1206 transition count 5025
Ensure Unique test removed 4020 transitions
Reduce isomorphic transitions removed 4020 transitions.
Discarding 201 places :
Implicit places reduction removed 201 places
Drop transitions removed 402 transitions
Trivial Post-agglo rules discarded 402 transitions
Performed 402 trivial Post agglomeration. Transition count delta: 402
Iterating post reduction 2 with 4623 rules applied. Total rules applied 122410 place count 1005 transition count 603
Reduce places removed 402 places and 0 transitions.
Iterating post reduction 3 with 402 rules applied. Total rules applied 122812 place count 603 transition count 603
Performed 201 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 201 Pre rules applied. Total rules applied 122812 place count 603 transition count 402
Deduced a syphon composed of 201 places in 0 ms
Reduce places removed 201 places and 0 transitions.
Iterating global reduction 4 with 402 rules applied. Total rules applied 123214 place count 402 transition count 402
Applied a total of 123214 rules in 3995 ms. Remains 402 /116842 variables (removed 116440) and now considering 402/131264 (removed 130862) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 3995 ms. Remains : 402/116842 places, 402/131264 transitions.
Incomplete random walk after 10000 steps, including 24 resets, run finished after 131 ms. (steps per millisecond=76 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 195 ms. (steps per millisecond=51 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 1550030 steps, run timeout after 3001 ms. (steps per millisecond=516 ) properties seen :{}
Probabilistic random walk after 1550030 steps, saw 273160 distinct states, run finished after 3003 ms. (steps per millisecond=516 ) properties seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 402 rows 402 cols
[2024-05-25 20:36:49] [INFO ] Computed 0 invariants in 0 ms
[2024-05-25 20:36:49] [INFO ] After 197ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Found 1 invariant AP formulas.
Knowledge obtained : [(AND p0 p1), (X (X p0)), (F (OR (G p0) (G (NOT p0)))), (F (OR (G p1) (G (NOT p1)))), (G (NOT (AND p0 (NOT p1))))]
False Knowledge obtained : [(F (NOT p0)), (F (AND (NOT p0) (NOT p1)))]
Knowledge based reduction with 5 factoid took 329 ms. Reduced automaton from 4 states, 6 edges and 2 AP (stutter sensitive) to 4 states, 5 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 228 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 225 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Support contains 201 out of 116842 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 116842/116842 places, 131264/131264 transitions.
Applied a total of 0 rules in 2312 ms. Remains 116842 /116842 variables (removed 0) and now considering 131264/131264 (removed 0) transitions.
// Phase 1: matrix 131264 rows 116842 cols
[2024-05-25 20:37:21] [INFO ] Computed 4829 invariants in 28138 ms
[2024-05-25 20:37:34] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:37:34] [INFO ] Implicit Places using invariants in 41684 ms returned []
Implicit Place search using SMT only with invariants took 41686 ms to find 0 implicit places.
[2024-05-25 20:37:34] [INFO ] Invariant cache hit.
[2024-05-25 20:37:49] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:37:49] [INFO ] Dead Transitions using invariants and state equation in 14743 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 58748 ms. Remains : 116842/116842 places, 131264/131264 transitions.
Computed a total of 116842 stabilizing places and 131264 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 116842 transition count 131264
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Could not satisfy deadlock states : solver returned unknown
Knowledge obtained : [(AND p1 p0), (X (X p0)), (F (OR (G p1) (G (NOT p1)))), (F (OR (G p0) (G (NOT p0))))]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 126 ms. Reduced automaton from 4 states, 5 edges and 2 AP (stutter sensitive) to 4 states, 5 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 149 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Finished random walk after 1510 steps, including 0 resets, run visited all 2 properties in 182 ms. (steps per millisecond=8 )
Parikh walk visited 0 properties in 0 ms.
Knowledge obtained : [(AND p1 p0), (X (X p0)), (F (OR (G p1) (G (NOT p1)))), (F (OR (G p0) (G (NOT p0))))]
False Knowledge obtained : [(F (NOT p1)), (F (NOT p0))]
Knowledge based reduction with 4 factoid took 225 ms. Reduced automaton from 4 states, 5 edges and 2 AP (stutter sensitive) to 4 states, 5 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 159 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 201 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 215 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Product exploration timeout after 20040 steps with 5010 reset in 10002 ms.
Product exploration timeout after 20420 steps with 5105 reset in 10003 ms.
Built C files in :
/tmp/ltsmin8457767089590169322
[2024-05-25 20:38:40] [INFO ] Built C files in 1496ms conformant to PINS (ltsmin variant)in folder :/tmp/ltsmin8457767089590169322
Running compilation step : cd /tmp/ltsmin8457767089590169322;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202304061127/bin/limit_time.pl' '3' 'gcc' '-c' '-I/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202304061127/bin/include/' '-I.' '-std=c99' '-fPIC' '-O0' 'model.c'
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running cd /tmp/ltsmin8457767089590169322;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202304061127/bin/limit_time.pl' '3' 'gcc' '-c' '-I/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202304061127/bin/include/' '-I.' '-std=c99' '-fPIC' '-O0' 'model.c' killed by timeout after 3 SECONDS
java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running cd /tmp/ltsmin8457767089590169322;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202304061127/bin/limit_time.pl' '3' 'gcc' '-c' '-I/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202304061127/bin/include/' '-I.' '-std=c99' '-fPIC' '-O0' 'model.c' killed by timeout after 3 SECONDS
at fr.lip6.move.gal.application.runner.ltsmin.LTSminRunner$1.run(LTSminRunner.java:92)
at java.base/java.lang.Thread.run(Thread.java:833)
Support contains 201 out of 116842 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 116842/116842 places, 131264/131264 transitions.
Applied a total of 0 rules in 2305 ms. Remains 116842 /116842 variables (removed 0) and now considering 131264/131264 (removed 0) transitions.
[2024-05-25 20:38:46] [INFO ] Invariant cache hit.
[2024-05-25 20:38:59] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:38:59] [INFO ] Implicit Places using invariants in 13375 ms returned []
Implicit Place search using SMT only with invariants took 13376 ms to find 0 implicit places.
[2024-05-25 20:38:59] [INFO ] Invariant cache hit.
[2024-05-25 20:39:12] [INFO ] SMT solver returned unknown. Retrying;
[2024-05-25 20:39:13] [INFO ] Dead Transitions using invariants and state equation in 13432 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29118 ms. Remains : 116842/116842 places, 131264/131264 transitions.
Built C files in :
/tmp/ltsmin4052978910556011036
[2024-05-25 20:39:14] [INFO ] Built C files in 1249ms conformant to PINS (ltsmin variant)in folder :/tmp/ltsmin4052978910556011036
Running compilation step : cd /tmp/ltsmin4052978910556011036;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202304061127/bin/limit_time.pl' '3' 'gcc' '-c' '-I/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202304061127/bin/include/' '-I.' '-std=c99' '-fPIC' '-O0' 'model.c'
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running cd /tmp/ltsmin4052978910556011036;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202304061127/bin/limit_time.pl' '3' 'gcc' '-c' '-I/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202304061127/bin/include/' '-I.' '-std=c99' '-fPIC' '-O0' 'model.c' killed by timeout after 3 SECONDS
java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running cd /tmp/ltsmin4052978910556011036;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202304061127/bin/limit_time.pl' '3' 'gcc' '-c' '-I/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202304061127/bin/include/' '-I.' '-std=c99' '-fPIC' '-O0' 'model.c' killed by timeout after 3 SECONDS
at fr.lip6.move.gal.application.runner.ltsmin.LTSminRunner$1.run(LTSminRunner.java:92)
at java.base/java.lang.Thread.run(Thread.java:833)
[2024-05-25 20:39:24] [INFO ] Flatten gal took : 3047 ms
[2024-05-25 20:39:26] [INFO ] Flatten gal took : 2930 ms
[2024-05-25 20:39:27] [INFO ] Time to serialize gal into /tmp/LTL10505279188398348214.gal : 523 ms
[2024-05-25 20:39:27] [INFO ] Time to serialize properties into /tmp/LTL12317056306222526683.prop : 0 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202304061127/bin/its-ltl-linux64' '--gc-threshold' '2000000' '-i' '/tmp/LTL10505279188398348214.gal' '-t' 'CGAL' '-hoa' '/tmp/aut12350790595987294161.hoa' '-atoms' '/tmp/LTL12317056306222526683.prop' '-c' '-stutter-deadlock' '--gen-order' 'FOLLOW'

its-ltl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202304061127/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/L...320
Detected timeout of ITS tools.
[2024-05-25 20:39:49] [INFO ] Flatten gal took : 3328 ms
[2024-05-25 20:39:52] [INFO ] Flatten gal took : 3422 ms
[2024-05-25 20:39:53] [INFO ] Time to serialize gal into /tmp/LTL1930988457903129087.gal : 431 ms
[2024-05-25 20:39:53] [INFO ] Time to serialize properties into /tmp/LTL11992284200664710625.ltl : 5 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202304061127/bin/its-ltl-linux64' '--gc-threshold' '2000000' '-i' '/tmp/LTL1930988457903129087.gal' '-t' 'CGAL' '-LTL' '/tmp/LTL11992284200664710625.ltl' '-c' '-stutter-deadlock' '--gen-order' 'FOLLOW'

its-ltl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202304061127/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/L...276
Read 1 LTL properties
Detected timeout of ITS tools.
[2024-05-25 20:40:11] [INFO ] Flatten gal took : 3045 ms
[2024-05-25 20:40:11] [INFO ] Applying decomposition
[2024-05-25 20:40:14] [INFO ] Flatten gal took : 2939 ms
Converted graph to binary with : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202304061127/bin/convert-linux64' '-i' '/tmp/graph11451027129587610969.txt' '-o' '/tmp/graph11451027129587610969.bin' '-w' '/tmp/graph11451027129587610969.weights'
Built communities with : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202304061127/bin/louvain-linux64' '/tmp/graph11451027129587610969.bin' '-l' '-1' '-v' '-w' '/tmp/graph11451027129587610969.weights' '-q' '0' '-e' '0.001'
[2024-05-25 20:40:27] [INFO ] Decomposing Gal with order
[2024-05-25 20:45:32] [INFO ] Rewriting arrays to variables to allow decomposition.
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 8240204 kB
After kill :
MemTotal: 16393216 kB
MemFree: 15901052 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit/bin//../itstools/bin//..//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-PT-L00200M0020C010P010G005"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is FamilyReunion-PT-L00200M0020C010P010G005, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r175-smll-171636280400323"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-PT-L00200M0020C010P010G005.tgz
mv FamilyReunion-PT-L00200M0020C010P010G005 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;