fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r175-smll-171636280400297
Last Updated
July 7, 2024

About the Execution of 2023-gold for FamilyReunion-COL-L12000M1200C600P600G300

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16213.680 257325.00 354601.00 57008.90 ????FF?????????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r175-smll-171636280400297.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is FamilyReunion-COL-L12000M1200C600P600G300, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r175-smll-171636280400297
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 8.7K Apr 11 20:13 CTLCardinality.txt
-rw-r--r-- 1 mcc users 96K Apr 11 20:13 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Apr 11 20:13 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Apr 11 20:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 11 20:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 154K Apr 11 20:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.2K Apr 11 20:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 55K Apr 11 20:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 930K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-00
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-01
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-02
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-03
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-04
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-05
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-06
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-07
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-08
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-09
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-10
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-11
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-12
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-13
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-14
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1716648828631

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=LTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FamilyReunion-COL-L12000M1200C600P600G300
Not applying reductions.
Model is COL
LTLCardinality COL
Running Version 202304061127
[2024-05-25 14:53:51] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2024-05-25 14:53:51] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-25 14:53:51] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-05-25 14:53:53] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-05-25 14:53:54] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 2352 ms
[2024-05-25 14:53:57] [INFO ] Detected 5 constant HL places corresponding to 3006 PT places.
[2024-05-25 14:53:57] [INFO ] Imported 104 HL places and 66 HL transitions for a total of 451140109 PT places and 4.3286467E8 transition bindings in 3372 ms.
Parsed 16 properties from file /home/mcc/execution/LTLCardinality.xml in 24 ms.
Working with output stream class java.io.PrintStream
[2024-05-25 14:53:58] [INFO ] Built PT skeleton of HLPN with 104 places and 66 transitions 198 arcs in 300 ms.
[2024-05-25 14:53:58] [INFO ] Skeletonized 16 HLPN properties in 4 ms.
Initial state reduction rules removed 1 formulas.
FORMULA FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 104 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 104 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Remains 15 properties that can be checked using skeleton over-approximation.
Reduce places removed 5 places and 0 transitions.
Computed a total of 99 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 99 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Incomplete random walk after 12002 steps, including 0 resets, run finished after 29 ms. (steps per millisecond=413 ) properties (out of 30) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 51 ms. (steps per millisecond=19 ) properties (out of 29) seen :6
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 58 ms. (steps per millisecond=17 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=31 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 23) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 22) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 22) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 22) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=34 ) properties (out of 22) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 22) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=35 ) properties (out of 22) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=34 ) properties (out of 22) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=25 ) properties (out of 22) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 22) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 22) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 22) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 22) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 22) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 21) seen :0
Running SMT prover for 21 properties.
// Phase 1: matrix 66 rows 99 cols
[2024-05-25 14:53:58] [INFO ] Computed 33 invariants in 10 ms
[2024-05-25 14:53:59] [INFO ] [Real]Absence check using 4 positive place invariants in 5 ms returned sat
[2024-05-25 14:53:59] [INFO ] [Real]Absence check using 4 positive and 29 generalized place invariants in 19 ms returned sat
[2024-05-25 14:53:59] [INFO ] After 463ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:21
[2024-05-25 14:53:59] [INFO ] [Nat]Absence check using 4 positive place invariants in 5 ms returned sat
[2024-05-25 14:53:59] [INFO ] [Nat]Absence check using 4 positive and 29 generalized place invariants in 20 ms returned sat
[2024-05-25 14:53:59] [INFO ] After 229ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :20
[2024-05-25 14:54:00] [INFO ] After 494ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :20
Attempting to minimize the solution found.
Minimization took 147 ms.
[2024-05-25 14:54:00] [INFO ] After 1005ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :20
Fused 21 Parikh solutions to 20 different solutions.
Finished Parikh walk after 15906 steps, including 0 resets, run visited all 1 properties in 49 ms. (steps per millisecond=324 )
Parikh walk visited 19 properties in 6523 ms.
Support contains 1 out of 99 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 99/99 places, 66/66 transitions.
Graph (complete) has 123 edges and 99 vertex of which 76 are kept as prefixes of interest. Removing 23 places using SCC suffix rule.1 ms
Discarding 23 places :
Also discarding 11 output transitions
Drop transitions removed 11 transitions
Discarding 15 places :
Implicit places reduction removed 15 places
Drop transitions removed 41 transitions
Trivial Post-agglo rules discarded 41 transitions
Performed 41 trivial Post agglomeration. Transition count delta: 41
Iterating post reduction 0 with 56 rules applied. Total rules applied 57 place count 61 transition count 14
Reduce places removed 41 places and 0 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 1 with 44 rules applied. Total rules applied 101 place count 19 transition count 12
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 103 place count 17 transition count 12
Performed 7 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 7 Pre rules applied. Total rules applied 103 place count 17 transition count 5
Deduced a syphon composed of 7 places in 0 ms
Ensure Unique test removed 4 places
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 3 with 18 rules applied. Total rules applied 121 place count 6 transition count 5
Discarding 1 places :
Implicit places reduction removed 1 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 3 with 3 rules applied. Total rules applied 124 place count 5 transition count 3
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 4 with 2 rules applied. Total rules applied 126 place count 3 transition count 3
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 1 Pre rules applied. Total rules applied 126 place count 3 transition count 2
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 128 place count 2 transition count 2
Applied a total of 128 rules in 20 ms. Remains 2 /99 variables (removed 97) and now considering 2/66 (removed 64) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 21 ms. Remains : 2/99 places, 2/66 transitions.
Incomplete random walk after 12002 steps, including 0 resets, run finished after 5 ms. (steps per millisecond=2400 ) properties (out of 1) seen :0
Finished Best-First random walk after 4 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=4 )
Parikh walk visited 0 properties in 0 ms.
[2024-05-25 14:54:06] [INFO ] Initial state reduction rules for LTL removed 1 formulas.
[2024-05-25 14:54:06] [INFO ] Flatten gal took : 39 ms
FORMULA FamilyReunion-COL-L12000M1200C600P600G300-LTLCardinality-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-05-25 14:54:06] [INFO ] Flatten gal took : 12 ms
Transition Gate2ANDJoin forces synchronizations/join behavior on parameter l of sort LegalResident
Transition ReceiveLangChoice forces synchronizations/join behavior on parameter m of sort MICSystem
Symmetric sort wr.t. initial and guards and successors and join/free detected :CINFORMI
Symmetric sort wr.t. initial detected :CINFORMI
Symmetric sort wr.t. initial and guards detected :CINFORMI
Applying symmetric unfolding of full symmetric sort :CINFORMI domain size was 601
Transition Gate1ANDJoin forces synchronizations/join behavior on parameter p of sort PublicAdminOffice
Symmetric sort wr.t. initial and guards and successors and join/free detected :GovernmentCommission
Symmetric sort wr.t. initial detected :GovernmentCommission
Symmetric sort wr.t. initial and guards detected :GovernmentCommission
Applying symmetric unfolding of full symmetric sort :GovernmentCommission domain size was 301
Symmetric sort wr.t. initial and guards and successors and join/free detected :Response
Symmetric sort wr.t. initial detected :Response
Transition SendClearanceToRel : guard parameter $r(Response:2) in guard (EQ $r 0)introduces in Response(2) partition with 2 elements
Total runtime 245884 ms.
Its-tools:
An error has occurred. See the log file
/home/mcc/BenchKit/itstools/itstools/configuration/1716648829887.log.

BK_STOP 1716649085956

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLCardinality = StateSpace ]]
+ /home/mcc/BenchKit/bin//../itstools/bin//..//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLCardinality -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L12000M1200C600P600G300"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is FamilyReunion-COL-L12000M1200C600P600G300, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r175-smll-171636280400297"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L12000M1200C600P600G300.tgz
mv FamilyReunion-COL-L12000M1200C600P600G300 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;