Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r175-smll-171636280300294.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is FamilyReunion-COL-L08000M0800C400P400G200, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r175-smll-171636280300294
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.2M
-rw-r--r-- 1 mcc users 6.1K Apr 11 20:13 CTLCardinality.txt
-rw-r--r-- 1 mcc users 60K Apr 11 20:13 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Apr 11 20:13 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Apr 11 20:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 11 20:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 146K Apr 11 20:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 11 20:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 69K Apr 11 20:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 661K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-00
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-01
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-02
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-03
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-04
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-05
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-06
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-07
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-08
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-09
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-10
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-11
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-12
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-13
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-14
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1716647958421

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FamilyReunion-COL-L08000M0800C400P400G200
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-25 14:39:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-05-25 14:39:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-25 14:39:22] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-05-25 14:39:23] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-05-25 14:39:23] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1442 ms
[2024-05-25 14:39:25] [INFO ] Detected 5 constant HL places corresponding to 2006 PT places.
[2024-05-25 14:39:25] [INFO ] Imported 104 HL places and 66 HL transitions for a total of 200760109 PT places and 1.9257647E8 transition bindings in 1622 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 67 ms.
Working with output stream class java.io.PrintStream
[2024-05-25 14:39:25] [INFO ] Built PT skeleton of HLPN with 104 places and 66 transitions 198 arcs in 196 ms.
[2024-05-25 14:39:25] [INFO ] Skeletonized 16 HLPN properties in 3 ms.
Remains 16 properties that can be checked using skeleton over-approximation.
Initial state reduction rules removed 9 formulas.
FORMULA FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Reduce places removed 5 places and 0 transitions.
Computed a total of 99 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 99 transition count 66
[2024-05-25 14:39:25] [INFO ] Flatten gal took : 60 ms
[2024-05-25 14:39:25] [INFO ] Flatten gal took : 19 ms
Transition Gate2ANDJoin forces synchronizations/join behavior on parameter l of sort LegalResident
Transition ReceiveLangChoice forces synchronizations/join behavior on parameter m of sort MICSystem
Symmetric sort wr.t. initial and guards and successors and join/free detected :CINFORMI
Symmetric sort wr.t. initial detected :CINFORMI
Symmetric sort wr.t. initial and guards detected :CINFORMI
Applying symmetric unfolding of full symmetric sort :CINFORMI domain size was 401
Transition Gate1ANDJoin forces synchronizations/join behavior on parameter p of sort PublicAdminOffice
Symmetric sort wr.t. initial and guards and successors and join/free detected :GovernmentCommission
Symmetric sort wr.t. initial detected :GovernmentCommission
Symmetric sort wr.t. initial and guards detected :GovernmentCommission
Applying symmetric unfolding of full symmetric sort :GovernmentCommission domain size was 201
Symmetric sort wr.t. initial and guards and successors and join/free detected :Response
Symmetric sort wr.t. initial detected :Response
Transition SendClearanceToRel : guard parameter $r(Response:2) in guard (EQ $r 0)introduces in Response(2) partition with 2 elements
starting LoLA
BK_INPUT FamilyReunion-COL-L08000M0800C400P400G200
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

BK_STOP 1716648087937

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type SKEL/FNDP) for 27 FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: TR BINDINGS
lola: LAUNCH task # 55 (type SKEL/EQUN) for 27 FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SKEL/SRCH) for 27 FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/SRCH) for 27 FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 58 (type SKEL/SRCH) for FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-09
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 53 (type FNDP) for FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-09 (obsolete)
lola: CANCELED task # 55 (type EQUN) for FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-09 (obsolete)
lola: CANCELED task # 57 (type SRCH) for FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-09 (obsolete)
lola: LAUNCH task # 64 (type SKEL/FNDP) for 15 FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 66 (type SKEL/EQUN) for 15 FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type SKEL/SRCH) for 15 FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SKEL/SRCH) for 15 FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 53 (type SKEL/FNDP) for FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-09
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 57 (type SKEL/SRCH) for FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-09
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: TR BINDINGS DONE
lola: Places: 200760109, Transitions: 192568469
lola: Place/transition net would exceed node limit
lola: syntax error -- aborting [#01]
lola: see manual for a documentation of this error
lola: last error message: Inappropriate ioctl for device

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-00: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-01: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-02: EF unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-03: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-04: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-05: EF unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-06: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-07: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-08: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-09: EF unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-10: EF unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-11: EF unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-12: EF unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-13: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-14: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-15: AG unknown AGGR


Time elapsed: 0 secs. Pages in use: 2
lola: FINISHED task # 64 (type SKEL/FNDP) for FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-05
lola: result : true
lola: fired transitions : 8044
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 66 (type EQUN) for FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 82 (type SRCH) for FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 83 (type SRCH) for FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-05 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-00: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-01: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-02: EF unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-03: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-04: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-05: EF unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-06: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-07: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-08: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-09: EF unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-10: EF unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-11: EF unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-12: EF unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-13: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-14: AG unknown AGGR
FamilyReunion-COL-L08000M0800C400P400G200-ReachabilityCardinality-2024-15: AG unknown AGGR


Time elapsed: 0 secs. Pages in use: 2
malloc(): unaligned tcache chunk detected
/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 440 Aborted lola --conf=$BIN_DIR/configfiles/reachabilitycardinalityconf --formula=$DIR/ReachabilityCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L08000M0800C400P400G200"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is FamilyReunion-COL-L08000M0800C400P400G200, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r175-smll-171636280300294"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L08000M0800C400P400G200.tgz
mv FamilyReunion-COL-L08000M0800C400P400G200 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;