About the Execution of LoLA for FamilyReunion-PT-L00100M0010C005P005G002
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2319.888 | 421346.00 | 1493123.00 | 430.80 | ? 101 ? 101 101 ? ? ? ? 101 1 1 ? 1 1 ? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r159-smll-171636268200509.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FamilyReunion-PT-L00100M0010C005P005G002, examination is UpperBounds
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r159-smll-171636268200509
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 37M
-rw-r--r-- 1 mcc users 461K Apr 11 21:53 CTLCardinality.txt
-rw-r--r-- 1 mcc users 2.8M Apr 11 21:53 CTLCardinality.xml
-rw-r--r-- 1 mcc users 660K Apr 11 21:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 2.3M Apr 11 21:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 149K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 584K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 407K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 1.1M Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 854K Apr 11 23:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 5.1M Apr 11 23:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 1.3M Apr 11 22:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 4.4M Apr 11 22:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 43K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 130K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 17M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of positive values
NUM_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-00
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-02
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-05
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-06
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-07
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-08
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-09
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-10
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-12
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-13
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-15
=== Now, execution of the tool begins
BK_START 1717217679549
FORMULA FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-09 101 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-10 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03 101 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01 101 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04 101 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-13 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717218100895
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mUpperBounds.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-02: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-02: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-02: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-02: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0
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[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-02: BOUND 0 0 0 0 0 0 0 0
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[[35mlola[0m][.] Time elapsed: 371 secs. Pages in use: 1
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[[35mlola[0m][I] Structural Bound for (l2_26_0 + l2_26_1 + l2_26_2 + l2_26_3 + l2_26_4 + l2_26_5 + l2_26_6 + l2_26_7 + l2_26_8 + l2_26_9 + l2_13_0 + l2_13_1 + l2_13_2 + l2_13_3 + l2_13_4 + l2_13_5 + l2_13_6 + l2_13_7 + l2_13_8 + l2_13_9 + l2_70_10 + l2_82_10 + l2_94_10 + l2_88_0 + l2_88_1 + l2_88_2 + l2_88_3 + l2_88_4 + l2_88_5 + l2_88_6 + l2_88_7 + l2_88_8 + l2_88_9 + l2_75_0 + l2_75_1 + l2_75_2 + l2_75_3 + l2_75_4 + l2_75_5 + l2_75_6 + l2_75_7 + l2_75_8 + l2_75_9 + l2_62_0 + l2_62_1 + l2_62_2 + l2_62_3 + l2_62_4 + l2_62_5 + l2_62_6 + l2_62_7 + l2_62_8 + l2_62_9 + l2_14_10 + l2_0_0 + l2_0_1 + l2_0_2 + l2_0_3 + l2_0_4 + l2_0_5 + l2_0_6 + l2_0_7 + l2_0_8 + l2_0_9 + l2_26_10 + l2_38_10 + l2_27_0 + l2_27_1 + l2_27_2 + l2_27_3 + l2_27_4 + l2_27_5 + l2_27_6 + l2_27_7 + l2_27_8 + l2_27_9 + l2_14_0 + l2_14_1 + l2_14_2 + l2_14_3 + l2_14_4 + l2_14_5 + l2_14_6 + l2_14_7 + l2_14_8 + l2_14_9 + l2_4_10 + l2_89_0 + l2_89_1 + l2_89_2 + l2_89_3 + l2_89_4 + l2_89_5 + l2_89_6 + l2_89_7 + l2_89_8 + l2_89_9 + l2_76_0 + l2_76_1 + l2_76_2 + l2_76_3 + l2_76_4 + l2_76_5 + l2_76_6 + l2_76_7 + l2_76_8 + l2_76_9 + l2_63_0 + l2_63_1 + l2_63_2 + l2_63_3 + l2_63_4 + l2_63_5 + l2_63_6 + l2_63_7 + l2_63_8 + l2_63_9 + l2_51_10 + l2_50_0 + l2_50_1 + l2_50_2 + l2_50_3 + l2_50_4 + l2_50_5 + l2_50_6 + l2_50_7 + l2_50_8 + l2_50_9 + l2_63_10 + l2_75_10 + l2_87_10 + l2_99_10 + l2_1_0 + l2_1_1 + l2_1_2 + l2_1_3 + l2_1_4 + l2_1_5 + l2_1_6 + l2_1_7 + l2_1_8 + l2_1_9 + l2_19_10 + l2_28_0 + l2_28_1 + l2_28_2 + l2_28_3 + l2_28_4 + l2_28_5 + l2_28_6 + l2_28_7 + l2_28_8 + l2_28_9 + l2_15_0 + l2_15_1 + l2_15_2 + l2_15_3 + l2_15_4 + l2_15_5 + l2_15_6 + l2_15_7 + l2_15_8 + l2_15_9 + l2_77_0 + l2_77_1 + l2_77_2 + l2_77_3 + l2_77_4 + l2_77_5 + l2_77_6 + l2_77_7 + l2_77_8 + l2_77_9 + l2_64_0 + l2_64_1 + l2_64_2 + l2_64_3 + l2_64_4 + l2_64_5 + l2_64_6 + l2_64_7 + l2_64_8 + l2_64_9 + l2_51_0 + l2_51_1 + l2_51_2 + l2_51_3 + l2_51_4 + l2_51_5 + l2_51_6 + l2_51_7 + l2_51_8 + l2_51_9 + l2_9_10 + l2_20_10 + l2_32_10 + l2_44_10 + l2_56_10 + l2_68_10 + l2_2_0 + l2_2_1 + l2_2_2 + l2_2_3 + l2_2_4 + l2_2_5 + l2_2_6 + l2_2_7 + l2_2_8 + l2_2_9 + l2_29_0 + l2_29_1 + l2_29_2 + l2_29_3 + l2_29_4 + l2_29_5 + l2_29_6 + l2_29_7 + l2_29_8 + l2_29_9 + l2_16_0 + l2_16_1 + l2_16_2 + l2_16_3 + l2_16_4 + l2_16_5 + l2_16_6 + l2_16_7 + l2_16_8 + l2_16_9 + l2_81_10 + l2_93_10 + l2_78_0 + l2_78_1 + l2_78_2 + l2_78_3 + l2_78_4 + l2_78_5 + l2_78_6 + l2_78_7 + l2_78_8 + l2_78_9 + l2_65_0 + l2_65_1 + l2_65_2 + l2_65_3 + l2_65_4 + l2_65_5 + l2_65_6 + l2_65_7 + l2_65_8 + l2_65_9 + l2_52_0 + l2_52_1 + l2_52_2 + l2_52_3 + l2_52_4 + l2_52_5 + l2_52_6 + l2_52_7 + l2_52_8 + l2_52_9 + l2_3_0 + l2_3_1 + l2_3_2 + l2_3_3 + l2_3_4 + l2_3_5 + l2_3_6 + l2_3_7 + l2_3_8 + l2_3_9 + l2_13_10 + l2_25_10 + l2_37_10 + l2_49_10 + l2_17_0 + l2_17_1 + l2_17_2 + l2_17_3 + l2_17_4 + l2_17_5 + l2_17_6 + l2_17_7 + l2_17_8 + l2_17_9 + l2_3_10 + l2_79_0 + l2_79_1 + l2_79_2 + l2_79_3 + l2_79_4 + l2_79_5 + l2_79_6 + l2_79_7 + l2_79_8 + l2_79_9 + l2_66_0 + l2_66_1 + l2_66_2 + l2_66_3 + l2_66_4 + l2_66_5 + l2_66_6 + l2_66_7 + l2_66_8 + l2_66_9 + l2_53_0 + l2_53_1 + l2_53_2 + l2_53_3 + l2_53_4 + l2_53_5 + l2_53_6 + l2_53_7 + l2_53_8 + l2_53_9 + l2_50_10 + l2_40_0 + l2_40_1 + l2_40_2 + l2_40_3 + l2_40_4 + l2_40_5 + l2_40_6 + l2_40_7 + l2_40_8 + l2_40_9 + l2_62_10 + l2_74_10 + l2_86_10 + l2_98_10 + l2_4_0 + l2_4_1 + l2_4_2 + l2_4_3 + l2_4_4 + l2_4_5 + l2_4_6 + l2_4_7 + l2_4_8 + l2_4_9 + l2_18_10 + l2_18_0 + l2_18_1 + l2_18_2 + l2_18_3 + l2_18_4 + l2_18_5 + l2_18_6 + l2_18_7 + l2_18_8 + l2_18_9 + l2_67_0 + l2_67_1 + l2_67_2 + l2_67_3 + l2_67_4 + l2_67_5 + l2_67_6 + l2_67_7 + l2_67_8 + l2_67_9 + l2_54_0 + l2_54_1 + l2_54_2 + l2_54_3 + l2_54_4 + l2_54_5 + l2_54_6 + l2_54_7 + l2_54_8 + l2_54_9 + l2_41_0 + l2_41_1 + l2_41_2 + l2_41_3 + l2_41_4 + l2_41_5 + l2_41_6 + l2_41_7 + l2_41_8 + l2_41_9 + l2_8_10 + l2_31_10 + l2_43_10 + l2_55_10 + l2_90_0 + l2_90_1 + l2_90_2 + l2_90_3 + l2_90_4 + l2_90_5 + l2_90_6 + l2_90_7 + l2_90_8 + l2_90_9 + l2_67_10 + l2_5_0 + l2_5_1 + l2_5_2 + l2_5_3 + l2_5_4 + l2_5_5 + l2_5_6 + l2_5_7 + l2_5_8 + l2_5_9 + l2_79_10 + l2_19_0 + l2_19_1 + l2_19_2 + l2_19_3 + l2_19_4 + l2_19_5 + l2_19_6 + l2_19_7 + l2_19_8 + l2_19_9 + l2_80_10 + l2_92_10 + l2_68_0 + l2_68_1 + l2_68_2 + l2_68_3 + l2_68_4 + l2_68_5 + l2_68_6 + l2_68_7 + l2_68_8 + l2_68_9 + l2_55_0 + l2_55_1 + l2_55_2 + l2_55_3 + l2_55_4 + l2_55_5 + l2_55_6 + l2_55_7 + l2_55_8 + l2_55_9 + l2_42_0 + l2_42_1 + l2_42_2 + l2_42_3 + l2_42_4 + l2_42_5 + l2_42_6 + l2_42_7 + l2_42_8 + l2_42_9 + l2_91_0 + l2_91_1 + l2_91_2 + l2_91_3 + l2_91_4 + l2_91_5 + l2_91_6 + l2_91_7 + l2_91_8 + l2_91_9 + l2_6_0 + l2_6_1 + l2_6_2 + l2_6_3 + l2_6_4 + l2_6_5 + l2_6_6 + l2_6_7 + l2_6_8 + l2_6_9 + l2_12_10 + l2_24_10 + l2_36_10 + l2_48_10 + l2_2_10 + l2_69_0 + l2_69_1 + l2_69_2 + l2_69_3 + l2_69_4 + l2_69_5 + l2_69_6 + l2_69_7 + l2_69_8 + l2_69_9 + l2_56_0 + l2_56_1 + l2_56_2 + l2_56_3 + l2_56_4 + l2_56_5 + l2_56_6 + l2_56_7 + l2_56_8 + l2_56_9 + l2_43_0 + l2_43_1 + l2_43_2 + l2_43_3 + l2_43_4 + l2_43_5 + l2_43_6 + l2_43_7 + l2_43_8 + l2_43_9 + l2_30_0 + l2_30_1 + l2_30_2 + l2_30_3 + l2_30_4 + l2_30_5 + l2_30_6 + l2_30_7 + l2_30_8 + l2_30_9 + l2_61_10 + l2_73_10 + l2_85_10 + l2_97_10 + l2_92_0 + l2_92_1 + l2_92_2 + l2_92_3 + l2_92_4 + l2_92_5 + l2_92_6 + l2_92_7 + l2_92_8 + l2_92_9 + l2_7_0 + l2_7_1 + l2_7_2 + l2_7_3 + l2_7_4 + l2_7_5 + l2_7_6 + l2_7_7 + l2_7_8 + l2_7_9 + l2_17_10 + l2_29_10 + l2_57_0 + l2_57_1 + l2_57_2 + l2_57_3 + l2_57_4 + l2_57_5 + l2_57_6 + l2_57_7 + l2_57_8 + l2_57_9 + l2_44_0 + l2_44_1 + l2_44_2 + l2_44_3 + l2_44_4 + l2_44_5 + l2_44_6 + l2_44_7 + l2_44_8 + l2_44_9 + l2_31_0 + l2_31_1 + l2_31_2 + l2_31_3 + l2_31_4 + l2_31_5 + l2_31_6 + l2_31_7 + l2_31_8 + l2_31_9 + l2_7_10 + l2_30_10 + l2_42_10 + l2_93_0 + l2_93_1 + l2_93_2 + l2_93_3 + l2_93_4 + l2_93_5 + l2_93_6 + l2_93_7 + l2_93_8 + l2_93_9 + l2_54_10 + l2_8_0 + l2_8_1 + l2_8_2 + l2_8_3 + l2_8_4 + l2_8_5 + l2_8_6 + l2_8_7 + l2_8_8 + l2_8_9 + l2_80_0 + l2_80_1 + l2_80_2 + l2_80_3 + l2_80_4 + l2_80_5 + l2_80_6 + l2_80_7 + l2_80_8 + l2_80_9 + l2_66_10 + l2_78_10 + l2_91_10 + l2_58_0 + l2_58_1 + l2_58_2 + l2_58_3 + l2_58_4 + l2_58_5 + l2_58_6 + l2_58_7 + l2_58_8 + l2_58_9 + l2_45_0 + l2_45_1 + l2_45_2 + l2_45_3 + l2_45_4 + l2_45_5 + l2_45_6 + l2_45_7 + l2_45_8 + l2_45_9 + l2_32_0 + l2_32_1 + l2_32_2 + l2_32_3 + l2_32_4 + l2_32_5 + l2_32_6 + l2_32_7 + l2_32_8 + l2_32_9 + l2_94_0 + l2_94_1 + l2_94_2 + l2_94_3 + l2_94_4 + l2_94_5 + l2_94_6 + l2_94_7 + l2_94_8 + l2_94_9 + l2_9_0 + l2_9_1 + l2_9_2 + l2_9_3 + l2_9_4 + l2_9_5 + l2_9_6 + l2_9_7 + l2_9_8 + l2_9_9 + l2_81_0 + l2_81_1 + l2_81_2 + l2_81_3 + l2_81_4 + l2_81_5 + l2_81_6 + l2_81_7 + l2_81_8 + l2_81_9 + l2_11_10 + l2_23_10 + l2_35_10 + l2_47_10 + l2_59_10 + l2_1_10 + l2_59_0 + l2_59_1 + l2_59_2 + l2_59_3 + l2_59_4 + l2_59_5 + l2_59_6 + l2_59_7 + l2_59_8 + l2_59_9 + l2_46_0 + l2_46_1 + l2_46_2 + l2_46_3 + l2_46_4 + l2_46_5 + l2_46_6 + l2_46_7 + l2_46_8 + l2_46_9 + l2_33_0 + l2_33_1 + l2_33_2 + l2_33_3 + l2_33_4 + l2_33_5 + l2_33_6 + l2_33_7 + l2_33_8 + l2_33_9 + l2_20_0 + l2_20_1 + l2_20_2 + l2_20_3 + l2_20_4 + l2_20_5 + l2_20_6 + l2_20_7 + l2_20_8 + l2_20_9 + l2_60_10 + l2_72_10 + l2_84_10 + l2_96_10 + l2_95_0 + l2_95_1 + l2_95_2 + l2_95_3 + l2_95_4 + l2_95_5 + l2_95_6 + l2_95_7 + l2_95_8 + l2_95_9 + l2_82_0 + l2_82_1 + l2_82_2 + l2_82_3 + l2_82_4 + l2_82_5 + l2_82_6 + l2_82_7 + l2_82_8 + l2_82_9 + l2_16_10 + l2_28_10 + l2_47_0 + l2_47_1 + l2_47_2 + l2_47_3 + l2_47_4 + l2_47_5 + l2_47_6 + l2_47_7 + l2_47_8 + l2_47_9 + l2_34_0 + l2_34_1 + l2_34_2 + l2_34_3 + l2_34_4 + l2_34_5 + l2_34_6 + l2_34_7 + l2_34_8 + l2_34_9 + l2_21_0 + l2_21_1 + l2_21_2 + l2_21_3 + l2_21_4 + l2_21_5 + l2_21_6 + l2_21_7 + l2_21_8 + l2_21_9 + l2_6_10 + l2_96_0 + l2_96_1 + l2_96_2 + l2_96_3 + l2_96_4 + l2_96_5 + l2_96_6 + l2_96_7 + l2_96_8 + l2_96_9 + l2_41_10 + l2_83_0 + l2_83_1 + l2_83_2 + l2_83_3 + l2_83_4 + l2_83_5 + l2_83_6 + l2_83_7 + l2_83_8 + l2_83_9 + l2_53_10 + l2_70_0 + l2_70_1 + l2_70_2 + l2_70_3 + l2_70_4 + l2_70_5 + l2_70_6 + l2_70_7 + l2_70_8 + l2_70_9 + l2_65_10 + l2_77_10 + l2_89_10 + l2_100_10 + l2_90_10 + l2_48_0 + l2_48_1 + l2_48_2 + l2_48_3 + l2_48_4 + l2_48_5 + l2_48_6 + l2_48_7 + l2_48_8 + l2_48_9 + l2_35_0 + l2_35_1 + l2_35_2 + l2_35_3 + l2_35_4 + l2_35_5 + l2_35_6 + l2_35_7 + l2_35_8 + l2_35_9 + l2_22_0 + l2_22_1 + l2_22_2 + l2_22_3 + l2_22_4 + l2_22_5 + l2_22_6 + l2_22_7 + l2_22_8 + l2_22_9 + l2_97_0 + l2_97_1 + l2_97_2 + l2_97_3 + l2_97_4 + l2_97_5 + l2_97_6 + l2_97_7 + l2_97_8 + l2_97_9 + l2_84_0 + l2_84_1 + l2_84_2 + l2_84_3 + l2_84_4 + l2_84_5 + l2_84_6 + l2_84_7 + l2_84_8 + l2_84_9 + l2_71_0 + l2_71_1 + l2_71_2 + l2_71_3 + l2_71_4 + l2_71_5 + l2_71_6 + l2_71_7 + l2_71_8 + l2_71_9 + l2_10_10 + l2_22_10 + l2_34_10 + l2_46_10 + l2_58_10 + l2_0_10 + l2_49_0 + l2_49_1 + l2_49_2 + l2_49_3 + l2_49_4 + l2_49_5 + l2_49_6 + l2_49_7 + l2_49_8 + l2_49_9 + l2_36_0 + l2_36_1 + l2_36_2 + l2_36_3 + l2_36_4 + l2_36_5 + l2_36_6 + l2_36_7 + l2_36_8 + l2_36_9 + l2_23_0 + l2_23_1 + l2_23_2 + l2_23_3 + l2_23_4 + l2_23_5 + l2_23_6 + l2_23_7 + l2_23_8 + l2_23_9 + l2_10_0 + l2_10_1 + l2_10_2 + l2_10_3 + l2_10_4 + l2_10_5 + l2_10_6 + l2_10_7 + l2_10_8 + l2_10_9 + l2_71_10 + l2_83_10 + l2_95_10 + l2_98_0 + l2_98_1 + l2_98_2 + l2_98_3 + l2_98_4 + l2_98_5 + l2_98_6 + l2_98_7 + l2_98_8 + l2_98_9 + l2_85_0 + l2_85_1 + l2_85_2 + l2_85_3 + l2_85_4 + l2_85_5 + l2_85_6 + l2_85_7 + l2_85_8 + l2_85_9 + l2_72_0 + l2_72_1 + l2_72_2 + l2_72_3 + l2_72_4 + l2_72_5 + l2_72_6 + l2_72_7 + l2_72_8 + l2_72_9 + l2_15_10 + l2_27_10 + l2_39_10 + l2_37_0 + l2_37_1 + l2_37_2 + l2_37_3 + l2_37_4 + l2_37_5 + l2_37_6 + l2_37_7 + l2_37_8 + l2_37_9 + l2_24_0 + l2_24_1 + l2_24_2 + l2_24_3 + l2_24_4 + l2_24_5 + l2_24_6 + l2_24_7 + l2_24_8 + l2_24_9 + l2_11_0 + l2_11_1 + l2_11_2 + l2_11_3 + l2_11_4 + l2_11_5 + l2_11_6 + l2_11_7 + l2_11_8 + l2_11_9 + l2_5_10 + l2_99_0 + l2_99_1 + l2_99_2 + l2_99_3 + l2_99_4 + l2_99_5 + l2_99_6 + l2_99_7 + l2_99_8 + l2_99_9 + l2_86_0 + l2_86_1 + l2_86_2 + l2_86_3 + l2_86_4 + l2_86_5 + l2_86_6 + l2_86_7 + l2_86_8 + l2_86_9 + l2_40_10 + l2_73_0 + l2_73_1 + l2_73_2 + l2_73_3 + l2_73_4 + l2_73_5 + l2_73_6 + l2_73_7 + l2_73_8 + l2_73_9 + l2_52_10 + l2_60_0 + l2_60_1 + l2_60_2 + l2_60_3 + l2_60_4 + l2_60_5 + l2_60_6 + l2_60_7 + l2_60_8 + l2_60_9 + l2_64_10 + l2_76_10 + l2_88_10 + l2_38_0 + l2_38_1 + l2_38_2 + l2_38_3 + l2_38_4 + l2_38_5 + l2_38_6 + l2_38_7 + l2_38_8 + l2_38_9 + l2_25_0 + l2_25_1 + l2_25_2 + l2_25_3 + l2_25_4 + l2_25_5 + l2_25_6 + l2_25_7 + l2_25_8 + l2_25_9 + l2_12_0 + l2_12_1 + l2_12_2 + l2_12_3 + l2_12_4 + l2_12_5 + l2_12_6 + l2_12_7 + l2_12_8 + l2_12_9 + l2_87_0 + l2_87_1 + l2_87_2 + l2_87_3 + l2_87_4 + l2_87_5 + l2_87_6 + l2_87_7 + l2_87_8 + l2_87_9 + l2_74_0 + l2_74_1 + l2_74_2 + l2_74_3 + l2_74_4 + l2_74_5 + l2_74_6 + l2_74_7 + l2_74_8 + l2_74_9 + l2_61_0 + l2_61_1 + l2_61_2 + l2_61_3 + l2_61_4 + l2_61_5 + l2_61_6 + l2_61_7 + l2_61_8 + l2_61_9 + l2_21_10 + l2_33_10 + l2_45_10 + l2_57_10 + l2_69_10 + l2_100_0 + l2_100_1 + l2_100_2 + l2_100_3 + l2_100_4 + l2_100_5 + l2_100_6 + l2_100_7 + l2_100_8 + l2_100_9 + l2_39_0 + l2_39_1 + l2_39_2 + l2_39_3 + l2_39_4 + l2_39_5 + l2_39_6 + l2_39_7 + l2_39_8 + l2_39_9 <= 0) is 101
[[35mlola[0m][I] LAUNCH task # 56 (type EXCL) for 9 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03
[[35mlola[0m][I] time limit : 230 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 54 (type FNDP) for 9 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 55 (type EQUN) for 9 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] Structural@Findpath: 101 (upper 101 threshold 0
[[35mlola[0m][I] FINISHED task # 54 (type FNDP) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 1
[[35mlola[0m][W] CANCELED task # 55 (type EQUN) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03 (obsolete)
[[35mlola[0m][W] CANCELED task # 56 (type EXCL) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03 (obsolete)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03: BOUND 101 findpath[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-09: BOUND 101 state space[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-10: BOUND 1 state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
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[[35mlola[0m][.] Time elapsed: 376 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 55 (type EQUN) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] Structural Bound for (m1_43_0 + m1_43_1 + m1_43_2 + m1_43_3 + m1_43_4 + m1_43_5 + m1_43_6 + m1_43_7 + m1_43_8 + m1_43_9 + m1_30_0 + m1_30_1 + m1_30_2 + m1_30_3 + m1_30_4 + m1_30_5 + m1_30_6 + m1_30_7 + m1_30_8 + m1_30_9 + m1_92_0 + m1_92_1 + m1_92_2 + m1_92_3 + m1_92_4 + m1_92_5 + m1_92_6 + m1_92_7 + m1_92_8 + m1_92_9 + m1_50_10 + m1_62_10 + m1_74_10 + m1_86_10 + m1_98_10 + m1_0_0 + m1_0_1 + m1_0_2 + m1_0_3 + m1_0_4 + m1_0_5 + m1_0_6 + m1_0_7 + m1_0_8 + m1_0_9 + m1_57_0 + m1_57_1 + m1_57_2 + m1_57_3 + m1_57_4 + m1_57_5 + m1_57_6 + m1_57_7 + m1_57_8 + m1_57_9 + m1_44_0 + m1_44_1 + m1_44_2 + m1_44_3 + m1_44_4 + m1_44_5 + m1_44_6 + m1_44_7 + m1_44_8 + m1_44_9 + m1_31_0 + m1_31_1 + m1_31_2 + m1_31_3 + m1_31_4 + m1_31_5 + m1_31_6 + m1_31_7 + m1_31_8 + m1_31_9 + m1_18_10 + m1_7_10 + m1_93_0 + m1_93_1 + m1_93_2 + m1_93_3 + m1_93_4 + m1_93_5 + m1_93_6 + m1_93_7 + m1_93_8 + m1_93_9 + m1_80_0 + m1_80_1 + m1_80_2 + m1_80_3 + m1_80_4 + m1_80_5 + m1_80_6 + m1_80_7 + m1_80_8 + m1_80_9 + m1_31_10 + m1_43_10 + m1_55_10 + m1_67_10 + m1_79_10 + m1_1_0 + m1_1_1 + m1_1_2 + m1_1_3 + m1_1_4 + m1_1_5 + m1_1_6 + m1_1_7 + m1_1_8 + m1_1_9 + m1_58_0 + m1_58_1 + m1_58_2 + m1_58_3 + m1_58_4 + m1_58_5 + m1_58_6 + m1_58_7 + m1_58_8 + m1_58_9 + m1_45_0 + m1_45_1 + m1_45_2 + m1_45_3 + m1_45_4 + m1_45_5 + m1_45_6 + m1_45_7 + m1_45_8 + m1_45_9 + m1_32_0 + m1_32_1 + m1_32_2 + m1_32_3 + m1_32_4 + m1_32_5 + m1_32_6 + m1_32_7 + m1_32_8 + m1_32_9 + m1_94_0 + m1_94_1 + m1_94_2 + m1_94_3 + m1_94_4 + m1_94_5 + m1_94_6 + m1_94_7 + m1_94_8 + m1_94_9 + m1_81_0 + m1_81_1 + m1_81_2 + m1_81_3 + m1_81_4 + m1_81_5 + m1_81_6 + m1_81_7 + m1_81_8 + m1_81_9 + m1_80_10 + m1_92_10 + m1_2_0 + m1_2_1 + m1_2_2 + m1_2_3 + m1_2_4 + m1_2_5 + m1_2_6 + m1_2_7 + m1_2_8 + m1_2_9 + m1_12_10 + m1_1_10 + m1_24_10 + m1_36_10 + m1_59_0 + m1_59_1 + m1_59_2 + m1_59_3 + m1_59_4 + m1_59_5 + m1_59_6 + m1_59_7 + m1_59_8 + m1_59_9 + m1_48_10 + m1_46_0 + m1_46_1 + m1_46_2 + m1_46_3 + m1_46_4 + m1_46_5 + m1_46_6 + m1_46_7 + m1_46_8 + m1_46_9 + m1_33_0 + m1_33_1 + m1_33_2 + m1_33_3 + m1_33_4 + m1_33_5 + m1_33_6 + m1_33_7 + m1_33_8 + m1_33_9 + m1_20_0 + m1_20_1 + m1_20_2 + m1_20_3 + m1_20_4 + m1_20_5 + m1_20_6 + m1_20_7 + m1_20_8 + m1_20_9 + m1_95_0 + m1_95_1 + m1_95_2 + m1_95_3 + m1_95_4 + m1_95_5 + m1_95_6 + m1_95_7 + m1_95_8 + m1_95_9 + m1_82_0 + m1_82_1 + m1_82_2 + m1_82_3 + m1_82_4 + m1_82_5 + m1_82_6 + m1_82_7 + m1_82_8 + m1_82_9 + m1_61_10 + m1_73_10 + m1_85_10 + m1_97_10 + m1_3_0 + m1_3_1 + m1_3_2 + m1_3_3 + m1_3_4 + m1_3_5 + m1_3_6 + m1_3_7 + m1_3_8 + m1_3_9 + m1_47_0 + m1_47_1 + m1_47_2 + m1_47_3 + m1_47_4 + m1_47_5 + m1_47_6 + m1_47_7 + m1_47_8 + m1_47_9 + m1_34_0 + m1_34_1 + m1_34_2 + m1_34_3 + m1_34_4 + m1_34_5 + m1_34_6 + m1_34_7 + m1_34_8 + m1_34_9 + m1_21_0 + m1_21_1 + m1_21_2 + m1_21_3 + m1_21_4 + m1_21_5 + m1_21_6 + m1_21_7 + m1_21_8 + m1_21_9 + m1_17_10 + m1_6_10 + m1_29_10 + m1_96_0 + m1_96_1 + m1_96_2 + m1_96_3 + m1_96_4 + m1_96_5 + m1_96_6 + m1_96_7 + m1_96_8 + m1_96_9 + m1_83_0 + m1_83_1 + m1_83_2 + m1_83_3 + m1_83_4 + m1_83_5 + m1_83_6 + m1_83_7 + m1_83_8 + m1_83_9 + m1_70_0 + m1_70_1 + m1_70_2 + m1_70_3 + m1_70_4 + m1_70_5 + m1_70_6 + m1_70_7 + m1_70_8 + m1_70_9 + m1_30_10 + m1_42_10 + m1_54_10 + m1_66_10 + m1_78_10 + m1_4_0 + m1_4_1 + m1_4_2 + m1_4_3 + m1_4_4 + m1_4_5 + m1_4_6 + m1_4_7 + m1_4_8 + m1_4_9 + m1_48_0 + m1_48_1 + m1_48_2 + m1_48_3 + m1_48_4 + m1_48_5 + m1_48_6 + m1_48_7 + m1_48_8 + m1_48_9 + m1_35_0 + m1_35_1 + m1_35_2 + m1_35_3 + m1_35_4 + m1_35_5 + m1_35_6 + m1_35_7 + m1_35_8 + m1_35_9 + m1_22_0 + m1_22_1 + m1_22_2 + m1_22_3 + m1_22_4 + m1_22_5 + m1_22_6 + m1_22_7 + m1_22_8 + m1_22_9 + m1_97_0 + m1_97_1 + m1_97_2 + m1_97_3 + m1_97_4 + m1_97_5 + m1_97_6 + m1_97_7 + m1_97_8 + m1_97_9 + m1_84_0 + m1_84_1 + m1_84_2 + m1_84_3 + m1_84_4 + m1_84_5 + m1_84_6 + m1_84_7 + m1_84_8 + m1_84_9 + m1_71_0 + m1_71_1 + m1_71_2 + m1_71_3 + m1_71_4 + m1_71_5 + m1_71_6 + m1_71_7 + m1_71_8 + m1_71_9 + m1_91_10 + m1_5_0 + m1_5_1 + m1_5_2 + m1_5_3 + m1_5_4 + m1_5_5 + m1_5_6 + m1_5_7 + m1_5_8 + m1_5_9 + m1_11_10 + m1_0_10 + m1_23_10 + m1_35_10 + m1_49_0 + m1_49_1 + m1_49_2 + m1_49_3 + m1_49_4 + m1_49_5 + m1_49_6 + m1_49_7 + m1_49_8 + m1_49_9 + m1_47_10 + m1_36_0 + m1_36_1 + m1_36_2 + m1_36_3 + m1_36_4 + m1_36_5 + m1_36_6 + m1_36_7 + m1_36_8 + m1_36_9 + m1_59_10 + m1_23_0 + m1_23_1 + m1_23_2 + m1_23_3 + m1_23_4 + m1_23_5 + m1_23_6 + m1_23_7 + m1_23_8 + m1_23_9 + m1_10_0 + m1_10_1 + m1_10_2 + m1_10_3 + m1_10_4 + m1_10_5 + m1_10_6 + m1_10_7 + m1_10_8 + m1_10_9 + m1_98_0 + m1_98_1 + m1_98_2 + m1_98_3 + m1_98_4 + m1_98_5 + m1_98_6 + m1_98_7 + m1_98_8 + m1_98_9 + m1_85_0 + m1_85_1 + m1_85_2 + m1_85_3 + m1_85_4 + m1_85_5 + m1_85_6 + m1_85_7 + m1_85_8 + m1_85_9 + m1_72_0 + m1_72_1 + m1_72_2 + m1_72_3 + m1_72_4 + m1_72_5 + m1_72_6 + m1_72_7 + m1_72_8 + m1_72_9 + m1_60_10 + m1_72_10 + m1_84_10 + m1_96_10 + m1_6_0 + m1_6_1 + m1_6_2 + m1_6_3 + m1_6_4 + m1_6_5 + m1_6_6 + m1_6_7 + m1_6_8 + m1_6_9 + m1_37_0 + m1_37_1 + m1_37_2 + m1_37_3 + m1_37_4 + m1_37_5 + m1_37_6 + m1_37_7 + m1_37_8 + m1_37_9 + m1_24_0 + m1_24_1 + m1_24_2 + m1_24_3 + m1_24_4 + m1_24_5 + m1_24_6 + m1_24_7 + m1_24_8 + m1_24_9 + m1_11_0 + m1_11_1 + m1_11_2 + m1_11_3 + m1_11_4 + m1_11_5 + m1_11_6 + m1_11_7 + m1_11_8 + m1_11_9 + m1_16_10 + m1_5_10 + m1_28_10 + m1_99_0 + m1_99_1 + m1_99_2 + m1_99_3 + m1_99_4 + m1_99_5 + m1_99_6 + m1_99_7 + m1_99_8 + m1_99_9 + m1_86_0 + m1_86_1 + m1_86_2 + m1_86_3 + m1_86_4 + m1_86_5 + m1_86_6 + m1_86_7 + m1_86_8 + m1_86_9 + m1_73_0 + m1_73_1 + m1_73_2 + m1_73_3 + m1_73_4 + m1_73_5 + m1_73_6 + m1_73_7 + m1_73_8 + m1_73_9 + m1_60_0 + m1_60_1 + m1_60_2 + m1_60_3 + m1_60_4 + m1_60_5 + m1_60_6 + m1_60_7 + m1_60_8 + m1_60_9 + m1_41_10 + m1_53_10 + m1_7_0 + m1_7_1 + m1_7_2 + m1_7_3 + m1_7_4 + m1_7_5 + m1_7_6 + m1_7_7 + m1_7_8 + m1_7_9 + m1_65_10 + m1_77_10 + m1_89_10 + m1_38_0 + m1_38_1 + m1_38_2 + m1_38_3 + m1_38_4 + m1_38_5 + m1_38_6 + m1_38_7 + m1_38_8 + m1_38_9 + m1_25_0 + m1_25_1 + m1_25_2 + m1_25_3 + m1_25_4 + m1_25_5 + m1_25_6 + m1_25_7 + m1_25_8 + m1_25_9 + m1_12_0 + m1_12_1 + m1_12_2 + m1_12_3 + m1_12_4 + m1_12_5 + m1_12_6 + m1_12_7 + m1_12_8 + m1_12_9 + m1_87_0 + m1_87_1 + m1_87_2 + m1_87_3 + m1_87_4 + m1_87_5 + m1_87_6 + m1_87_7 + m1_87_8 + m1_87_9 + m1_74_0 + m1_74_1 + m1_74_2 + m1_74_3 + m1_74_4 + m1_74_5 + m1_74_6 + m1_74_7 + m1_74_8 + m1_74_9 + m1_61_0 + m1_61_1 + m1_61_2 + m1_61_3 + m1_61_4 + m1_61_5 + m1_61_6 + m1_61_7 + m1_61_8 + m1_61_9 + m1_90_10 + m1_8_0 + m1_8_1 + m1_8_2 + m1_8_3 + m1_8_4 + m1_8_5 + m1_8_6 + m1_8_7 + m1_8_8 + m1_8_9 + m1_10_10 + m1_22_10 + m1_34_10 + m1_39_0 + m1_39_1 + m1_39_2 + m1_39_3 + m1_39_4 + m1_39_5 + m1_39_6 + m1_39_7 + m1_39_8 + m1_39_9 + m1_46_10 + m1_26_0 + m1_26_1 + m1_26_2 + m1_26_3 + m1_26_4 + m1_26_5 + m1_26_6 + m1_26_7 + m1_26_8 + m1_26_9 + m1_58_10 + m1_13_0 + m1_13_1 + m1_13_2 + m1_13_3 + m1_13_4 + m1_13_5 + m1_13_6 + m1_13_7 + m1_13_8 + m1_13_9 + m1_88_0 + m1_88_1 + m1_88_2 + m1_88_3 + m1_88_4 + m1_88_5 + m1_88_6 + m1_88_7 + m1_88_8 + m1_88_9 + m1_75_0 + m1_75_1 + m1_75_2 + m1_75_3 + m1_75_4 + m1_75_5 + m1_75_6 + m1_75_7 + m1_75_8 + m1_75_9 + m1_62_0 + m1_62_1 + m1_62_2 + m1_62_3 + m1_62_4 + m1_62_5 + m1_62_6 + m1_62_7 + m1_62_8 + m1_62_9 + m1_71_10 + m1_83_10 + m1_95_10 + m1_9_0 + m1_9_1 + m1_9_2 + m1_9_3 + m1_9_4 + m1_9_5 + m1_9_6 + m1_9_7 + m1_9_8 + m1_9_9 + m1_27_0 + m1_27_1 + m1_27_2 + m1_27_3 + m1_27_4 + m1_27_5 + m1_27_6 + m1_27_7 + m1_27_8 + m1_27_9 + m1_14_0 + m1_14_1 + m1_14_2 + m1_14_3 + m1_14_4 + m1_14_5 + m1_14_6 + m1_14_7 + m1_14_8 + m1_14_9 + m1_15_10 + m1_4_10 + m1_27_10 + m1_39_10 + m1_89_0 + m1_89_1 + m1_89_2 + m1_89_3 + m1_89_4 + m1_89_5 + m1_89_6 + m1_89_7 + m1_89_8 + m1_89_9 + m1_76_0 + m1_76_1 + m1_76_2 + m1_76_3 + m1_76_4 + m1_76_5 + m1_76_6 + m1_76_7 + m1_76_8 + m1_76_9 + m1_63_0 + m1_63_1 + m1_63_2 + m1_63_3 + m1_63_4 + m1_63_5 + m1_63_6 + m1_63_7 + m1_63_8 + m1_63_9 + m1_50_0 + m1_50_1 + m1_50_2 + m1_50_3 + m1_50_4 + m1_50_5 + m1_50_6 + m1_50_7 + m1_50_8 + m1_50_9 + m1_40_10 + m1_52_10 + m1_64_10 + m1_76_10 + m1_88_10 + m1_28_0 + m1_28_1 + m1_28_2 + m1_28_3 + m1_28_4 + m1_28_5 + m1_28_6 + m1_28_7 + m1_28_8 + m1_28_9 + m1_15_0 + m1_15_1 + m1_15_2 + m1_15_3 + m1_15_4 + m1_15_5 + m1_15_6 + m1_15_7 + m1_15_8 + m1_15_9 + m1_77_0 + m1_77_1 + m1_77_2 + m1_77_3 + m1_77_4 + m1_77_5 + m1_77_6 + m1_77_7 + m1_77_8 + m1_77_9 + m1_64_0 + m1_64_1 + m1_64_2 + m1_64_3 + m1_64_4 + m1_64_5 + m1_64_6 + m1_64_7 + m1_64_8 + m1_64_9 + m1_51_0 + m1_51_1 + m1_51_2 + m1_51_3 + m1_51_4 + m1_51_5 + m1_51_6 + m1_51_7 + m1_51_8 + m1_51_9 + m1_9_10 + m1_21_10 + m1_33_10 + m1_29_0 + m1_29_1 + m1_29_2 + m1_29_3 + m1_29_4 + m1_29_5 + m1_29_6 + m1_29_7 + m1_29_8 + m1_29_9 + m1_45_10 + m1_16_0 + m1_16_1 + m1_16_2 + m1_16_3 + m1_16_4 + m1_16_5 + m1_16_6 + m1_16_7 + m1_16_8 + m1_16_9 + m1_57_10 + m1_69_10 + m1_100_0 + m1_100_1 + m1_100_2 + m1_100_3 + m1_100_4 + m1_100_5 + m1_100_6 + m1_100_7 + m1_100_8 + m1_100_9 + m1_78_0 + m1_78_1 + m1_78_2 + m1_78_3 + m1_78_4 + m1_78_5 + m1_78_6 + m1_78_7 + m1_78_8 + m1_78_9 + m1_65_0 + m1_65_1 + m1_65_2 + m1_65_3 + m1_65_4 + m1_65_5 + m1_65_6 + m1_65_7 + m1_65_8 + m1_65_9 + m1_52_0 + m1_52_1 + m1_52_2 + m1_52_3 + m1_52_4 + m1_52_5 + m1_52_6 + m1_52_7 + m1_52_8 + m1_52_9 + m1_70_10 + m1_82_10 + m1_94_10 + m1_100_10 + m1_17_0 + m1_17_1 + m1_17_2 + m1_17_3 + m1_17_4 + m1_17_5 + m1_17_6 + m1_17_7 + m1_17_8 + m1_17_9 + m1_14_10 + m1_3_10 + m1_26_10 + m1_38_10 + m1_79_0 + m1_79_1 + m1_79_2 + m1_79_3 + m1_79_4 + m1_79_5 + m1_79_6 + m1_79_7 + m1_79_8 + m1_79_9 + m1_66_0 + m1_66_1 + m1_66_2 + m1_66_3 + m1_66_4 + m1_66_5 + m1_66_6 + m1_66_7 + m1_66_8 + m1_66_9 + m1_53_0 + m1_53_1 + m1_53_2 + m1_53_3 + m1_53_4 + m1_53_5 + m1_53_6 + m1_53_7 + m1_53_8 + m1_53_9 + m1_40_0 + m1_40_1 + m1_40_2 + m1_40_3 + m1_40_4 + m1_40_5 + m1_40_6 + m1_40_7 + m1_40_8 + m1_40_9 + m1_51_10 + m1_63_10 + m1_75_10 + m1_87_10 + m1_99_10 + m1_18_0 + m1_18_1 + m1_18_2 + m1_18_3 + m1_18_4 + m1_18_5 + m1_18_6 + m1_18_7 + m1_18_8 + m1_18_9 + m1_67_0 + m1_67_1 + m1_67_2 + m1_67_3 + m1_67_4 + m1_67_5 + m1_67_6 + m1_67_7 + m1_67_8 + m1_67_9 + m1_54_0 + m1_54_1 + m1_54_2 + m1_54_3 + m1_54_4 + m1_54_5 + m1_54_6 + m1_54_7 + m1_54_8 + m1_54_9 + m1_41_0 + m1_41_1 + m1_41_2 + m1_41_3 + m1_41_4 + m1_41_5 + m1_41_6 + m1_41_7 + m1_41_8 + m1_41_9 + m1_19_10 + m1_8_10 + m1_90_0 + m1_90_1 + m1_90_2 + m1_90_3 + m1_90_4 + m1_90_5 + m1_90_6 + m1_90_7 + m1_90_8 + m1_90_9 + m1_20_10 + m1_32_10 + m1_19_0 + m1_19_1 + m1_19_2 + m1_19_3 + m1_19_4 + m1_19_5 + m1_19_6 + m1_19_7 + m1_19_8 + m1_19_9 + m1_44_10 + m1_56_10 + m1_68_10 + m1_68_0 + m1_68_1 + m1_68_2 + m1_68_3 + m1_68_4 + m1_68_5 + m1_68_6 + m1_68_7 + m1_68_8 + m1_68_9 + m1_55_0 + m1_55_1 + m1_55_2 + m1_55_3 + m1_55_4 + m1_55_5 + m1_55_6 + m1_55_7 + m1_55_8 + m1_55_9 + m1_42_0 + m1_42_1 + m1_42_2 + m1_42_3 + m1_42_4 + m1_42_5 + m1_42_6 + m1_42_7 + m1_42_8 + m1_42_9 + m1_91_0 + m1_91_1 + m1_91_2 + m1_91_3 + m1_91_4 + m1_91_5 + m1_91_6 + m1_91_7 + m1_91_8 + m1_91_9 + m1_81_10 + m1_93_10 + m1_13_10 + m1_2_10 + m1_25_10 + m1_37_10 + m1_69_0 + m1_69_1 + m1_69_2 + m1_69_3 + m1_69_4 + m1_69_5 + m1_69_6 + m1_69_7 + m1_69_8 + m1_69_9 + m1_49_10 + m1_56_0 + m1_56_1 + m1_56_2 + m1_56_3 + m1_56_4 + m1_56_5 + m1_56_6 + m1_56_7 + m1_56_8 + m1_56_9 <= 0) is 101
[[35mlola[0m][I] LAUNCH task # 59 (type EXCL) for 3 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01
[[35mlola[0m][I] time limit : 247 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 57 (type FNDP) for 3 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 58 (type EQUN) for 3 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] Structural@Findpath: 101 (upper 101 threshold 0
[[35mlola[0m][I] FINISHED task # 57 (type FNDP) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][W] CANCELED task # 58 (type EQUN) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01 (obsolete)
[[35mlola[0m][W] CANCELED task # 59 (type EXCL) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01 (obsolete)
[[35mlola[0m][I] FINISHED task # 58 (type EQUN) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01: BOUND 101 findpath[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03: BOUND 101 findpath[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-09: BOUND 101 state space[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-10: BOUND 1 state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 381 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] Structural Bound for (l5_29_9 <= 0) is 1
[[35mlola[0m][I] LAUNCH task # 62 (type EXCL) for 42 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14
[[35mlola[0m][I] time limit : 268 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 60 (type FNDP) for 42 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 61 (type EQUN) for 42 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 62 (type EXCL) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 60 (type FNDP) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14 (obsolete)
[[35mlola[0m][W] CANCELED task # 61 (type EQUN) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14 (obsolete)
[[35mlola[0m][I] Structural@Findpath: 1 (upper 1 threshold 0
[[35mlola[0m][I] FINISHED task # 60 (type FNDP) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] FINISHED task # 61 (type EQUN) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01: BOUND 101 findpath[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03: BOUND 101 findpath[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-09: BOUND 101 state space[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-10: BOUND 1 state space[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14: BOUND 1 state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 386 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] Structural Bound for (c1_0 + c1_1 + c1_2 + c1_3 + c1_4 + c1_5 <= 0) is 101
[[35mlola[0m][I] LAUNCH task # 65 (type EXCL) for 12 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04
[[35mlola[0m][I] time limit : 291 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 63 (type FNDP) for 12 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 64 (type EQUN) for 12 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] Structural@Findpath: 101 (upper 101 threshold 0
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01: BOUND 101 findpath[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03: BOUND 101 findpath[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-09: BOUND 101 state space[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-10: BOUND 1 state space[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14: BOUND 1 state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04: BOUND 0 0 3 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 BOUND FNDP 1/3210 0/5 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04 1 attempts, .
[[35mlola[0m][.] 64 BOUND STEQ 1/3210 0/5 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04 --
[[35mlola[0m][.] 65 BOUND EXCL 1/291 1/2000 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04 173 m, 34 m/sec, 172 t fired, result in [14,101] .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 391 secs. Pages in use: 1
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[[35mlola[0m][I] FINISHED task # 63 (type FNDP) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 3
[[35mlola[0m][W] CANCELED task # 64 (type EQUN) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04 (obsolete)
[[35mlola[0m][W] CANCELED task # 65 (type EXCL) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04 (obsolete)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-01: BOUND 101 findpath[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-03: BOUND 101 findpath[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-04: BOUND 101 findpath[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-09: BOUND 101 state space[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-10: BOUND 1 state space[0m
[[35mlola[0m][.] [1m[33mFamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-14: BOUND 1 state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 396 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] Structural Bound for (l14_11 <= 0) is 1
[[35mlola[0m][I] LAUNCH task # 68 (type EXCL) for 33 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11
[[35mlola[0m][I] time limit : 320 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 66 (type FNDP) for 33 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 67 (type EQUN) for 33 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 68 (type EXCL) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 11
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][W] CANCELED task # 66 (type FNDP) for FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-11 (obsolete)
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[[35mlola[0m][I] LAUNCH task # 71 (type EXCL) for 39 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-13
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[[35mlola[0m][I] LAUNCH task # 69 (type FNDP) for 39 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-13
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[[35mlola[0m][I] LAUNCH task # 70 (type EQUN) for 39 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-13
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[[35mlola[0m][I] LAUNCH task # 74 (type EXCL) for 36 FamilyReunion-PT-L00100M0010C005P005G002-UpperBounds-12
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 410 Segmentation fault $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-PT-L00100M0010C005P005G002"
export BK_EXAMINATION="UpperBounds"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FamilyReunion-PT-L00100M0010C005P005G002, examination is UpperBounds"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r159-smll-171636268200509"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-PT-L00100M0010C005P005G002.tgz
mv FamilyReunion-PT-L00100M0010C005P005G002 execution
cd execution
if [ "UpperBounds" = "ReachabilityDeadlock" ] || [ "UpperBounds" = "UpperBounds" ] || [ "UpperBounds" = "QuasiLiveness" ] || [ "UpperBounds" = "StableMarking" ] || [ "UpperBounds" = "Liveness" ] || [ "UpperBounds" = "OneSafe" ] || [ "UpperBounds" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "UpperBounds" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "UpperBounds" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "UpperBounds.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property UpperBounds.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "UpperBounds.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "UpperBounds" = "ReachabilityDeadlock" ] || [ "UpperBounds" = "QuasiLiveness" ] || [ "UpperBounds" = "StableMarking" ] || [ "UpperBounds" = "Liveness" ] || [ "UpperBounds" = "OneSafe" ] ; then
echo "FORMULA_NAME UpperBounds"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;