About the Execution of LoLA for FamilyReunion-PT-L00100M0010C005P005G002
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16203.115 | 1976111.00 | 7436334.00 | 699.30 | ????T??????F???? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r159-smll-171636268200506.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FamilyReunion-PT-L00100M0010C005P005G002, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r159-smll-171636268200506
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 37M
-rw-r--r-- 1 mcc users 461K Apr 11 21:53 CTLCardinality.txt
-rw-r--r-- 1 mcc users 2.8M Apr 11 21:53 CTLCardinality.xml
-rw-r--r-- 1 mcc users 660K Apr 11 21:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 2.3M Apr 11 21:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 149K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 584K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 407K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 1.1M Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 854K Apr 11 23:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 5.1M Apr 11 23:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 1.3M Apr 11 22:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 4.4M Apr 11 22:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 43K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 130K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 17M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-00
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-01
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-02
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-03
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-04
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-05
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-06
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-07
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-08
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-09
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-10
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-11
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-12
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-14
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717212619802
FORMULA FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717214595913
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
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[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-04: DISJ 0 0 0 0 0 0 0 0
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[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-10: CONJ 0 0 0 0 0 0 0 0
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[[35mlola[0m][.] 99 EFEG EXCL 10/104 1/2000 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 865 m, 10 m/sec, 864 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 15/104 1/2000 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 928 m, 12 m/sec, 927 t fired, .
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[[35mlola[0m][.] FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] 99 EFEG EXCL 20/104 1/2000 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 977 m, 9 m/sec, 976 t fired, .
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[[35mlola[0m][I] FINISHED task # 104 (type EQUN) for FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 102 (type EQUN) for FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13
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[[35mlola[0m][.] 99 EFEG EXCL 25/104 1/2000 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1061 m, 16 m/sec, 1060 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 30/104 1/2000 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1173 m, 22 m/sec, 1172 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 35/104 1/2000 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1292 m, 23 m/sec, 1291 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 6/104 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 865 m, 125 m/sec, 864 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 11/104 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 928 m, 12 m/sec, 927 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 16/104 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 998 m, 14 m/sec, 997 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 21/104 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1124 m, 25 m/sec, 1123 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 26/104 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1278 m, 30 m/sec, 1277 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 31/104 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1447 m, 33 m/sec, 1446 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 41/104 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1512 m, 5 m/sec, 1511 t fired, .
[[35mlola[0m][.] 113 EF STEQ 10/2482 0/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-11 sara not yet started (preprocessing).
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[[35mlola[0m][.] 99 EFEG EXCL 46/104 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1535 m, 4 m/sec, 1534 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 51/104 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1559 m, 4 m/sec, 1558 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 56/104 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1588 m, 5 m/sec, 1587 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 61/104 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1616 m, 5 m/sec, 1615 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 66/104 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1648 m, 6 m/sec, 1647 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 71/104 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1678 m, 6 m/sec, 1677 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 76/104 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1709 m, 6 m/sec, 1708 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 20/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1215 m, 30 m/sec, 1214 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 25/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1425 m, 42 m/sec, 1424 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 30/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1485 m, 12 m/sec, 1484 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 35/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1517 m, 6 m/sec, 1516 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 40/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1542 m, 5 m/sec, 1541 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 45/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1572 m, 6 m/sec, 1571 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 50/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1602 m, 6 m/sec, 1601 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 55/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1626 m, 4 m/sec, 1625 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 60/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1649 m, 4 m/sec, 1648 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 65/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1677 m, 5 m/sec, 1676 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 70/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1709 m, 6 m/sec, 1708 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 75/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1752 m, 8 m/sec, 1751 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 80/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1804 m, 10 m/sec, 1803 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 85/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1876 m, 14 m/sec, 1876 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 90/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1992 m, 23 m/sec, 1991 t fired, .
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[[35mlola[0m][.] 120 EG EXCL 35/108 1/2000 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-11 770 m, 154 m/sec, 770 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 75/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 1931 m, 30 m/sec, 1931 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 100/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 8247 m, 269 m/sec, 16399 t fired, .
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[[35mlola[0m][.] 99 EFEG EXCL 105/114 1/5 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-13 9374 m, 225 m/sec, 19069 t fired, .
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[[35mlola[0m][.] 77 CTL EXCL 135/141 3/2000 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-12 37443 m, 325 m/sec, 382218 t fired, .
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[[35mlola[0m][.] 77 CTL EXCL 140/141 3/2000 FamilyReunion-PT-L00100M0010C005P005G002-CTLFireability-2024-12 39027 m, 316 m/sec, 399257 t fired, .
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-PT-L00100M0010C005P005G002"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FamilyReunion-PT-L00100M0010C005P005G002, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r159-smll-171636268200506"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-PT-L00100M0010C005P005G002.tgz
mv FamilyReunion-PT-L00100M0010C005P005G002 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;