About the Execution of LoLA for FamilyReunion-PT-L00020M0002C001P001G001
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 0.000 | 1392133.00 | 0.00 | 0.00 | ?????F?????????? | normal |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r159-smll-171636268100492.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
..............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FamilyReunion-PT-L00020M0002C001P001G001, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r159-smll-171636268100492
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.2M
-rw-r--r-- 1 mcc users 33K Apr 11 20:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 233K Apr 11 20:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 50K Apr 11 20:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 195K Apr 11 20:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 22K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 104K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 28K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 79K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 64K Apr 11 20:42 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 436K Apr 11 20:42 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 149K Apr 11 20:36 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 568K Apr 11 20:36 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 11K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 1.3M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717203868510
FORMULA FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717205260643
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 56 (type SKEL/SRCH) for 15 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 56 (type SKEL/SRCH) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1216
[[35mlola[0m][I] fired transitions : 1216
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 57 (type SKEL/SRCH) for 22 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 57 (type SKEL/SRCH) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1214
[[35mlola[0m][I] fired transitions : 1214
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 61 (type EXCL) for 15 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05
[[35mlola[0m][I] time limit : 199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 59 (type FNDP) for 15 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 60 (type EQUN) for 15 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 61 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 59 (type FNDP) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05 (obsolete)
[[35mlola[0m][W] CANCELED task # 60 (type EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05 (obsolete)
[[35mlola[0m][I] FINISHED task # 59 (type FNDP) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 60 (type EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 38 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 39 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 456
[[35mlola[0m][I] fired transitions : 457
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[*** LOG ERROR #0001 ***] [2024-06-01 01:04:32] [status_logger] string pointer is null
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 3/239 1/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 34190 m, 6838 m/sec, 83455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 8/239 3/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 110424 m, 15246 m/sec, 269659 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 13/239 4/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 185363 m, 14987 m/sec, 457286 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 16 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 18/239 5/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 256101 m, 14147 m/sec, 635409 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 21 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 23/239 5/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 315734 m, 11926 m/sec, 797914 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 26 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 28/239 6/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 377380 m, 12329 m/sec, 966426 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 31 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 33/239 7/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 450479 m, 14619 m/sec, 1152315 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 36 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 38/239 7/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 514384 m, 12781 m/sec, 1325285 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 41 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 43/239 9/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 581757 m, 13474 m/sec, 1508032 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 46 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 48/239 10/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 651134 m, 13875 m/sec, 1684305 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 51 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 53/239 10/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 709920 m, 11757 m/sec, 1844978 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 56 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 58/239 11/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 771589 m, 12333 m/sec, 2013311 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 61 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 63/239 12/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 830591 m, 11800 m/sec, 2175896 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 66 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 68/239 12/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 882349 m, 10351 m/sec, 2328076 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 71 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 73/239 13/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 934947 m, 10519 m/sec, 2480748 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 76 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 78/239 13/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 993676 m, 11745 m/sec, 2642408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 81 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 83/239 14/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1055799 m, 12424 m/sec, 2811847 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 86 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 88/239 14/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1110792 m, 10998 m/sec, 2969581 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 91 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 93/239 15/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1167599 m, 11361 m/sec, 3136826 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 96 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 98/239 16/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1239493 m, 14378 m/sec, 3321225 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 101 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 103/239 17/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1302518 m, 12605 m/sec, 3492176 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 106 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 108/239 17/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1369578 m, 13412 m/sec, 3674182 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 111 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 113/239 18/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1432267 m, 12537 m/sec, 3845253 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 116 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 118/239 18/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1485962 m, 10739 m/sec, 4003864 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 121 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 123/239 19/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1540313 m, 10870 m/sec, 4165582 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 126 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 128/239 19/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1602151 m, 12367 m/sec, 4339465 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 131 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 133/239 20/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1663197 m, 12209 m/sec, 4513915 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 136 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 138/239 21/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1722541 m, 11868 m/sec, 4685158 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 141 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 143/239 22/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1788108 m, 13113 m/sec, 4864985 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 146 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 148/239 23/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1853220 m, 13022 m/sec, 5034621 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 151 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 153/239 24/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1914829 m, 12321 m/sec, 5198393 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 156 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 158/239 25/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 1977853 m, 12604 m/sec, 5367934 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 161 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 163/239 25/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2036969 m, 11823 m/sec, 5527082 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 166 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 168/239 26/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2088158 m, 10237 m/sec, 5676165 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 171 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 173/239 26/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2139912 m, 10350 m/sec, 5831166 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 176 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 178/239 27/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2198649 m, 11747 m/sec, 5995652 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 181 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 183/239 28/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2255080 m, 11286 m/sec, 6159423 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 186 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 188/239 28/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2311569 m, 11297 m/sec, 6322388 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 191 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 193/239 29/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2373055 m, 12297 m/sec, 6492887 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 196 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 198/239 30/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2432363 m, 11861 m/sec, 6653027 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 201 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 203/239 30/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2484469 m, 10421 m/sec, 6802634 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 206 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 208/239 31/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2537177 m, 10541 m/sec, 6959480 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 211 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 213/239 32/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2587752 m, 10115 m/sec, 7111934 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 216 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 218/239 32/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2637857 m, 10021 m/sec, 7261234 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 221 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 223/239 33/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2686912 m, 9811 m/sec, 7402356 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 226 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 228/239 33/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2732979 m, 9213 m/sec, 7550728 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 231 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 233/239 34/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2782380 m, 9880 m/sec, 7702793 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 236 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 238/239 34/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 2835097 m, 10543 m/sec, 7859975 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 241 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 51 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 246 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 47 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14
[[35mlola[0m][I] time limit : 3354 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1216
[[35mlola[0m][I] fired transitions : 1216
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 5/239 2/5 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 78068 m, -551405 m/sec, 187595 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 251 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 10/239 3/5 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 146247 m, 13635 m/sec, 361977 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 256 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 15/239 4/5 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 215876 m, 13925 m/sec, 541863 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 261 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 20/239 5/5 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 281030 m, 13030 m/sec, 711796 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 266 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 51 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 271 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 45 (type EXCL) for 44 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 45 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 295
[[35mlola[0m][I] fired transitions : 504
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 36 (type EXCL) for 35 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09
[[35mlola[0m][I] time limit : 277 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 5/277 1/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 71040 m, 14208 m/sec, 278321 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 276 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 10/277 2/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 134224 m, 12636 m/sec, 583816 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 281 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 15/277 2/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 197384 m, 12632 m/sec, 886720 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 286 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 20/277 2/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 260320 m, 12587 m/sec, 1190100 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 291 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 25/277 3/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 320382 m, 12012 m/sec, 1493421 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 296 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 30/277 3/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 373109 m, 10545 m/sec, 1797512 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 301 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 35/277 4/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 436082 m, 12594 m/sec, 2099925 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 306 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 40/277 4/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 498962 m, 12576 m/sec, 2403149 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 311 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 45/277 5/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 561229 m, 12453 m/sec, 2707193 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 316 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 50/277 5/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 622321 m, 12218 m/sec, 3010194 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 321 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 55/277 6/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 684646 m, 12465 m/sec, 3311160 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 326 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 60/277 6/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 746873 m, 12445 m/sec, 3611804 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 331 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 65/277 6/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 798957 m, 10416 m/sec, 3914097 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 336 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 70/277 7/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 860805 m, 12369 m/sec, 4213831 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 341 secs. Pages in use: 42
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 75/277 7/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 923324 m, 12503 m/sec, 4514629 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 346 secs. Pages in use: 42
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 80/277 8/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 982727 m, 11880 m/sec, 4815863 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 351 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 85/277 8/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1036403 m, 10735 m/sec, 5117245 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 356 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 90/277 9/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1098548 m, 12429 m/sec, 5416329 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 361 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 95/277 9/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1160322 m, 12354 m/sec, 5717215 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 366 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 100/277 10/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1221631 m, 12261 m/sec, 6019688 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 371 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 105/277 10/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1278551 m, 11384 m/sec, 6323346 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 376 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 110/277 11/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1335368 m, 11363 m/sec, 6626408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 381 secs. Pages in use: 46
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 115/277 11/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1392144 m, 11355 m/sec, 6928847 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 386 secs. Pages in use: 46
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 120/277 11/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1445073 m, 10585 m/sec, 7232348 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 391 secs. Pages in use: 46
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 125/277 12/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1492355 m, 9456 m/sec, 7519278 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 396 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 130/277 12/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1538214 m, 9171 m/sec, 7824993 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 401 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 135/277 13/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1599072 m, 12171 m/sec, 8126525 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 406 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 140/277 13/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1650836 m, 10352 m/sec, 8429436 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 411 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 145/277 13/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1702959 m, 10424 m/sec, 8735304 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 416 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 150/277 14/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1747360 m, 8880 m/sec, 9040446 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 421 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 155/277 14/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1797354 m, 9998 m/sec, 9345165 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 426 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 160/277 14/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1844347 m, 9398 m/sec, 9649738 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 431 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 165/277 15/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1890275 m, 9185 m/sec, 9953691 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 436 secs. Pages in use: 50
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 170/277 15/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1933934 m, 8731 m/sec, 10259153 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 441 secs. Pages in use: 50
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 175/277 15/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 1972569 m, 7727 m/sec, 10565658 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 446 secs. Pages in use: 50
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 180/277 16/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2026784 m, 10843 m/sec, 10867714 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 451 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 185/277 16/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2089673 m, 12577 m/sec, 11170248 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 456 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 190/277 17/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2152185 m, 12502 m/sec, 11471761 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 461 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 195/277 17/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2212093 m, 11981 m/sec, 11774025 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 466 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 200/277 18/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2273373 m, 12256 m/sec, 12073654 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 471 secs. Pages in use: 53
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 205/277 18/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2334153 m, 12156 m/sec, 12374563 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 476 secs. Pages in use: 53
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 210/277 19/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2395646 m, 12298 m/sec, 12673695 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 481 secs. Pages in use: 54
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 215/277 19/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2456576 m, 12186 m/sec, 12974620 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 486 secs. Pages in use: 54
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 220/277 20/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2519466 m, 12578 m/sec, 13276322 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 491 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 225/277 20/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2582604 m, 12627 m/sec, 13577048 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 496 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 230/277 21/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2643949 m, 12269 m/sec, 13871538 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 501 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 235/277 21/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2701853 m, 11580 m/sec, 14171926 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 506 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 240/277 21/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2756988 m, 11027 m/sec, 14472833 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 511 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 245/277 22/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2818959 m, 12394 m/sec, 14772026 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 516 secs. Pages in use: 57
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 250/277 22/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2877084 m, 11625 m/sec, 15071614 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 521 secs. Pages in use: 57
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 255/277 23/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2928345 m, 10252 m/sec, 15374795 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 526 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 260/277 23/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 2990345 m, 12400 m/sec, 15673817 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 531 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 265/277 24/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 3052670 m, 12465 m/sec, 15972070 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 536 secs. Pages in use: 59
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 270/277 24/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 3114683 m, 12402 m/sec, 16270625 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 541 secs. Pages in use: 59
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 275/277 25/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 3177097 m, 12482 m/sec, 16571455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 546 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 36 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 551 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 33 (type EXCL) for 32 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08
[[35mlola[0m][I] time limit : 277 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 36 (type EXCL) for 35 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09
[[35mlola[0m][I] time limit : 3049 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 33 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 5/277 1/5 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 75957 m, -620228 m/sec, 302011 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 556 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 10/277 2/5 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 138341 m, 12476 m/sec, 606788 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 561 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 15/277 2/5 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 201900 m, 12711 m/sec, 908276 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 566 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 20/277 3/5 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 264680 m, 12556 m/sec, 1211012 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 571 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 25/277 3/5 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 323973 m, 11858 m/sec, 1514221 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 576 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 30/277 3/5 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 377601 m, 10725 m/sec, 1817005 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 581 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 35/277 4/5 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 439938 m, 12467 m/sec, 2117400 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 586 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 40/277 4/5 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 502107 m, 12433 m/sec, 2418071 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 591 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 45/277 5/5 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 563488 m, 12276 m/sec, 2719705 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 596 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 LTL EXCL 50/277 5/5 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 624677 m, 12237 m/sec, 3020713 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 601 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 36 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 606 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 27 (type EXCL) for 22 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06
[[35mlola[0m][I] time limit : 299 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 27 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1216
[[35mlola[0m][I] fired transitions : 1216
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04
[[35mlola[0m][I] time limit : 374 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 5/374 6/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 230429 m, 46085 m/sec, 251716 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 611 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 10/374 12/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 453153 m, 44544 m/sec, 504078 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 616 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 15/374 17/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 676306 m, 44630 m/sec, 757372 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 621 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 20/374 23/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 906048 m, 45948 m/sec, 1010555 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 626 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 25/374 28/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 1127842 m, 44358 m/sec, 1261765 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 631 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 30/374 33/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 1348181 m, 44067 m/sec, 1512212 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 636 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 35/374 39/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 1569974 m, 44358 m/sec, 1764897 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 641 secs. Pages in use: 74
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 40/374 45/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 1786715 m, 43348 m/sec, 2013548 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 646 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 45/374 50/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 2009352 m, 44527 m/sec, 2259871 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 651 secs. Pages in use: 85
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 50/374 54/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 2212559 m, 40641 m/sec, 2508967 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 656 secs. Pages in use: 89
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 55/374 59/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 2413303 m, 40148 m/sec, 2758901 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 661 secs. Pages in use: 94
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 60/374 64/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 2620343 m, 41408 m/sec, 3009464 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 666 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 65/374 70/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 2826338 m, 41199 m/sec, 3259183 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 671 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 70/374 75/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 3032148 m, 41162 m/sec, 3509388 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 676 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 75/374 80/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 3239717 m, 41513 m/sec, 3760499 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 681 secs. Pages in use: 115
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 80/374 85/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 3449007 m, 41858 m/sec, 4006848 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 686 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 85/374 90/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 3660860 m, 42370 m/sec, 4254058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 691 secs. Pages in use: 125
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 90/374 96/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 3874052 m, 42638 m/sec, 4502462 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 696 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 95/374 101/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 4084170 m, 42023 m/sec, 4747724 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 701 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 100/374 106/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 4293289 m, 41823 m/sec, 4991753 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 706 secs. Pages in use: 141
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 105/374 111/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 4497333 m, 40808 m/sec, 5229469 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 711 secs. Pages in use: 146
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 110/374 117/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 4710575 m, 42648 m/sec, 5478312 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 716 secs. Pages in use: 152
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 115/374 122/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 4924296 m, 42744 m/sec, 5727742 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 721 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 120/374 127/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 5136844 m, 42509 m/sec, 5975462 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 726 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 125/374 131/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 5344301 m, 41491 m/sec, 6217469 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 731 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 130/374 134/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 5550564 m, 41252 m/sec, 6457760 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 736 secs. Pages in use: 169
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 135/374 140/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 5760901 m, 42067 m/sec, 6703429 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 741 secs. Pages in use: 175
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 140/374 145/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 5972304 m, 42280 m/sec, 6949918 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 746 secs. Pages in use: 180
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 145/374 150/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 6182639 m, 42067 m/sec, 7194723 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 751 secs. Pages in use: 185
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 150/374 156/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 6392859 m, 42044 m/sec, 7440579 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 756 secs. Pages in use: 191
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 155/374 159/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 6598261 m, 41080 m/sec, 7679882 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 761 secs. Pages in use: 194
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 160/374 162/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 6800077 m, 40363 m/sec, 7915155 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 766 secs. Pages in use: 197
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 165/374 165/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 7000692 m, 40123 m/sec, 8149669 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 771 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 170/374 168/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 7203816 m, 40624 m/sec, 8386740 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 776 secs. Pages in use: 203
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 175/374 172/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 7407305 m, 40697 m/sec, 8623758 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 781 secs. Pages in use: 207
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 180/374 177/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 7624961 m, 43531 m/sec, 8866793 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 786 secs. Pages in use: 212
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 185/374 182/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 7840396 m, 43087 m/sec, 9107185 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 791 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 190/374 186/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 8047290 m, 41378 m/sec, 9348159 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 796 secs. Pages in use: 221
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 195/374 191/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 8255237 m, 41589 m/sec, 9590948 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 801 secs. Pages in use: 226
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 200/374 195/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 8462892 m, 41531 m/sec, 9831122 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 806 secs. Pages in use: 230
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 205/374 199/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 8669683 m, 41358 m/sec, 10076388 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 811 secs. Pages in use: 234
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 210/374 204/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 8876907 m, 41444 m/sec, 10320162 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 816 secs. Pages in use: 239
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 215/374 209/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 9082091 m, 41036 m/sec, 10562637 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 821 secs. Pages in use: 244
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 220/374 213/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 9287063 m, 40994 m/sec, 10803402 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 826 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 225/374 219/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 9496241 m, 41835 m/sec, 11048730 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 831 secs. Pages in use: 254
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 230/374 224/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 9709066 m, 42565 m/sec, 11299431 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 836 secs. Pages in use: 259
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 235/374 229/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 9920797 m, 42346 m/sec, 11547811 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 841 secs. Pages in use: 264
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 240/374 232/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 10125245 m, 40889 m/sec, 11787782 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 846 secs. Pages in use: 267
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 245/374 234/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 10326547 m, 40260 m/sec, 12022693 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 851 secs. Pages in use: 269
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 250/374 239/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 10538483 m, 42387 m/sec, 12270108 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 856 secs. Pages in use: 274
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 255/374 245/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 10746717 m, 41646 m/sec, 12513117 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 861 secs. Pages in use: 280
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 260/374 249/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 10951413 m, 40939 m/sec, 12752099 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 866 secs. Pages in use: 284
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 265/374 255/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 11167065 m, 43130 m/sec, 13003291 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 871 secs. Pages in use: 290
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 270/374 260/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 11381574 m, 42901 m/sec, 13253648 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 876 secs. Pages in use: 295
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 275/374 266/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 11595150 m, 42715 m/sec, 13502585 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 881 secs. Pages in use: 301
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 280/374 271/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 11806262 m, 42222 m/sec, 13748899 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 886 secs. Pages in use: 306
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 285/374 275/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 12011335 m, 41014 m/sec, 13988210 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 891 secs. Pages in use: 310
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 290/374 278/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 12209414 m, 39615 m/sec, 14218940 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 896 secs. Pages in use: 313
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 295/374 283/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 12419004 m, 41918 m/sec, 14463628 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 901 secs. Pages in use: 318
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 300/374 289/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 12629185 m, 42036 m/sec, 14708875 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 906 secs. Pages in use: 324
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 305/374 294/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 12838904 m, 41943 m/sec, 14952776 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 911 secs. Pages in use: 329
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 310/374 299/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 13048275 m, 41874 m/sec, 15197623 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 916 secs. Pages in use: 334
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 315/374 303/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 13251723 m, 40689 m/sec, 15435066 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 921 secs. Pages in use: 338
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 320/374 306/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 13448190 m, 39293 m/sec, 15663954 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 926 secs. Pages in use: 341
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 325/374 309/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 13645447 m, 39451 m/sec, 15894018 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 931 secs. Pages in use: 344
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 330/374 312/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 13842823 m, 39475 m/sec, 16123710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 936 secs. Pages in use: 347
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 335/374 316/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 14042319 m, 39899 m/sec, 16357075 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 941 secs. Pages in use: 351
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 340/374 321/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 14253402 m, 42216 m/sec, 16597899 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 946 secs. Pages in use: 356
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 345/374 325/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 14469305 m, 43180 m/sec, 16841235 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 951 secs. Pages in use: 360
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 350/374 330/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 14676338 m, 41406 m/sec, 17085921 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 956 secs. Pages in use: 365
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 355/374 334/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 14874347 m, 39601 m/sec, 17324975 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 961 secs. Pages in use: 369
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 360/374 339/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 15081828 m, 41496 m/sec, 17566534 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 966 secs. Pages in use: 374
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 365/374 344/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 15293545 m, 42343 m/sec, 17812876 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 971 secs. Pages in use: 379
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 13 LTL EXCL 370/374 349/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 15500260 m, 41343 m/sec, 18053512 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 976 secs. Pages in use: 384
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 13 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 981 secs. Pages in use: 388
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03
[[35mlola[0m][I] time limit : 374 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04
[[35mlola[0m][I] time limit : 2619 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] CANCELED task # 13 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 5/374 3/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 201822 m, 40364 m/sec, 226468 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 986 secs. Pages in use: 399
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 10/374 5/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 389432 m, 37522 m/sec, 447509 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 991 secs. Pages in use: 401
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 15/374 8/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 572212 m, 36556 m/sec, 668043 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 996 secs. Pages in use: 409
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 20/374 10/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 756748 m, 36907 m/sec, 887799 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1001 secs. Pages in use: 414
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 25/374 12/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 969171 m, 42484 m/sec, 1133853 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1006 secs. Pages in use: 420
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 30/374 15/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 1180239 m, 42213 m/sec, 1379867 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1011 secs. Pages in use: 428
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 35/374 18/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 1381243 m, 40200 m/sec, 1622123 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1016 secs. Pages in use: 434
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 40/374 20/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 1581103 m, 39972 m/sec, 1861540 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1021 secs. Pages in use: 441
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 45/374 22/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 1787169 m, 41213 m/sec, 2102222 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1026 secs. Pages in use: 445
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 50/374 24/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 1994667 m, 41499 m/sec, 2341137 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1031 secs. Pages in use: 451
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 55/374 27/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 2195341 m, 40134 m/sec, 2582308 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1036 secs. Pages in use: 458
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 60/374 29/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 2394383 m, 39808 m/sec, 2821208 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1041 secs. Pages in use: 464
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 65/374 31/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 2583860 m, 37895 m/sec, 3064999 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1046 secs. Pages in use: 470
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 70/374 34/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 2776485 m, 38525 m/sec, 3309163 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1051 secs. Pages in use: 476
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 75/374 36/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 2979225 m, 40548 m/sec, 3553117 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1056 secs. Pages in use: 482
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 80/374 39/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 3182903 m, 40735 m/sec, 3796825 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1061 secs. Pages in use: 489
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 85/374 41/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 3378775 m, 39174 m/sec, 4042293 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1066 secs. Pages in use: 496
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 90/374 43/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 3571961 m, 38637 m/sec, 4288352 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1071 secs. Pages in use: 502
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 95/374 46/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 3766123 m, 38832 m/sec, 4533195 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1076 secs. Pages in use: 509
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 100/374 48/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 3967115 m, 40198 m/sec, 4775838 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1081 secs. Pages in use: 515
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 105/374 51/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 4162573 m, 39091 m/sec, 5019508 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1086 secs. Pages in use: 523
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 110/374 53/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 4352932 m, 38071 m/sec, 5262876 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1091 secs. Pages in use: 530
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 115/374 55/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 4545806 m, 38574 m/sec, 5505260 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1096 secs. Pages in use: 536
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 120/374 57/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 4742000 m, 39238 m/sec, 5745793 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1101 secs. Pages in use: 542
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 125/374 60/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 4935980 m, 38796 m/sec, 5986688 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1106 secs. Pages in use: 549
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 130/374 62/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 5127758 m, 38355 m/sec, 6229141 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1111 secs. Pages in use: 556
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 135/374 64/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 5313179 m, 37084 m/sec, 6472831 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1116 secs. Pages in use: 562
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 140/374 66/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 5490122 m, 35388 m/sec, 6719477 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1121 secs. Pages in use: 568
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 145/374 68/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 5684897 m, 38955 m/sec, 6965818 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1126 secs. Pages in use: 575
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 150/374 71/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 5884768 m, 39974 m/sec, 7211665 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1131 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 155/374 73/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 6084347 m, 39915 m/sec, 7457053 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1136 secs. Pages in use: 588
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 160/374 76/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 6277215 m, 38573 m/sec, 7702836 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1141 secs. Pages in use: 596
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 165/374 78/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 6471826 m, 38922 m/sec, 7947630 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1146 secs. Pages in use: 601
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 170/374 81/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 6672309 m, 40096 m/sec, 8192542 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1151 secs. Pages in use: 608
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 175/374 83/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 6870794 m, 39697 m/sec, 8437062 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1156 secs. Pages in use: 613
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 180/374 85/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 7061950 m, 38231 m/sec, 8680937 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1161 secs. Pages in use: 618
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 185/374 87/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 7252611 m, 38132 m/sec, 8923200 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1166 secs. Pages in use: 624
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 190/374 90/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 7449953 m, 39468 m/sec, 9165912 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1171 secs. Pages in use: 630
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 195/374 92/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 7647059 m, 39421 m/sec, 9406228 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1176 secs. Pages in use: 636
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 200/374 94/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 7837337 m, 38055 m/sec, 9648045 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1181 secs. Pages in use: 642
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 205/374 96/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 8025028 m, 37538 m/sec, 9887519 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1186 secs. Pages in use: 648
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 210/374 98/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 8205440 m, 36082 m/sec, 10132633 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1191 secs. Pages in use: 654
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 215/374 101/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 8389331 m, 36778 m/sec, 10378169 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1196 secs. Pages in use: 661
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 220/374 103/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 8584125 m, 38958 m/sec, 10622433 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1201 secs. Pages in use: 667
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 225/374 106/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 8795836 m, 42342 m/sec, 10863275 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1206 secs. Pages in use: 673
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 230/374 108/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 9000515 m, 40935 m/sec, 11105347 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1211 secs. Pages in use: 679
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 235/374 111/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 9201515 m, 40200 m/sec, 11347265 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1216 secs. Pages in use: 686
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 240/374 113/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 9403735 m, 40444 m/sec, 11588408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1221 secs. Pages in use: 692
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 245/374 116/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 9613290 m, 41911 m/sec, 11828123 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1226 secs. Pages in use: 700
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 250/374 118/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 9817753 m, 40892 m/sec, 12068872 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1231 secs. Pages in use: 706
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 255/374 121/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 10017080 m, 39865 m/sec, 12309188 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1236 secs. Pages in use: 713
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 260/374 123/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 10217899 m, 40163 m/sec, 12548709 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1241 secs. Pages in use: 719
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-09: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 265/374 125/2000 FamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-03 10422907 m, 41001 m/sec, 12786348 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1246 secs. Pages in use: 724
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-05: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-12: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-PT-L00020M0002C001P001G001"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FamilyReunion-PT-L00020M0002C001P001G001, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r159-smll-171636268100492"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-PT-L00020M0002C001P001G001.tgz
mv FamilyReunion-PT-L00020M0002C001P001G001 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;