About the Execution of LoLA for FamilyReunion-PT-L00020M0002C001P001G001
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 0.000 | 2204262.00 | 0.00 | 0.00 | ????TT??????FF?? | normal |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r159-smll-171636268100490.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FamilyReunion-PT-L00020M0002C001P001G001, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r159-smll-171636268100490
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.2M
-rw-r--r-- 1 mcc users 33K Apr 11 20:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 233K Apr 11 20:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 50K Apr 11 20:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 195K Apr 11 20:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 22K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 104K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 28K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 79K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 64K Apr 11 20:42 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 436K Apr 11 20:42 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 149K Apr 11 20:36 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 568K Apr 11 20:36 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 11K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 1.3M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717200363563
FORMULA FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717202567825
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 53 (type SKEL/FNDP) for 16 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 54 (type SKEL/EQUN) for 16 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 55 (type SKEL/SRCH) for 16 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 53 (type SKEL/FNDP) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 54 (type EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04 (obsolete)
[[35mlola[0m][W] CANCELED task # 55 (type SRCH) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04 (obsolete)
[[35mlola[0m][I] LAUNCH task # 57 (type SKEL/FNDP) for 19 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 58 (type SKEL/EQUN) for 19 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 59 (type SKEL/SRCH) for 19 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 54 (type SKEL/EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 57 (type SKEL/FNDP) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 58 (type EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05 (obsolete)
[[35mlola[0m][W] CANCELED task # 59 (type SRCH) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05 (obsolete)
[[35mlola[0m][I] FINISHED task # 58 (type SKEL/EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 60 (type SKEL/SRCH) for 31 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 63 (type SKEL/FNDP) for 43 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 64 (type SKEL/EQUN) for 43 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 65 (type SKEL/SRCH) for 43 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 65 (type SKEL/SRCH) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 6
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 63 (type FNDP) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13 (obsolete)
[[35mlola[0m][W] CANCELED task # 64 (type EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13 (obsolete)
[[35mlola[0m][I] FINISHED task # 63 (type SKEL/FNDP) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 64 (type SKEL/EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 69 (type EXCL) for 43 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 67 (type FNDP) for 43 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 68 (type EQUN) for 43 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 69 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 67 (type FNDP) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13 (obsolete)
[[35mlola[0m][W] CANCELED task # 68 (type EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13 (obsolete)
[[35mlola[0m][I] FINISHED task # 67 (type FNDP) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 68 (type EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 72 (type EXCL) for 19 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 70 (type FNDP) for 19 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 71 (type EQUN) for 19 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 72 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 6
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 70 (type FNDP) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05 (obsolete)
[[35mlola[0m][W] CANCELED task # 71 (type EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05 (obsolete)
[[35mlola[0m][I] FINISHED task # 70 (type FNDP) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 71 (type EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 73 (type EXCL) for 40 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 76 (type EQUN) for 40 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 78 (type EQUN) for 40 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 73 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 7
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 76 (type EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12 (obsolete)
[[35mlola[0m][W] CANCELED task # 78 (type EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12 (obsolete)
[[35mlola[0m][I] LAUNCH task # 80 (type EXCL) for 10 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 83 (type EQUN) for 10 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 78 (type EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 84 (type FNDP) for 16 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 84 (type FNDP) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 76 (type EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 83 (type EQUN) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 4/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 158129 m, 31625 m/sec, 641584 t fired, .
[[35mlola[0m][.] 80 EG EXCL 3/276 1/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 43528 m, 8705 m/sec, 74601 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 7 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 9/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 715163 m, 111406 m/sec, 3299874 t fired, .
[[35mlola[0m][.] 80 EG EXCL 8/276 3/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 159726 m, 23239 m/sec, 279076 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 12 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 14/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 1229438 m, 102855 m/sec, 6058762 t fired, .
[[35mlola[0m][.] 80 EG EXCL 13/276 4/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 279121 m, 23879 m/sec, 492258 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 17 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 19/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 1760979 m, 106308 m/sec, 8816212 t fired, .
[[35mlola[0m][.] 80 EG EXCL 18/276 6/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 398431 m, 23862 m/sec, 703530 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 22 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 24/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 2246062 m, 97016 m/sec, 11522229 t fired, .
[[35mlola[0m][.] 80 EG EXCL 23/276 7/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 517421 m, 23798 m/sec, 916894 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 27 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 29/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 2741396 m, 99066 m/sec, 14214070 t fired, .
[[35mlola[0m][.] 80 EG EXCL 28/276 9/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 635679 m, 23651 m/sec, 1128630 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 32 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 34/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 3260485 m, 103817 m/sec, 16872451 t fired, .
[[35mlola[0m][.] 80 EG EXCL 33/276 11/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 754564 m, 23777 m/sec, 1340940 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 37 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 39/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 3778895 m, 103682 m/sec, 19561197 t fired, .
[[35mlola[0m][.] 80 EG EXCL 38/276 12/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 873419 m, 23771 m/sec, 1554751 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 42 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 44/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 4212797 m, 86780 m/sec, 22072656 t fired, .
[[35mlola[0m][.] 80 EG EXCL 43/276 14/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 992071 m, 23730 m/sec, 1767990 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 47 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 49/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 4668889 m, 91218 m/sec, 24636520 t fired, .
[[35mlola[0m][.] 80 EG EXCL 48/276 15/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 1110604 m, 23706 m/sec, 1982376 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 52 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 54/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 5157390 m, 97700 m/sec, 27373945 t fired, .
[[35mlola[0m][.] 80 EG EXCL 53/276 17/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 1228720 m, 23623 m/sec, 2197550 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 57 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 59/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 5660045 m, 100531 m/sec, 30084799 t fired, .
[[35mlola[0m][.] 80 EG EXCL 58/276 18/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 1347287 m, 23713 m/sec, 2408401 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 62 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 64/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 6078052 m, 83601 m/sec, 32706288 t fired, .
[[35mlola[0m][.] 80 EG EXCL 63/276 20/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 1465691 m, 23680 m/sec, 2620623 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 67 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 69/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 6582082 m, 100806 m/sec, 35382458 t fired, .
[[35mlola[0m][.] 80 EG EXCL 68/276 21/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 1583965 m, 23654 m/sec, 2833642 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 72 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 74/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 7033935 m, 90370 m/sec, 37976174 t fired, .
[[35mlola[0m][.] 80 EG EXCL 73/276 23/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 1701940 m, 23595 m/sec, 3046260 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 77 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 79/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 7432178 m, 79648 m/sec, 40545699 t fired, .
[[35mlola[0m][.] 80 EG EXCL 78/276 24/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 1819678 m, 23547 m/sec, 3259588 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 82 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 84/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 7838799 m, 81324 m/sec, 43109342 t fired, .
[[35mlola[0m][.] 80 EG EXCL 83/276 26/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 1937379 m, 23540 m/sec, 3473078 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 87 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 89/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 8233064 m, 78853 m/sec, 45641816 t fired, .
[[35mlola[0m][.] 80 EG EXCL 88/276 27/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 2055004 m, 23525 m/sec, 3685270 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 92 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 94/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 8643870 m, 82161 m/sec, 48168955 t fired, .
[[35mlola[0m][.] 80 EG EXCL 93/276 29/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 2172568 m, 23512 m/sec, 3898266 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 97 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 99/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 9072836 m, 85793 m/sec, 50733711 t fired, .
[[35mlola[0m][.] 80 EG EXCL 98/276 31/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 2290147 m, 23515 m/sec, 4112106 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 102 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 104/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 9486174 m, 82667 m/sec, 53259706 t fired, .
[[35mlola[0m][.] 80 EG EXCL 103/276 32/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 2407785 m, 23527 m/sec, 4326394 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 107 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 109/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 9859840 m, 74733 m/sec, 55694747 t fired, .
[[35mlola[0m][.] 80 EG EXCL 108/276 34/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 2524770 m, 23397 m/sec, 4540281 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 112 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 114/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 10245585 m, 77149 m/sec, 58160715 t fired, .
[[35mlola[0m][.] 80 EG EXCL 113/276 35/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 2642276 m, 23501 m/sec, 4754463 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 117 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 119/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 10623287 m, 75540 m/sec, 60643695 t fired, .
[[35mlola[0m][.] 80 EG EXCL 118/276 37/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 2760737 m, 23692 m/sec, 4965578 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 122 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 124/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 11026171 m, 80576 m/sec, 63169619 t fired, .
[[35mlola[0m][.] 80 EG EXCL 123/276 38/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 2879208 m, 23694 m/sec, 5178006 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 127 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 129/3597 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 11448430 m, 84451 m/sec, 65717341 t fired, .
[[35mlola[0m][.] 80 EG EXCL 128/276 40/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 2997002 m, 23558 m/sec, 5389986 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 132 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 134/3597 3/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 11867844 m, 83882 m/sec, 68231220 t fired, .
[[35mlola[0m][.] 80 EG EXCL 133/276 41/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 3114555 m, 23510 m/sec, 5602406 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 137 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL SRCH 139/3597 5/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 12301994 m, 86830 m/sec, 70740370 t fired, .
[[35mlola[0m][.] 80 EG EXCL 138/276 43/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 3231989 m, 23486 m/sec, 5815692 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 142 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 60 (type SRCH) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 143/276 44/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 3343697 m, 22341 m/sec, 6017369 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 147 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 148/276 46/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 3462300 m, 23720 m/sec, 6231616 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 152 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 153/276 47/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 3580590 m, 23658 m/sec, 6446546 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 157 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 158/276 49/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 3698900 m, 23662 m/sec, 6661521 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 162 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 163/276 50/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 3816505 m, 23521 m/sec, 6876032 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 167 secs. Pages in use: 50
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 168/276 52/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 3933989 m, 23496 m/sec, 7091028 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 172 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 173/276 53/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 4051744 m, 23551 m/sec, 7304904 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 177 secs. Pages in use: 53
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 178/276 55/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 4169604 m, 23572 m/sec, 7517910 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 182 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 183/276 57/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 4287197 m, 23518 m/sec, 7731193 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 187 secs. Pages in use: 57
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 188/276 58/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 4404730 m, 23506 m/sec, 7944832 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 192 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 193/276 60/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 4521940 m, 23442 m/sec, 8158866 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 197 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 198/276 61/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 4639093 m, 23430 m/sec, 8372785 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 202 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 203/276 63/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 4756232 m, 23427 m/sec, 8587045 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 207 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 208/276 64/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 4873760 m, 23505 m/sec, 8800971 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 212 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 213/276 66/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 4989538 m, 23155 m/sec, 9012638 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 217 secs. Pages in use: 66
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 218/276 67/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 5104974 m, 23087 m/sec, 9224702 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 222 secs. Pages in use: 67
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 223/276 69/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 5220618 m, 23128 m/sec, 9436149 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 227 secs. Pages in use: 69
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 228/276 70/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 5335999 m, 23076 m/sec, 9648470 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 232 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 233/276 72/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 5451150 m, 23030 m/sec, 9861066 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 237 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 238/276 73/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 5567369 m, 23243 m/sec, 10070910 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 242 secs. Pages in use: 73
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 243/276 75/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 5676758 m, 21877 m/sec, 10266228 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 247 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 248/276 76/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 5791782 m, 23004 m/sec, 10473424 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 252 secs. Pages in use: 76
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 253/276 78/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 5901146 m, 21872 m/sec, 10669926 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 257 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 258/276 79/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 6016519 m, 23074 m/sec, 10878472 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 262 secs. Pages in use: 79
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 263/276 81/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 6125284 m, 21753 m/sec, 11076281 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 267 secs. Pages in use: 81
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 268/276 82/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 6240176 m, 22978 m/sec, 11283566 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 272 secs. Pages in use: 82
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 80 EG EXCL 273/276 83/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 6349174 m, 21799 m/sec, 11480413 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 277 secs. Pages in use: 83
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 80 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 1 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 282 secs. Pages in use: 85
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 80 (type EXCL) for 10 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 3318 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 5/276 1/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 73012 m, 14602 m/sec, 296282 t fired, .
[[35mlola[0m][.] 80 EG EXCL 5/3318 2/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 112032 m, -1247428 m/sec, 195029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 287 secs. Pages in use: 88
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 10/276 2/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 138036 m, 13004 m/sec, 610499 t fired, .
[[35mlola[0m][.] 80 EG EXCL 10/255 4/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 229009 m, 23395 m/sec, 402071 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 292 secs. Pages in use: 91
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 15/276 2/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 206010 m, 13594 m/sec, 925820 t fired, .
[[35mlola[0m][.] 80 EG EXCL 15/255 5/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 346263 m, 23450 m/sec, 610667 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 297 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 80 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 20/276 3/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 275772 m, 13952 m/sec, 1240921 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 302 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 25/276 4/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 344922 m, 13830 m/sec, 1555547 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 307 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 30/276 5/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 401373 m, 11290 m/sec, 1858436 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 312 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 35/276 5/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 464980 m, 12721 m/sec, 2177490 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 317 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 40/276 6/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 521243 m, 11252 m/sec, 2495779 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 322 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 45/276 6/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 569435 m, 9638 m/sec, 2816374 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 327 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 50/276 7/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 634023 m, 12917 m/sec, 3132000 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 332 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 55/276 7/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 699442 m, 13083 m/sec, 3446194 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 337 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 60/276 8/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 769389 m, 13989 m/sec, 3757830 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 342 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 65/276 8/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 836880 m, 13498 m/sec, 4052600 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 347 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 70/276 9/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 905153 m, 13654 m/sec, 4365665 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 352 secs. Pages in use: 94
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 75/276 10/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 962220 m, 11413 m/sec, 4679355 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 357 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 80/276 10/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1018636 m, 11283 m/sec, 4993255 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 362 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 85/276 10/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1065460 m, 9364 m/sec, 5297240 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 367 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 90/276 11/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1120525 m, 11013 m/sec, 5606643 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 372 secs. Pages in use: 96
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 95/276 11/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1171530 m, 10201 m/sec, 5910399 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 377 secs. Pages in use: 96
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 100/276 11/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1219218 m, 9537 m/sec, 6222154 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 382 secs. Pages in use: 96
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 105/276 12/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1271784 m, 10513 m/sec, 6526739 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 387 secs. Pages in use: 97
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 110/276 12/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1332922 m, 12227 m/sec, 6833124 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 392 secs. Pages in use: 97
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 115/276 12/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1390970 m, 11609 m/sec, 7148829 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 397 secs. Pages in use: 97
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 120/276 13/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1450070 m, 11820 m/sec, 7463286 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 402 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 125/276 13/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1513393 m, 12664 m/sec, 7773262 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 407 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 130/276 14/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1575691 m, 12459 m/sec, 8076319 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 412 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 135/276 14/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1638525 m, 12566 m/sec, 8390993 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 417 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 140/276 15/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1700547 m, 12404 m/sec, 8705804 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 422 secs. Pages in use: 100
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 145/276 16/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1755461 m, 10982 m/sec, 9023950 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 427 secs. Pages in use: 101
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 150/276 16/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1810566 m, 11021 m/sec, 9339209 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 432 secs. Pages in use: 101
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 155/276 16/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1857845 m, 9455 m/sec, 9656096 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 437 secs. Pages in use: 101
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 160/276 17/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1914951 m, 11421 m/sec, 9970052 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 442 secs. Pages in use: 102
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 165/276 17/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 1970265 m, 11062 m/sec, 10285327 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 447 secs. Pages in use: 102
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 170/276 18/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2026814 m, 11309 m/sec, 10602393 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 452 secs. Pages in use: 103
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 175/276 18/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2076131 m, 9863 m/sec, 10923649 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 457 secs. Pages in use: 103
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 180/276 19/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2124943 m, 9762 m/sec, 11244705 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 462 secs. Pages in use: 104
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 185/276 19/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2170035 m, 9018 m/sec, 11566431 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 467 secs. Pages in use: 104
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 190/276 20/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2212294 m, 8451 m/sec, 11887837 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 472 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 195/276 20/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2263861 m, 10313 m/sec, 12205643 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 477 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 200/276 21/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2317149 m, 10657 m/sec, 12522121 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 482 secs. Pages in use: 106
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 205/276 21/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2379177 m, 12405 m/sec, 12833847 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 487 secs. Pages in use: 106
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 210/276 22/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2433802 m, 10925 m/sec, 13144924 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 492 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 215/276 22/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2490336 m, 11306 m/sec, 13456597 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 497 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 220/276 23/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2543372 m, 10607 m/sec, 13749669 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 502 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 225/276 23/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2600497 m, 11425 m/sec, 14063891 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 507 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 230/276 24/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2652601 m, 10420 m/sec, 14357794 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 512 secs. Pages in use: 109
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 235/276 24/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2708420 m, 11163 m/sec, 14675405 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 517 secs. Pages in use: 109
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 240/276 25/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2754658 m, 9247 m/sec, 14976179 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 522 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 245/276 25/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2809053 m, 10879 m/sec, 15292975 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 527 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 250/276 25/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2853552 m, 8899 m/sec, 15594212 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 532 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 255/276 26/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2895511 m, 8391 m/sec, 15915436 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 537 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 260/276 26/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 2949743 m, 10846 m/sec, 16230921 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 542 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 265/276 27/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 3004889 m, 11029 m/sec, 16544676 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 547 secs. Pages in use: 112
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 270/276 27/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 3055784 m, 10179 m/sec, 16860670 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 552 secs. Pages in use: 112
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 275/276 28/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 3113147 m, 11472 m/sec, 17171370 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 557 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 50 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 562 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 3038 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 5/276 1/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 45129 m, 9025 m/sec, 277430 t fired, .
[[35mlola[0m][.] 50 CTL EXCL 5/3038 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 69283 m, -608772 m/sec, 277321 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 567 secs. Pages in use: 116
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 10/276 1/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 91764 m, 9327 m/sec, 590501 t fired, .
[[35mlola[0m][.] 50 CTL EXCL 10/253 2/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 130164 m, 12176 m/sec, 574866 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 572 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 15/276 1/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 136071 m, 8861 m/sec, 895766 t fired, .
[[35mlola[0m][.] 50 CTL EXCL 15/253 2/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 195846 m, 13136 m/sec, 874606 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 577 secs. Pages in use: 118
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 20/276 2/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 176784 m, 8142 m/sec, 1197123 t fired, .
[[35mlola[0m][.] 50 CTL EXCL 20/253 3/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 262299 m, 13290 m/sec, 1175786 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 582 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 25/276 2/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 220090 m, 8661 m/sec, 1496877 t fired, .
[[35mlola[0m][.] 50 CTL EXCL 25/253 3/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 326930 m, 12926 m/sec, 1477207 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 587 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 30/276 2/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 263546 m, 8691 m/sec, 1797318 t fired, .
[[35mlola[0m][.] 50 CTL EXCL 30/253 4/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 389841 m, 12582 m/sec, 1782847 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 592 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 35/276 3/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 307446 m, 8780 m/sec, 2097012 t fired, .
[[35mlola[0m][.] 50 CTL EXCL 35/253 5/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 446511 m, 11334 m/sec, 2088040 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 597 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 50 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 40/276 3/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 351269 m, 8764 m/sec, 2396979 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 602 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 45/276 3/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 393994 m, 8545 m/sec, 2710933 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 607 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 50/276 3/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 439140 m, 9029 m/sec, 3024948 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 612 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 55/276 4/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 484770 m, 9126 m/sec, 3337452 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 617 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 60/276 4/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 526351 m, 8316 m/sec, 3651410 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 622 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 65/276 4/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 572629 m, 9255 m/sec, 3964774 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 627 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 70/276 5/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 618395 m, 9153 m/sec, 4279984 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 632 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 75/276 5/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 661113 m, 8543 m/sec, 4596527 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 637 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 80/276 5/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 703825 m, 8542 m/sec, 4912732 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 642 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 85/276 5/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 744179 m, 8070 m/sec, 5230668 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 647 secs. Pages in use: 125
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 90/276 6/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 783317 m, 7827 m/sec, 5548218 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 652 secs. Pages in use: 126
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 95/276 6/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 825536 m, 8443 m/sec, 5863320 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 657 secs. Pages in use: 127
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 100/276 6/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 864449 m, 7782 m/sec, 6181523 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 662 secs. Pages in use: 127
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 105/276 7/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 902823 m, 7674 m/sec, 6498693 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 667 secs. Pages in use: 129
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 110/276 7/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 939498 m, 7335 m/sec, 6814767 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 672 secs. Pages in use: 129
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 115/276 7/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 974501 m, 7000 m/sec, 7132046 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 677 secs. Pages in use: 129
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 120/276 7/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1011806 m, 7461 m/sec, 7447461 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 682 secs. Pages in use: 129
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 125/276 8/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1057970 m, 9232 m/sec, 7759102 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 687 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 130/276 8/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1102342 m, 8874 m/sec, 8071601 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 692 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 135/276 8/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1147516 m, 9034 m/sec, 8382700 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 697 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 140/276 9/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1192883 m, 9073 m/sec, 8694920 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 702 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 145/276 9/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1235664 m, 8556 m/sec, 8990971 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 707 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 150/276 9/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1281435 m, 9154 m/sec, 9303854 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 712 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 155/276 10/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1327286 m, 9170 m/sec, 9615249 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 717 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 160/276 10/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1369625 m, 8467 m/sec, 9928498 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 722 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 165/276 10/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1415103 m, 9095 m/sec, 10241351 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 727 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 170/276 10/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1456188 m, 8217 m/sec, 10555589 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 732 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 175/276 11/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1501647 m, 9091 m/sec, 10867645 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 737 secs. Pages in use: 137
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 180/276 11/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1546856 m, 9041 m/sec, 11178717 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 742 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 185/276 11/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1592595 m, 9147 m/sec, 11490873 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 747 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 190/276 12/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1638640 m, 9209 m/sec, 11802209 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 752 secs. Pages in use: 140
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 195/276 12/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1683941 m, 9060 m/sec, 12113010 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 757 secs. Pages in use: 140
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 200/276 12/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1725679 m, 8347 m/sec, 12424450 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 762 secs. Pages in use: 141
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 205/276 13/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1765485 m, 7961 m/sec, 12718514 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 767 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 210/276 13/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1810649 m, 9032 m/sec, 13028281 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 772 secs. Pages in use: 143
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 215/276 13/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1855969 m, 9064 m/sec, 13338399 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 777 secs. Pages in use: 143
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 220/276 14/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1901281 m, 9062 m/sec, 13648553 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 782 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 225/276 14/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1943841 m, 8512 m/sec, 13960735 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 787 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 230/276 14/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 1989521 m, 9136 m/sec, 14273920 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 792 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 235/276 14/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 2035569 m, 9209 m/sec, 14588777 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 797 secs. Pages in use: 146
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 240/276 15/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 2081116 m, 9109 m/sec, 14901086 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 802 secs. Pages in use: 147
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 245/276 15/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 2123269 m, 8430 m/sec, 15214600 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 807 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 250/276 15/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 2163346 m, 8015 m/sec, 15525376 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 812 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 255/276 16/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 2202513 m, 7833 m/sec, 15836062 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 817 secs. Pages in use: 150
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 260/276 16/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 2239803 m, 7458 m/sec, 16147377 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 822 secs. Pages in use: 150
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 265/276 16/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 2278344 m, 7708 m/sec, 16458155 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 827 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 270/276 16/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 2318678 m, 8066 m/sec, 16771335 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 832 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 275/276 17/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 2358286 m, 7921 m/sec, 17085302 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 837 secs. Pages in use: 153
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 47 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 842 secs. Pages in use: 153
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 37 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 275 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14
[[35mlola[0m][I] time limit : 2758 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 21364
[[35mlola[0m][I] fired transitions : 303918
[[35mlola[0m][I] time used : 5
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 5/275 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 47377 m, -462181 m/sec, 292267 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 847 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 10/275 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 90282 m, 8581 m/sec, 581680 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 852 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 15/275 1/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 133984 m, 8740 m/sec, 879867 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 857 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 20/275 2/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 174436 m, 8090 m/sec, 1178955 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 862 secs. Pages in use: 158
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 25/275 2/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 217944 m, 8701 m/sec, 1483389 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 867 secs. Pages in use: 159
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 30/275 2/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 261896 m, 8790 m/sec, 1786250 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 872 secs. Pages in use: 159
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 35/275 3/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 305710 m, 8762 m/sec, 2083990 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 877 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 40/275 3/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 348945 m, 8647 m/sec, 2381983 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 882 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 45/275 3/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 390163 m, 8243 m/sec, 2681253 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 887 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 50/275 3/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 432057 m, 8378 m/sec, 2976141 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 892 secs. Pages in use: 163
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 55/275 4/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 474563 m, 8501 m/sec, 3269598 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 897 secs. Pages in use: 164
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 60/275 4/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 514858 m, 8059 m/sec, 3570209 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 902 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 65/275 4/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 558279 m, 8684 m/sec, 3869615 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 907 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 70/275 5/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 602558 m, 8855 m/sec, 4168592 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 912 secs. Pages in use: 168
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 75/275 5/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 643863 m, 8261 m/sec, 4471849 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 917 secs. Pages in use: 168
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 80/275 5/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 686311 m, 8489 m/sec, 4772930 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 922 secs. Pages in use: 169
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 CTL EXCL 85/275 5/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 724514 m, 7640 m/sec, 5075709 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 927 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 47 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 932 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 296 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 35 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1216
[[35mlola[0m][I] fired transitions : 1215
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 333 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 32 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1209
[[35mlola[0m][I] fired transitions : 1208
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 381 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 5/381 2/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 77578 m, 15515 m/sec, 294586 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 937 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 10/381 3/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 147321 m, 13948 m/sec, 592580 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 942 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 15/381 4/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 214246 m, 13385 m/sec, 892645 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 947 secs. Pages in use: 171
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 20/381 5/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 278087 m, 12768 m/sec, 1192378 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 952 secs. Pages in use: 172
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 25/381 6/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 334065 m, 11195 m/sec, 1494801 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 957 secs. Pages in use: 174
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 30/381 7/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 394319 m, 12050 m/sec, 1796131 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 962 secs. Pages in use: 175
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 35/381 8/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 450488 m, 11233 m/sec, 2097405 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 967 secs. Pages in use: 177
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 40/381 9/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 507446 m, 11391 m/sec, 2407482 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 972 secs. Pages in use: 179
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 45/381 10/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 566207 m, 11752 m/sec, 2719206 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 977 secs. Pages in use: 180
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 50/381 11/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 621832 m, 11125 m/sec, 3030398 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 982 secs. Pages in use: 182
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 55/381 12/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 676421 m, 10917 m/sec, 3340517 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 987 secs. Pages in use: 183
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 60/381 13/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 731748 m, 11065 m/sec, 3652655 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 992 secs. Pages in use: 185
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 65/381 14/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 785337 m, 10717 m/sec, 3956349 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 997 secs. Pages in use: 186
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 70/381 14/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 838350 m, 10602 m/sec, 4256398 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1002 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 75/381 15/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 888209 m, 9971 m/sec, 4556155 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1007 secs. Pages in use: 189
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 80/381 16/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 938687 m, 10095 m/sec, 4857915 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1012 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 85/381 17/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 987858 m, 9834 m/sec, 5159692 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1017 secs. Pages in use: 191
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 90/381 17/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1037630 m, 9954 m/sec, 5471340 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1022 secs. Pages in use: 193
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 95/381 18/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1082764 m, 9026 m/sec, 5774310 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1027 secs. Pages in use: 194
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 100/381 19/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1139681 m, 11383 m/sec, 6079256 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1032 secs. Pages in use: 195
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 105/381 20/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1203498 m, 12763 m/sec, 6380859 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1037 secs. Pages in use: 197
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 110/381 21/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1263450 m, 11990 m/sec, 6681345 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1042 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 115/381 22/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1323331 m, 11976 m/sec, 6978671 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1047 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 120/381 23/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1384260 m, 12185 m/sec, 7275005 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1052 secs. Pages in use: 202
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 125/381 23/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1442428 m, 11633 m/sec, 7570631 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1057 secs. Pages in use: 202
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 130/381 24/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1494751 m, 10464 m/sec, 7863152 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1062 secs. Pages in use: 204
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 135/381 25/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1548324 m, 10714 m/sec, 8159652 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1067 secs. Pages in use: 206
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 140/381 26/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1601187 m, 10572 m/sec, 8457391 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1072 secs. Pages in use: 207
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 145/381 26/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1659089 m, 11580 m/sec, 8759433 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1077 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 150/381 27/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1716162 m, 11414 m/sec, 9058719 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1082 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 155/381 28/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1766988 m, 10165 m/sec, 9357454 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1087 secs. Pages in use: 211
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 160/381 29/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1818030 m, 10208 m/sec, 9656026 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1092 secs. Pages in use: 213
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 165/381 29/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1869962 m, 10386 m/sec, 9956570 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1097 secs. Pages in use: 213
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 170/381 30/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1915949 m, 9197 m/sec, 10257592 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1102 secs. Pages in use: 216
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 175/381 31/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 1975400 m, 11890 m/sec, 10558261 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1107 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 180/381 32/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2029662 m, 10852 m/sec, 10855482 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1112 secs. Pages in use: 218
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 185/381 33/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2085243 m, 11116 m/sec, 11155973 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1117 secs. Pages in use: 220
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 190/381 34/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2142483 m, 11448 m/sec, 11466966 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1122 secs. Pages in use: 222
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 195/381 35/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2190618 m, 9627 m/sec, 11778574 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1127 secs. Pages in use: 223
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 200/381 36/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2254908 m, 12858 m/sec, 12085741 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1132 secs. Pages in use: 225
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 205/381 37/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2315083 m, 12035 m/sec, 12383754 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1137 secs. Pages in use: 226
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 210/381 38/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2375127 m, 12008 m/sec, 12692276 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1142 secs. Pages in use: 229
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 215/381 39/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2432115 m, 11397 m/sec, 13001946 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1147 secs. Pages in use: 230
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 220/381 39/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2491385 m, 11854 m/sec, 13311823 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1152 secs. Pages in use: 230
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 225/381 40/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2550859 m, 11894 m/sec, 13622214 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1157 secs. Pages in use: 232
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 230/381 41/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2604815 m, 10791 m/sec, 13924627 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1162 secs. Pages in use: 234
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 235/381 42/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2651729 m, 9382 m/sec, 14223163 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1167 secs. Pages in use: 235
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 240/381 42/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2702227 m, 10099 m/sec, 14519012 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1172 secs. Pages in use: 236
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 245/381 43/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2752672 m, 10089 m/sec, 14814068 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1177 secs. Pages in use: 237
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 250/381 44/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2808287 m, 11123 m/sec, 15120218 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1182 secs. Pages in use: 240
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 255/381 44/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2861230 m, 10588 m/sec, 15429762 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1187 secs. Pages in use: 240
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 260/381 45/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2908447 m, 9443 m/sec, 15738468 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1192 secs. Pages in use: 241
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 265/381 46/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 2964596 m, 11229 m/sec, 16046766 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1197 secs. Pages in use: 243
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 270/381 46/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3014609 m, 10002 m/sec, 16349921 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1202 secs. Pages in use: 244
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 275/381 47/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3067584 m, 10595 m/sec, 16651935 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1207 secs. Pages in use: 245
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 280/381 48/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3118066 m, 10096 m/sec, 16961448 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1212 secs. Pages in use: 247
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 285/381 49/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3173740 m, 11134 m/sec, 17275405 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1217 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 290/381 50/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3230742 m, 11400 m/sec, 17586531 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1222 secs. Pages in use: 250
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 295/381 51/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3287070 m, 11265 m/sec, 17901223 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1227 secs. Pages in use: 252
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 300/381 51/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3339669 m, 10519 m/sec, 18206989 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1232 secs. Pages in use: 252
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 305/381 52/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3388108 m, 9687 m/sec, 18518647 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1237 secs. Pages in use: 254
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 310/381 53/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3437056 m, 9789 m/sec, 18829119 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1242 secs. Pages in use: 256
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 315/381 53/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3486415 m, 9871 m/sec, 19139336 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1247 secs. Pages in use: 256
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 320/381 54/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3534254 m, 9567 m/sec, 19449014 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1252 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 325/381 55/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3582307 m, 9610 m/sec, 19752658 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1257 secs. Pages in use: 259
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 330/381 55/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3631248 m, 9788 m/sec, 20057790 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1262 secs. Pages in use: 260
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 335/381 56/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3682710 m, 10292 m/sec, 20358173 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1267 secs. Pages in use: 262
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 340/381 57/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3728476 m, 9153 m/sec, 20655427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1272 secs. Pages in use: 263
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 345/381 57/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3772469 m, 8798 m/sec, 20954822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1277 secs. Pages in use: 263
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 350/381 58/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3815707 m, 8647 m/sec, 21251860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1282 secs. Pages in use: 266
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 355/381 58/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3860185 m, 8895 m/sec, 21554245 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1287 secs. Pages in use: 266
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 360/381 59/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3903395 m, 8642 m/sec, 21855556 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1292 secs. Pages in use: 267
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 365/381 60/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3944703 m, 8261 m/sec, 22155191 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1297 secs. Pages in use: 269
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 370/381 60/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 3990614 m, 9182 m/sec, 22453149 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1302 secs. Pages in use: 270
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 375/381 61/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 4044789 m, 10835 m/sec, 22748802 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1307 secs. Pages in use: 271
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 380/381 62/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 4096531 m, 10348 m/sec, 23046632 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1312 secs. Pages in use: 273
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 29 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1317 secs. Pages in use: 273
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 380 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 2283 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 5/380 6/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 247219 m, 49443 m/sec, 285499 t fired, .
[[35mlola[0m][.] 29 CTL EXCL 5/2283 2/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 73548 m, -804596 m/sec, 277633 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1322 secs. Pages in use: 282
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 10/380 11/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 505132 m, 51582 m/sec, 587978 t fired, .
[[35mlola[0m][.] 29 CTL EXCL 10/326 3/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 143478 m, 13986 m/sec, 573663 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1327 secs. Pages in use: 289
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 15/380 16/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 759203 m, 50814 m/sec, 890047 t fired, .
[[35mlola[0m][.] 29 CTL EXCL 15/326 4/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 209925 m, 13289 m/sec, 872275 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1332 secs. Pages in use: 295
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 20/380 21/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 1010096 m, 50178 m/sec, 1188129 t fired, .
[[35mlola[0m][.] 29 CTL EXCL 20/326 5/5 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 273053 m, 12625 m/sec, 1168771 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1337 secs. Pages in use: 301
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 29 (type EXCL) for FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 25/380 27/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 1256735 m, 49327 m/sec, 1483532 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1342 secs. Pages in use: 305
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 30/380 31/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 1503135 m, 49280 m/sec, 1779382 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1347 secs. Pages in use: 308
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 35/380 36/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 1757470 m, 50867 m/sec, 2084026 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1352 secs. Pages in use: 313
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 40/380 40/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 1997958 m, 48097 m/sec, 2386958 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1357 secs. Pages in use: 318
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 45/380 44/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 2237691 m, 47946 m/sec, 2687936 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1362 secs. Pages in use: 323
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 50/380 48/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 2479240 m, 48309 m/sec, 2992988 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1367 secs. Pages in use: 327
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 55/380 53/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 2717571 m, 47666 m/sec, 3286641 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1372 secs. Pages in use: 333
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 60/380 58/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 2964898 m, 49465 m/sec, 3588816 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1377 secs. Pages in use: 338
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 65/380 62/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 3210694 m, 49159 m/sec, 3891508 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1382 secs. Pages in use: 343
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 70/380 66/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 3451678 m, 48196 m/sec, 4194981 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1387 secs. Pages in use: 348
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 75/380 70/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 3692606 m, 48185 m/sec, 4499750 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1392 secs. Pages in use: 352
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 80/380 75/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 3933577 m, 48194 m/sec, 4801085 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1397 secs. Pages in use: 358
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 85/380 80/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 4181458 m, 49576 m/sec, 5101361 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1402 secs. Pages in use: 364
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 90/380 84/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 4419954 m, 47699 m/sec, 5403421 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1407 secs. Pages in use: 368
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 95/380 88/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 4657522 m, 47513 m/sec, 5703495 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1412 secs. Pages in use: 372
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 100/380 93/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 4895204 m, 47536 m/sec, 6003558 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1417 secs. Pages in use: 378
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 105/380 98/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 5145057 m, 49970 m/sec, 6310516 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1422 secs. Pages in use: 384
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 110/380 102/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 5375837 m, 46156 m/sec, 6603221 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1427 secs. Pages in use: 388
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 115/380 107/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 5614419 m, 47716 m/sec, 6906410 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1432 secs. Pages in use: 393
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 120/380 111/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 5868355 m, 50787 m/sec, 7220380 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1437 secs. Pages in use: 398
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 125/380 116/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 6113729 m, 49074 m/sec, 7532228 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1442 secs. Pages in use: 404
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 130/380 121/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 6356207 m, 48495 m/sec, 7831448 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1447 secs. Pages in use: 409
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 135/380 125/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 6607593 m, 50277 m/sec, 8134797 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1452 secs. Pages in use: 414
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 140/380 131/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 6862967 m, 51074 m/sec, 8436634 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1457 secs. Pages in use: 420
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 145/380 136/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 7113297 m, 50066 m/sec, 8733488 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1462 secs. Pages in use: 426
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 150/380 141/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 7357665 m, 48873 m/sec, 9028470 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1467 secs. Pages in use: 431
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 155/380 145/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 7588621 m, 46191 m/sec, 9322946 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1472 secs. Pages in use: 436
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 160/380 149/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 7816709 m, 45617 m/sec, 9615331 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1477 secs. Pages in use: 440
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 165/380 153/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 8043659 m, 45390 m/sec, 9907233 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1482 secs. Pages in use: 444
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 170/380 157/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 8279804 m, 47229 m/sec, 10199672 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1487 secs. Pages in use: 450
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 175/380 161/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 8518092 m, 47657 m/sec, 10494621 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1492 secs. Pages in use: 454
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 180/380 166/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 8750159 m, 46413 m/sec, 10788424 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1497 secs. Pages in use: 459
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 185/380 170/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 8981171 m, 46202 m/sec, 11078997 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1502 secs. Pages in use: 464
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 190/380 174/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 9216793 m, 47124 m/sec, 11368512 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1507 secs. Pages in use: 469
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 195/380 178/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 9452904 m, 47222 m/sec, 11662007 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1512 secs. Pages in use: 473
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 200/380 183/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 9681982 m, 45815 m/sec, 11953316 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1517 secs. Pages in use: 479
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 205/380 187/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 9911810 m, 45965 m/sec, 12242265 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1522 secs. Pages in use: 483
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 210/380 191/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 10149767 m, 47591 m/sec, 12535058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1527 secs. Pages in use: 488
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 215/380 196/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 10380652 m, 46177 m/sec, 12827849 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1532 secs. Pages in use: 493
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 220/380 200/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 10613468 m, 46563 m/sec, 13118719 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1537 secs. Pages in use: 498
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 225/380 204/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 10844468 m, 46200 m/sec, 13411201 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1542 secs. Pages in use: 502
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 230/380 208/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 11073999 m, 45906 m/sec, 13702194 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1547 secs. Pages in use: 508
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 235/380 213/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 11316810 m, 48562 m/sec, 13997386 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1552 secs. Pages in use: 513
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 240/380 217/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 11558539 m, 48345 m/sec, 14291696 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1557 secs. Pages in use: 517
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 245/380 223/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 11807464 m, 49785 m/sec, 14586774 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1562 secs. Pages in use: 524
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 250/380 228/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 12047149 m, 47937 m/sec, 14879497 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1567 secs. Pages in use: 530
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 255/380 232/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 12274510 m, 45472 m/sec, 15172837 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1572 secs. Pages in use: 535
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 260/380 236/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 12499879 m, 45073 m/sec, 15463078 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1577 secs. Pages in use: 539
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 265/380 239/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 12725562 m, 45136 m/sec, 15755407 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1582 secs. Pages in use: 543
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 270/380 244/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 12957342 m, 46356 m/sec, 16053156 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1587 secs. Pages in use: 549
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 275/380 248/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 13197218 m, 47975 m/sec, 16358062 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1592 secs. Pages in use: 554
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 280/380 253/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 13449661 m, 50488 m/sec, 16671609 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1597 secs. Pages in use: 559
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 285/380 257/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 13697257 m, 49519 m/sec, 16984419 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1602 secs. Pages in use: 563
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 290/380 262/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 13948951 m, 50338 m/sec, 17296483 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1607 secs. Pages in use: 569
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 295/380 267/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 14195075 m, 49224 m/sec, 17609224 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1612 secs. Pages in use: 575
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 300/380 272/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 14444139 m, 49812 m/sec, 17920189 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1617 secs. Pages in use: 580
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 305/380 277/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 14689077 m, 48987 m/sec, 18230332 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1622 secs. Pages in use: 586
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 310/380 281/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 14936414 m, 49467 m/sec, 18538568 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1627 secs. Pages in use: 590
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 315/380 286/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 15190976 m, 50912 m/sec, 18849889 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1632 secs. Pages in use: 597
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-02: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-08: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 320/380 291/2000 FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-07 15447397 m, 51284 m/sec, 19160991 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1637 secs. Pages in use: 602
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-05: EF true state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-12: AGEF false tscc_search[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-2024-13: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-PT-L00020M0002C001P001G001"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FamilyReunion-PT-L00020M0002C001P001G001, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r159-smll-171636268100490"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-PT-L00020M0002C001P001G001.tgz
mv FamilyReunion-PT-L00020M0002C001P001G001 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;