fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r159-smll-171636268100482
Last Updated
July 7, 2024

About the Execution of LoLA for FamilyReunion-PT-L00010M0001C001P001G001

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
11667.184 3021053.00 3127494.00 11345.40 TF?T???FT?T?T?FT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r159-smll-171636268100482.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FamilyReunion-PT-L00010M0001C001P001G001, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r159-smll-171636268100482
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.8M
-rw-r--r-- 1 mcc users 20K Apr 11 20:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 151K Apr 11 20:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 26K Apr 11 20:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 115K Apr 11 20:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 11K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 55K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 15K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 50K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 58K Apr 11 20:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 440K Apr 11 20:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 57K Apr 11 20:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 220K Apr 11 20:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.9K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 7.3K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 552K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-01
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-02
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-03
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-04
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-07
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717195519567

FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[lola] FINAL RESULTS
[lola]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00: CONJ true CONJ
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-01: CTL false CTL model checker
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-02: CTL unknown AGGR
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-03: CTL true CTL model checker
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-04: CTL unknown AGGR
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05: CTL unknown AGGR
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06: CTL unknown AGGR
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-07: CTL false CTL model checker
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09: CTL unknown AGGR
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11: CTL unknown AGGR
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13: CTL unknown AGGR
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14: CTL false CTL model checker
[lola] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-15: CTL true CTL model checker
[lola]
[lola] Time elapsed: 3021 secs. Pages in use: 680

BK_STOP 1717198540620

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from CTLFireability.xml
[lola][I] LAUNCH task # 61 (type SKEL/FNDP) for 0 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 62 (type SKEL/EQUN) for 0 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 63 (type SKEL/SRCH) for 0 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] FINISHED task # 63 (type SKEL/SRCH) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00
[lola][I] result : true
[lola][I] markings : 64
[lola][I] fired transitions : 63
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 61 (type FNDP) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00 (obsolete)
[lola][W] CANCELED task # 62 (type EQUN) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00 (obsolete)
[lola][I] FINISHED task # 61 (type SKEL/FNDP) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] FINISHED task # 62 (type SKEL/EQUN) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00
[lola][I] result : true
[lola][I] LAUNCH task # 65 (type SKEL/FNDP) for 28 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 66 (type SKEL/EQUN) for 28 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 67 (type SKEL/SRCH) for 28 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 67 (type SKEL/SRCH) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08
[lola][I] result : true
[lola][I] markings : 70
[lola][I] fired transitions : 69
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 65 (type FNDP) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08 (obsolete)
[lola][W] CANCELED task # 66 (type EQUN) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08 (obsolete)
[lola][I] FINISHED task # 65 (type SKEL/FNDP) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] FINISHED task # 66 (type SKEL/EQUN) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08
[lola][I] result : true
[lola][I] LAUNCH task # 69 (type SKEL/FNDP) for 40 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 70 (type SKEL/EQUN) for 40 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 71 (type SKEL/SRCH) for 40 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 70 (type SKEL/EQUN) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12
[lola][I] result : true
[lola][W] CANCELED task # 69 (type FNDP) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12 (obsolete)
[lola][W] CANCELED task # 71 (type SRCH) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12 (obsolete)
[lola][I] FINISHED task # 69 (type SKEL/FNDP) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] LAUNCH task # 5 (type EXCL) for 0 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00
[lola][I] time limit : 189 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 5 (type EXCL) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00
[lola][I] result : true
[lola][I] markings : 127
[lola][I] fired transitions : 254
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 75 (type EXCL) for 28 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08
[lola][I] time limit : 199 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 73 (type FNDP) for 28 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 74 (type EQUN) for 28 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 72 (type FNDP) for 40 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 73 (type FNDP) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 74 (type EQUN) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08 (obsolete)
[lola][W] CANCELED task # 75 (type EXCL) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08 (obsolete)
[lola][I] LAUNCH task # 77 (type EXCL) for 40 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12
[lola][I] time limit : 211 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 76 (type EQUN) for 40 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 77 (type EXCL) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12
[lola][I] result : true
[lola][I] markings : 3
[lola][I] fired transitions : 2
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 72 (type FNDP) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12 (obsolete)
[lola][W] CANCELED task # 76 (type EQUN) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12 (obsolete)
[lola][I] FINISHED task # 76 (type EQUN) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12
[lola][I] result : true
[*** LOG ERROR #0001 ***] [2024-05-31 22:45:20] [status_logger] string pointer is null
[lola][I] FINISHED task # 72 (type FNDP) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] FINISHED task # 74 (type EQUN) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08
[lola][I] result : true
[lola][I] LAUNCH task # 55 (type EXCL) for 54 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14
[lola][I] time limit : 276 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 78 (type FNDP) for 0 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 79 (type EQUN) for 0 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 55 (type EXCL) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14
[lola][I] result : false
[lola][I] markings : 316
[lola][I] fired transitions : 350
[lola][I] time used : 1
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 80 (type EXCL) for 0 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00
[lola][I] time limit : 276 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 80 (type EXCL) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00
[lola][I] result : true
[lola][I] markings : 27
[lola][I] fired transitions : 26
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 78 (type FNDP) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00 (obsolete)
[lola][W] CANCELED task # 79 (type EQUN) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00 (obsolete)
[lola][I] LAUNCH task # 58 (type EXCL) for 57 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-15
[lola][I] time limit : 299 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 78 (type FNDP) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00
[lola][I] result : unknown
[lola][I] tried executions : 2
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] FINISHED task # 58 (type EXCL) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-15
[lola][I] result : true
[lola][I] markings : 214
[lola][I] fired transitions : 214
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 52 (type EXCL) for 51 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13
[lola][I] time limit : 327 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 79 (type EQUN) for FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00
[lola][I] result : true
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00: CONJ true CONJ
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-15: CTL true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
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[lola][.] 52 CTL EXCL 4/327 1/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 70189 m, 14037 m/sec, 364142 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 52 CTL EXCL 9/327 1/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 166807 m, 19323 m/sec, 918396 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 52 CTL EXCL 14/327 2/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 265185 m, 19675 m/sec, 1487184 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 52 CTL EXCL 19/327 3/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 359167 m, 18796 m/sec, 2033028 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 52 CTL EXCL 24/327 3/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 460804 m, 20327 m/sec, 2635378 t fired, .
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[lola][.] 52 CTL EXCL 29/327 4/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 561494 m, 20138 m/sec, 3226470 t fired, .
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[lola][.] 52 CTL EXCL 34/327 5/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 665581 m, 20817 m/sec, 3857195 t fired, .
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[lola][.] 52 CTL EXCL 39/327 5/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 761072 m, 19098 m/sec, 4487741 t fired, .
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[lola][.] 52 CTL EXCL 44/327 6/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 853087 m, 18403 m/sec, 5119899 t fired, .
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[lola][.] 52 CTL EXCL 49/327 6/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 930279 m, 15438 m/sec, 5717693 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 52 CTL EXCL 54/327 7/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 1035974 m, 21139 m/sec, 6335386 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 52 CTL EXCL 59/327 8/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 1139527 m, 20710 m/sec, 6952363 t fired, .
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[lola][.] 52 CTL EXCL 64/327 8/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 1250127 m, 22120 m/sec, 7570946 t fired, .
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[lola][.] 52 CTL EXCL 69/327 9/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 1358990 m, 21772 m/sec, 8182035 t fired, .
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[lola][.] 52 CTL EXCL 74/327 10/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 1459724 m, 20146 m/sec, 8793839 t fired, .
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[lola][.] 52 CTL EXCL 79/327 10/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 1556016 m, 19258 m/sec, 9369576 t fired, .
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[lola][.] 52 CTL EXCL 84/327 11/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 1666605 m, 22117 m/sec, 9988498 t fired, .
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[lola][.] 52 CTL EXCL 89/327 12/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 1778044 m, 22287 m/sec, 10608456 t fired, .
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[lola][.] 52 CTL EXCL 94/327 13/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 1891055 m, 22602 m/sec, 11231710 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 52 CTL EXCL 99/327 13/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 1995150 m, 20819 m/sec, 11821355 t fired, .
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[lola][.] 52 CTL EXCL 104/327 14/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 2083851 m, 17740 m/sec, 12382188 t fired, .
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[lola][.] 52 CTL EXCL 109/327 14/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 2177416 m, 18713 m/sec, 12966496 t fired, .
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[lola][.] 52 CTL EXCL 114/327 15/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 2262090 m, 16934 m/sec, 13576400 t fired, .
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[lola][.] 52 CTL EXCL 119/327 15/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 2350804 m, 17742 m/sec, 14182676 t fired, .
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[lola][.] 52 CTL EXCL 124/327 16/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 2448637 m, 19566 m/sec, 14785273 t fired, .
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[lola][.] 52 CTL EXCL 139/327 17/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 2716751 m, 19488 m/sec, 16568751 t fired, .
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[lola][.] 52 CTL EXCL 144/327 18/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 2813907 m, 19431 m/sec, 17180946 t fired, .
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[lola][.] 52 CTL EXCL 184/327 22/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 3547361 m, 17679 m/sec, 22092309 t fired, .
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[lola][.] 52 CTL EXCL 189/327 23/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 3631985 m, 16924 m/sec, 22733209 t fired, .
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[lola][.] 52 CTL EXCL 229/327 27/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 4318163 m, 17546 m/sec, 27614080 t fired, .
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[lola][.] 52 CTL EXCL 234/327 27/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 4402760 m, 16919 m/sec, 28224480 t fired, .
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[lola][.] 52 CTL EXCL 274/327 32/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 5108577 m, 16103 m/sec, 33049626 t fired, .
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[lola][.] 52 CTL EXCL 319/327 36/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 5842103 m, 18689 m/sec, 38452715 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 52 CTL EXCL 324/327 36/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 5929641 m, 17507 m/sec, 39035361 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 38 CTL EXCL 5/326 1/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 136270 m, 27254 m/sec, 615706 t fired, .
[lola][.] 52 CTL EXCL 5/3269 1/5 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 112596 m, -1163409 m/sec, 598514 t fired, .
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[lola][.] 38 CTL EXCL 10/326 2/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 264323 m, 25610 m/sec, 1273586 t fired, .
[lola][.] 52 CTL EXCL 10/297 2/5 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 221245 m, 21729 m/sec, 1237827 t fired, .
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[lola][.] 38 CTL EXCL 15/326 3/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 399449 m, 27025 m/sec, 1932126 t fired, .
[lola][.] 52 CTL EXCL 15/297 3/5 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 332439 m, 22238 m/sec, 1876812 t fired, .
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[lola][.] 38 CTL EXCL 20/326 4/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 529577 m, 26025 m/sec, 2587905 t fired, .
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[lola][.] 38 CTL EXCL 30/326 5/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 785811 m, 25296 m/sec, 3904988 t fired, .
[lola][.] 52 CTL EXCL 30/297 5/5 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 656006 m, 21516 m/sec, 3794451 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 38 CTL EXCL 35/326 6/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 899028 m, 22643 m/sec, 4566530 t fired, .
[lola][.] 52 CTL EXCL 35/297 5/5 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13 753671 m, 19533 m/sec, 4438946 t fired, .
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[lola][.] 38 CTL EXCL 40/326 7/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 1008425 m, 21879 m/sec, 5232288 t fired, .
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[lola][.] 38 CTL EXCL 45/326 7/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 1104101 m, 19135 m/sec, 5898958 t fired, .
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[lola][.] 38 CTL EXCL 50/326 8/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 1233515 m, 25882 m/sec, 6549809 t fired, .
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[lola][.] 38 CTL EXCL 55/326 9/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 1353558 m, 24008 m/sec, 7165417 t fired, .
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[lola][.] 38 CTL EXCL 60/326 10/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 1483197 m, 25927 m/sec, 7783043 t fired, .
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[lola][.] 38 CTL EXCL 70/326 11/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 1739128 m, 24149 m/sec, 9079884 t fired, .
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[lola][.] 38 CTL EXCL 75/326 12/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 1869307 m, 26035 m/sec, 9721446 t fired, .
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[lola][.] 38 CTL EXCL 80/326 13/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 2003919 m, 26922 m/sec, 10372967 t fired, .
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[lola][.] 38 CTL EXCL 85/326 14/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 2141868 m, 27589 m/sec, 11023169 t fired, .
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[lola][.] 38 CTL EXCL 90/326 15/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 2277156 m, 27057 m/sec, 11648273 t fired, .
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[lola][.] 38 CTL EXCL 95/326 16/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 2395744 m, 23717 m/sec, 12263626 t fired, .
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[lola][.] 38 CTL EXCL 120/326 18/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 2943040 m, 22821 m/sec, 15400794 t fired, .
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[lola][.] 38 CTL EXCL 165/326 24/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 3902167 m, 20167 m/sec, 20956551 t fired, .
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[lola][.] 38 CTL EXCL 210/326 29/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 4764479 m, 18725 m/sec, 26578411 t fired, .
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[lola][.] 38 CTL EXCL 255/326 35/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 5705195 m, 21981 m/sec, 32079577 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14: CTL false CTL model checker
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[lola][.] 35 CTL EXCL 15/326 2/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10 321057 m, 21759 m/sec, 1867862 t fired, .
[lola][.] 38 CTL EXCL 15/293 3/5 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 393226 m, 27287 m/sec, 1897682 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14: CTL false CTL model checker
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[lola][.] 35 CTL EXCL 20/326 3/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10 430128 m, 21814 m/sec, 2514522 t fired, .
[lola][.] 38 CTL EXCL 20/293 4/5 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 522344 m, 25823 m/sec, 2555303 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 35 CTL EXCL 25/326 4/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10 536884 m, 21351 m/sec, 3159935 t fired, .
[lola][.] 38 CTL EXCL 25/293 4/5 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 651619 m, 25855 m/sec, 3208556 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 35 CTL EXCL 30/326 4/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10 641859 m, 20995 m/sec, 3803556 t fired, .
[lola][.] 38 CTL EXCL 30/293 5/5 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11 779531 m, 25582 m/sec, 3870898 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 35 CTL EXCL 35/326 5/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10 741909 m, 20010 m/sec, 4417669 t fired, .
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[lola][.] 35 CTL EXCL 40/326 6/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10 839034 m, 19425 m/sec, 5068888 t fired, .
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[lola][.] 35 CTL EXCL 45/326 6/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10 936426 m, 19478 m/sec, 5720844 t fired, .
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[lola][.] 35 CTL EXCL 55/326 7/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10 1106909 m, 16105 m/sec, 7029266 t fired, .
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[lola][.]
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[lola][.] 35 CTL EXCL 100/326 13/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10 2051680 m, 21100 m/sec, 12647502 t fired, .
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[lola][I] LAUNCH task # 32 (type EXCL) for 31 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09
[lola][I] time limit : 354 sec
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00: CONJ true CONJ
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14: CTL false CTL model checker
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[lola][.] 32 CTL EXCL 4/354 1/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 110768 m, 22153 m/sec, 400284 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 32 CTL EXCL 9/354 2/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 260710 m, 29988 m/sec, 1066006 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 32 CTL EXCL 14/354 4/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 419603 m, 31778 m/sec, 1715137 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 32 CTL EXCL 19/354 4/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 544265 m, 24932 m/sec, 2369159 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 32 CTL EXCL 24/354 5/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 672983 m, 25743 m/sec, 3008678 t fired, .
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[lola][.] 32 CTL EXCL 29/354 6/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 815603 m, 28524 m/sec, 3633678 t fired, .
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[lola][.] 32 CTL EXCL 34/354 7/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 983171 m, 33513 m/sec, 4290460 t fired, .
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[lola][.] 32 CTL EXCL 39/354 8/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 1104597 m, 24285 m/sec, 4894745 t fired, .
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[lola][.] 32 CTL EXCL 44/354 9/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 1222140 m, 23508 m/sec, 5559166 t fired, .
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[lola][.] 32 CTL EXCL 49/354 10/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 1344481 m, 24468 m/sec, 6201293 t fired, .
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[lola][.] 32 CTL EXCL 89/354 16/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 2269263 m, 22913 m/sec, 11146479 t fired, .
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[lola][.] 32 CTL EXCL 94/354 16/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 2381596 m, 22466 m/sec, 11755419 t fired, .
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[lola][.] 32 CTL EXCL 134/354 22/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 3344731 m, 25304 m/sec, 16658864 t fired, .
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[lola][.] 32 CTL EXCL 139/354 23/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 3455853 m, 22224 m/sec, 17291822 t fired, .
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[lola][.] 32 CTL EXCL 149/354 24/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 3688841 m, 22115 m/sec, 18485364 t fired, .
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[lola][.] 32 CTL EXCL 179/354 28/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 4321651 m, 26286 m/sec, 22153219 t fired, .
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[lola][.] 32 CTL EXCL 184/354 29/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 4453989 m, 26467 m/sec, 22788411 t fired, .
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[lola][.] 32 CTL EXCL 224/354 34/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 5361613 m, 22378 m/sec, 27609053 t fired, .
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[lola][.] 32 CTL EXCL 269/354 39/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 6276198 m, 16982 m/sec, 33104049 t fired, .
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[lola][.] 32 CTL EXCL 314/354 45/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 7280731 m, 22375 m/sec, 38627919 t fired, .
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[lola][I] LAUNCH task # 26 (type EXCL) for 25 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-07
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[lola][I] LAUNCH task # 32 (type EXCL) for 31 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00: CONJ true CONJ
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-07: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-15: CTL true CTL model checker
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[lola][.] 32 CTL EXCL 5/354 2/5 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 159895 m, -1609628 m/sec, 589437 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 32 CTL EXCL 10/354 3/5 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 301390 m, 28299 m/sec, 1238783 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 32 CTL EXCL 15/354 4/5 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 450860 m, 29894 m/sec, 1869862 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 32 CTL EXCL 20/354 4/5 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09 569912 m, 23810 m/sec, 2512121 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 23 CTL EXCL 15/408 5/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 663146 m, 46336 m/sec, 1841098 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 23 CTL EXCL 20/408 6/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 883339 m, 44038 m/sec, 2483696 t fired, .
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[lola][.] 23 CTL EXCL 25/408 7/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 1102401 m, 43812 m/sec, 3102999 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 23 CTL EXCL 60/408 17/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 2527025 m, 35588 m/sec, 7564357 t fired, .
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[lola][.] 23 CTL EXCL 65/408 18/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 2713599 m, 37314 m/sec, 8198427 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 23 CTL EXCL 105/408 28/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 4355188 m, 37934 m/sec, 13181812 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 23 CTL EXCL 110/408 29/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 4534096 m, 35781 m/sec, 13773888 t fired, .
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[lola][.] 23 CTL EXCL 115/408 30/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 4694288 m, 32038 m/sec, 14367934 t fired, .
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[lola][.] 23 CTL EXCL 120/408 31/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 4879668 m, 37076 m/sec, 15010410 t fired, .
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[lola][.] 23 CTL EXCL 125/408 32/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 5051455 m, 34357 m/sec, 15656349 t fired, .
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[lola][.] 23 CTL EXCL 150/408 37/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 5987874 m, 39341 m/sec, 18702709 t fired, .
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[lola][.] 23 CTL EXCL 155/408 38/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 6174985 m, 37422 m/sec, 19343868 t fired, .
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[lola][.] 23 CTL EXCL 195/408 49/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 7863463 m, 45033 m/sec, 24375601 t fired, .
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[lola][.] 23 CTL EXCL 200/408 50/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 8087224 m, 44752 m/sec, 25014354 t fired, .
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[lola][.] 23 CTL EXCL 240/408 60/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 9588370 m, 34750 m/sec, 29919358 t fired, .
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[lola][.] 23 CTL EXCL 245/408 61/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 9770645 m, 36455 m/sec, 30532788 t fired, .
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[lola][.] 23 CTL EXCL 285/408 70/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 11076553 m, 30541 m/sec, 35403205 t fired, .
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[lola][.] 23 CTL EXCL 290/408 71/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 11226987 m, 30086 m/sec, 36037172 t fired, .
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[lola][.] 23 CTL EXCL 330/408 79/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 12564686 m, 31136 m/sec, 40840202 t fired, .
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[lola][.] 23 CTL EXCL 335/408 80/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 12732712 m, 33605 m/sec, 41432185 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14: CTL false CTL model checker
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[lola][.] 20 CTL EXCL 10/407 9/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05 855531 m, 82840 m/sec, 1277387 t fired, .
[lola][.] 23 CTL EXCL 10/339 3/5 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 445321 m, 41857 m/sec, 1235887 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 20 CTL EXCL 15/407 12/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05 1266167 m, 82127 m/sec, 1911612 t fired, .
[lola][.] 23 CTL EXCL 15/339 5/5 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06 666398 m, 44215 m/sec, 1851418 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 20 CTL EXCL 20/407 15/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05 1702113 m, 87189 m/sec, 2539637 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
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[lola][.] 20 CTL EXCL 25/407 18/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05 2156672 m, 90911 m/sec, 3186334 t fired, .
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[lola][.] 20 CTL EXCL 30/407 21/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05 2563752 m, 81416 m/sec, 3836190 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
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[lola][.] 20 CTL EXCL 35/407 23/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05 2964452 m, 80140 m/sec, 4475167 t fired, .
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[lola][.] 20 CTL EXCL 50/407 32/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05 4269664 m, 90107 m/sec, 6409923 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-00: CONJ true CONJ
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-07: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-15: CTL true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13: CTL 0 0 0 0 1 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 20 CTL EXCL 55/407 35/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05 4718989 m, 89865 m/sec, 7060725 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-07: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-15: CTL true CTL model checker
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09: CTL 0 0 0 0 1 0 1 0
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13: CTL 0 0 0 0 1 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 20 CTL EXCL 60/407 39/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05 5169632 m, 90128 m/sec, 7704974 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-07: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-15: CTL true CTL model checker
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09: CTL 0 0 0 0 1 0 1 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 20 CTL EXCL 65/407 43/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05 5626843 m, 91442 m/sec, 8359823 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-07: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-15: CTL true CTL model checker
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09: CTL 0 0 0 0 1 0 1 0
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13: CTL 0 0 0 0 1 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 20 CTL EXCL 70/407 47/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05 6058978 m, 86427 m/sec, 9019260 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-07: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-15: CTL true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-13: CTL 0 0 0 0 1 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 20 CTL EXCL 75/407 50/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05 6435853 m, 75375 m/sec, 9680596 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-07: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-15: CTL true CTL model checker
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-09: CTL 0 0 0 0 1 0 1 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 20 CTL EXCL 80/407 53/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05 6813073 m, 75444 m/sec, 10330555 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-07: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-15: CTL true CTL model checker
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 20 CTL EXCL 85/407 56/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-05 7209467 m, 79278 m/sec, 10972480 t fired, .
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[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-07: CTL false CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-08: EF true findpath
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-12: DISJ true state space
[lola][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLFireability-2024-14: CTL false CTL model checker

========== file over 1MB has been truncated ======
retrieve it from the run archives if needed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-PT-L00010M0001C001P001G001"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FamilyReunion-PT-L00010M0001C001P001G001, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r159-smll-171636268100482"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-PT-L00010M0001C001P001G001.tgz
mv FamilyReunion-PT-L00010M0001C001P001G001 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;