About the Execution of LoLA for FamilyReunion-PT-L00010M0001C001P001G001
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16208.407 | 3062218.00 | 3009668.00 | 11647.50 | TTT?FF?FFF???T?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r159-smll-171636268100481.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FamilyReunion-PT-L00010M0001C001P001G001, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r159-smll-171636268100481
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.8M
-rw-r--r-- 1 mcc users 20K Apr 11 20:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 151K Apr 11 20:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 26K Apr 11 20:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 115K Apr 11 20:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 11K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 55K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 15K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 50K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 58K Apr 11 20:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 440K Apr 11 20:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 57K Apr 11 20:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 220K Apr 11 20:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.9K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 7.3K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 552K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-00
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-01
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-02
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-03
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-04
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-05
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-06
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-07
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-08
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-09
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-10
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-11
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-13
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-14
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717195421180
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717198483398
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 52 (type SKEL/SRCH) for 15 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 53 (type SKEL/SRCH) for 36 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 53 (type SKEL/SRCH) for FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 52 (type SKEL/SRCH) for FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 646
[[35mlola[0m][I] fired transitions : 646
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 54 (type SKEL/SRCH) for 21 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 54 (type SKEL/SRCH) for FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] planning for FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-07 stopped (result already fixed).
[*** LOG ERROR #0001 ***] [2024-05-31 22:43:52] [status_logger] string pointer is null
[[35mlola[0m][I] planning for FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-05 stopped (result already fixed).
[[35mlola[0m][I] LAUNCH task # 25 (type CNST) for 24 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 28 (type CNST) for 27 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 28 (type CNST) for FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 25 (type CNST) for FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 13 (type CNST) for 12 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 13 (type CNST) for FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 7 (type CNST) for 6 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 7 (type CNST) for FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 4 (type CNST) for 3 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 44 (type CNST) for 43 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 4 (type CNST) for FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 44 (type CNST) for FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 36 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 512 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 58 (type EQUN) for 49 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 58 (type EQUN) for FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-05: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-07: CTL false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-13: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-15: AXAG 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 4/512 2/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12 232703 m, 46540 m/sec, 1226581 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-00: INITIAL true preprocessing[0m
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[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-05: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-07: CTL false skeleton: CTL model checker[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-13: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-15: AXAG 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 9/512 3/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12 460992 m, 45657 m/sec, 2608857 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-05: LTL/CTL false skeleton: LTL model checker[0m
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[[35mlola[0m][.] [1m[31mFamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-08: INITIAL false preprocessing[0m
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[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12: DISJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-15: AXAG 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 14/512 4/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12 687370 m, 45275 m/sec, 4011466 t fired, .
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[[35mlola[0m][.] 39 CTL EXCL 19/512 6/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12 904539 m, 43433 m/sec, 5392638 t fired, .
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[[35mlola[0m][.] 39 CTL EXCL 24/512 7/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12 1134427 m, 45977 m/sec, 6827038 t fired, .
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[[35mlola[0m][.] 39 CTL EXCL 29/512 9/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12 1354442 m, 44003 m/sec, 8230256 t fired, .
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[[35mlola[0m][.] 39 CTL EXCL 34/512 10/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12 1575873 m, 44286 m/sec, 9639246 t fired, .
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[[35mlola[0m][.] 39 CTL EXCL 39/512 11/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12 1796279 m, 44081 m/sec, 11027257 t fired, .
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[[35mlola[0m][.] 39 CTL EXCL 489/512 110/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12 18742365 m, 33570 m/sec, 131709631 t fired, .
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[[35mlola[0m][.] 39 CTL EXCL 494/512 111/2000 FamilyReunion-PT-L00010M0001C001P001G001-CTLCardinality-2024-12 18912144 m, 33955 m/sec, 132978256 t fired, .
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-PT-L00010M0001C001P001G001"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FamilyReunion-PT-L00010M0001C001P001G001, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r159-smll-171636268100481"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-PT-L00010M0001C001P001G001.tgz
mv FamilyReunion-PT-L00010M0001C001P001G001 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;