About the Execution of LoLA for FamilyReunion-COL-L00200M0020C010P010G005
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16199.764 | 419303.00 | 740935.00 | 1343.00 | [undef] | Cannot compute |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r159-smll-171636268000419.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FamilyReunion-COL-L00200M0020C010P010G005, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r159-smll-171636268000419
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 580K
-rw-r--r-- 1 mcc users 7.2K Apr 12 04:00 CTLCardinality.txt
-rw-r--r-- 1 mcc users 75K Apr 12 04:00 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Apr 12 01:10 CTLFireability.txt
-rw-r--r-- 1 mcc users 42K Apr 12 01:10 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.4K Apr 12 11:43 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 82K Apr 12 11:43 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Apr 12 09:45 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 91K Apr 12 09:45 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 146K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717160344202
BK_STOP 1717160763505
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] LAUNCH task # 70 (type SKEL/FNDP) for 0 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 71 (type SKEL/EQUN) for 0 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 72 (type SKEL/SRCH) for 0 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 72 (type SKEL/SRCH) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 70 (type FNDP) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00 (obsolete)
[[35mlola[0m][W] CANCELED task # 71 (type EQUN) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00 (obsolete)
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 75 (type SKEL/FNDP) for 27 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 76 (type SKEL/EQUN) for 27 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 77 (type SKEL/SRCH) for 27 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 70 (type SKEL/FNDP) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 75 (type SKEL/FNDP) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 76 (type EQUN) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05 (obsolete)
[[35mlola[0m][W] CANCELED task # 77 (type SRCH) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05 (obsolete)
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 80 (type SKEL/FNDP) for 47 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 81 (type SKEL/EQUN) for 47 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 82 (type SKEL/SRCH) for 47 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 82 (type SKEL/SRCH) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 80 (type FNDP) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09 (obsolete)
[[35mlola[0m][W] CANCELED task # 81 (type EQUN) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09 (obsolete)
[[35mlola[0m][I] Places: 144109, Transitions: 134279
[[35mlola[0m][I] FINISHED task # 80 (type SKEL/FNDP) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 81 (type SKEL/EQUN) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 76 (type SKEL/EQUN) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 71 (type SKEL/EQUN) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00
[[35mlola[0m][I] result : true
[[35mlola[0m][W] findlow criterion violated for transition 59
[[35mlola[0m][W] findlow criterion violated for transition 64
[[35mlola[0m][W] findlow criterion violated for transition 63
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][W] findlow criterion violated for transition 4
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][W] findlow criterion violated for transition 5
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][W] findlow criterion violated for transition 6
[[35mlola[0m][W] findlow criterion violated for transition 58
[[35mlola[0m][W] findlow criterion violated for transition 53
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][W] findlow criterion violated for transition 12
[[35mlola[0m][W] findlow criterion violated for transition 13
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][W] findlow criterion violated for transition 50
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][W] findlow criterion violated for transition 45
[[35mlola[0m][W] findlow criterion violated for transition 43
[[35mlola[0m][W] findlow criterion violated for transition 39
[[35mlola[0m][W] findlow criterion violated for transition 35
[[35mlola[0m][W] findlow criterion violated for transition 34
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][W] findlow criterion violated for transition 26
[[35mlola[0m][W] findlow criterion violated for transition 29
[[35mlola[0m][W] findlow criterion violated for transition 28
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][W] findlow criterion violated for 19 clusters
[[35mlola[0m][I] Time for checking findlow: 143
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 1 0 0 0 4 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 1 0 0 0 4 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 1 0 0 0 4 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 1 0 0 0 4 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 1 0 0 0 4 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 1 0 0 0 4 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 1 0 0 0 4 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 1 0 0 0 4 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 83 (type SKEL/SRCH) for 0 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 84 (type SKEL/SRCH) for 59 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 85 (type SKEL/SRCH) for 65 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 1 0 4 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 83 LTL SRCH 0/3270 0/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00 --
[[35mlola[0m][.] 84 LTL SRCH 0/3270 0/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 --
[[35mlola[0m][.] 85 LTL SRCH 0/3270 0/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 --
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 86 (type SKEL/SRCH) for 62 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 83 (type SKEL/SRCH) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 11512
[[35mlola[0m][I] fired transitions : 11512
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Rule S: 0 transitions removed,201 places removed
[[35mlola[0m][I] FINISHED task # 86 (type SKEL/SRCH) for FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 11713
[[35mlola[0m][I] fired transitions : 11713
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 5/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 628738 m, 125747 m/sec, 3547829 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 5/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 1013310 m, 202662 m/sec, 3305837 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 10/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 1170706 m, 108393 m/sec, 6979933 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 10/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 1819487 m, 161235 m/sec, 6267038 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 15/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 1665695 m, 98997 m/sec, 10278687 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 15/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 2577811 m, 151664 m/sec, 9023748 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 20/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 2205162 m, 107893 m/sec, 13631230 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 20/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 3290515 m, 142540 m/sec, 11805290 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 25/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 2808087 m, 120585 m/sec, 17274032 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 25/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 4075689 m, 157034 m/sec, 14646126 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 30/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 3310959 m, 100574 m/sec, 20581533 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 30/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 4859070 m, 156676 m/sec, 17438169 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 35/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 3791853 m, 96178 m/sec, 23768960 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 35/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 5665291 m, 161244 m/sec, 20282917 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 40/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 4210870 m, 83803 m/sec, 26812328 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 40/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 6337521 m, 134446 m/sec, 22860582 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 45/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 4583694 m, 74564 m/sec, 29713763 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 45/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 7092441 m, 150984 m/sec, 25620908 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 50/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 4993284 m, 81918 m/sec, 32676005 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 50/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 7778886 m, 137289 m/sec, 28391847 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 55/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 5407340 m, 82811 m/sec, 35611847 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 55/3270 2/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 8414119 m, 127046 m/sec, 31015856 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 60/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 5821007 m, 82733 m/sec, 38576440 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 60/3270 2/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 9010870 m, 119350 m/sec, 33592723 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 65/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 6180161 m, 71830 m/sec, 41264965 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 65/3270 2/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 9616462 m, 121118 m/sec, 36174870 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 70/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 6627145 m, 89396 m/sec, 44264401 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 70/3270 2/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 10251645 m, 127036 m/sec, 38784275 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 75/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 7007010 m, 75973 m/sec, 47109441 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 75/3270 2/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 10864684 m, 122607 m/sec, 41239212 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 80/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 7374723 m, 73542 m/sec, 49871086 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 80/3270 2/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 11507591 m, 128581 m/sec, 43850304 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-00: CONJ 0 0 0 0 5 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-05: CONJ 0 0 0 0 3 0 0 1
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-09: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 84 LTL SRCH 85/3270 1/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-13 7765909 m, 78237 m/sec, 52690532 t fired, .
[[35mlola[0m][.] 85 LTL SRCH 85/3270 2/5 FamilyReunion-COL-L00200M0020C010P010G005-LTLCardinality-15 12065340 m, 111549 m/sec, 46270304 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 407 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00200M0020C010P010G005"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FamilyReunion-COL-L00200M0020C010P010G005, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r159-smll-171636268000419"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00200M0020C010P010G005.tgz
mv FamilyReunion-COL-L00200M0020C010P010G005 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;