fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r159-smll-171636267900401
Last Updated
July 7, 2024

About the Execution of LoLA for FamilyReunion-COL-L00050M0005C002P002G001

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
0.000 2756177.00 0.00 0.00 ?????TTT?FF???T? normal

Execution Chart

Sorry, for this execution, no execution chart could be reported.

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r159-smll-171636267900401.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FamilyReunion-COL-L00050M0005C002P002G001, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r159-smll-171636267900401
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 668K
-rw-r--r-- 1 mcc users 6.8K Apr 11 20:46 CTLCardinality.txt
-rw-r--r-- 1 mcc users 68K Apr 11 20:46 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Apr 11 20:34 CTLFireability.txt
-rw-r--r-- 1 mcc users 59K Apr 11 20:34 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 11 21:43 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 144K Apr 11 21:43 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 16K Apr 11 21:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 110K Apr 11 21:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 137K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1717150769980

FORMULA FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717153526157

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains High-Level net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading HL formula in XML format (--xmlformula)
[lola][I] reading formula from CTLCardinality.xml
[lola][I] NOTDEADLOCKFREE
[lola][I] NOTDEADLOCKFREE
[lola][I] NOTDEADLOCKFREE
[lola][I] NOTDEADLOCKFREE
[lola][I] NOTDEADLOCKFREE
[lola][I] LAUNCH task # 69 (type SKEL/EQUN) for 40 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 67 (type SKEL/SRCH) for 40 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 72 (type SKEL/EQUN) for 10 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 70 (type SKEL/SRCH) for 10 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] Places: 12245, Transitions: 10560
[lola][I] FINISHED task # 70 (type SKEL/SRCH) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02
[lola][I] result : true
[lola][I] markings : 48
[lola][I] fired transitions : 47
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 72 (type EQUN) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02 (obsolete)
[lola][I] FINISHED task # 67 (type SKEL/SRCH) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12
[lola][I] result : true
[lola][I] markings : 7
[lola][I] fired transitions : 6
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 69 (type EQUN) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12 (obsolete)
[lola][I] NOTDEADLOCKFREE
[lola][W] findlow criterion violated for transition 59
[lola][I] FINISHED task # 69 (type SKEL/EQUN) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12
[lola][I] result : true
[lola][I] FINISHED task # 72 (type SKEL/EQUN) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02
[lola][I] result : true
[lola][W] findlow criterion violated for transition 64
[lola][W] findlow criterion violated for transition 63
[lola][W] findlow criterion violated for transition 4
[lola][W] findlow criterion violated for transition 5
[lola][W] findlow criterion violated for transition 6
[lola][W] findlow criterion violated for transition 58
[lola][W] findlow criterion violated for transition 53
[lola][W] findlow criterion violated for transition 12
[lola][W] findlow criterion violated for transition 13
[lola][W] findlow criterion violated for transition 50
[lola][W] findlow criterion violated for transition 45
[lola][W] findlow criterion violated for transition 43
[lola][W] findlow criterion violated for transition 39
[lola][W] findlow criterion violated for transition 35
[lola][W] findlow criterion violated for transition 34
[lola][W] findlow criterion violated for transition 26
[lola][W] findlow criterion violated for transition 29
[lola][W] findlow criterion violated for transition 28
[lola][W] findlow criterion violated for 19 clusters
[lola][I] Time for checking findlow: 5
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 1 0 0 0 4 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 1 0 0 0
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 1 0 0 0 4 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 0 0 0 2 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F 0 0 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 1 0 0 0 4 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 0 0 0 2 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 1 0 0 0 4 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 1 0 0 0 4 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 0 0 0 2 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 0 0 0 2 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
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[lola][I] LAUNCH task # 20 (type EXCL) for 19 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05
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[lola][I] FINISHED task # 20 (type EXCL) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05
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[lola][I] LAUNCH task # 75 (type EXCL) for 61 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15
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[lola][I] LAUNCH task # 78 (type EQUN) for 61 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 0 0 0 5 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 2 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 4/243 1/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 27823 m, 5564 m/sec, 29138 t fired, .
[lola][.] 78 EF STEQ 4/3414 0/5 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 sara not yet started (preprocessing).
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 0 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 0 0 0 5 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 9/243 2/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 68390 m, 8113 m/sec, 71962 t fired, .
[lola][.] 78 EF STEQ 9/3414 0/5 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 sara not yet started (preprocessing).
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[lola][I] FINISHED task # 78 (type EQUN) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15
[lola][I] result : true
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 0 0 0 5 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 14/243 4/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 111011 m, 8524 m/sec, 117149 t fired, .
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 0 0 0 5 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 19/243 6/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 194735 m, 16744 m/sec, 206050 t fired, .
[lola][.]
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 0 0 0 5 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 24/243 8/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 267330 m, 14519 m/sec, 283075 t fired, .
[lola][.]
[lola][.] Time elapsed: 210 secs. Pages in use: 8
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 0 0 0 5 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 29/243 9/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 322270 m, 10988 m/sec, 341543 t fired, .
[lola][.]
[lola][.] Time elapsed: 215 secs. Pages in use: 9
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 0 0 0 5 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 34/243 11/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 374733 m, 10492 m/sec, 397484 t fired, .
[lola][.]
[lola][.] Time elapsed: 220 secs. Pages in use: 11
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 0 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 1 0 0 5 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 39/243 12/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 421694 m, 9392 m/sec, 447590 t fired, .
[lola][.]
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[lola][I] LAUNCH task # 83 (type EQUN) for 10 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 85 (type EQUN) for 40 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 85 (type EQUN) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12
[lola][I] result : true
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 1 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 44/243 15/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 539183 m, 23497 m/sec, 572939 t fired, .
[lola][.] 83 EF STEQ 3/3373 0/5 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02 sara not yet started (preprocessing).
[lola][.]
[lola][.] Time elapsed: 230 secs. Pages in use: 15
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[lola][I] FINISHED task # 83 (type EQUN) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02
[lola][I] result : true
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 49/243 19/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 685846 m, 29332 m/sec, 729702 t fired, .
[lola][.]
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 54/243 23/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 829118 m, 28654 m/sec, 882841 t fired, .
[lola][.]
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 59/243 27/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 966422 m, 27460 m/sec, 1029695 t fired, .
[lola][.]
[lola][.] Time elapsed: 245 secs. Pages in use: 27
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 64/243 31/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 1113942 m, 29504 m/sec, 1188140 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 69/243 35/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 1262003 m, 29612 m/sec, 1346243 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 74/243 39/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 1409413 m, 29482 m/sec, 1504070 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 79/243 43/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 1556319 m, 29381 m/sec, 1661674 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 84/243 47/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 1703293 m, 29394 m/sec, 1819482 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 89/243 51/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 1852961 m, 29933 m/sec, 1980283 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 94/243 55/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 2002167 m, 29841 m/sec, 2140919 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 99/243 59/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 2149371 m, 29440 m/sec, 2299541 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 104/243 63/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 2296475 m, 29420 m/sec, 2457593 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 109/243 67/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 2443529 m, 29410 m/sec, 2615841 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 114/243 71/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 2590509 m, 29396 m/sec, 2774169 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 119/243 75/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 2735912 m, 29080 m/sec, 2930821 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 124/243 79/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 2884348 m, 29687 m/sec, 3090999 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 129/243 83/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 3034422 m, 30014 m/sec, 3253025 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 134/243 87/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 3184177 m, 29951 m/sec, 3414634 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 139/243 91/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 3334136 m, 29991 m/sec, 3576328 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 144/243 95/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 3483391 m, 29851 m/sec, 3737356 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 149/243 99/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 3632176 m, 29757 m/sec, 3897994 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 154/243 103/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 3782387 m, 30042 m/sec, 4060175 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 159/243 107/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 3931772 m, 29877 m/sec, 4221491 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 164/243 111/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 4081685 m, 29982 m/sec, 4383367 t fired, .
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[lola][.] 75 EG EXCL 169/243 115/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 4231786 m, 30020 m/sec, 4545350 t fired, .
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[lola][.] 75 EG EXCL 174/243 119/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 4379817 m, 29606 m/sec, 4705158 t fired, .
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[lola][.] 75 EG EXCL 179/243 123/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 4528586 m, 29753 m/sec, 4865865 t fired, .
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[lola][.] 75 EG EXCL 184/243 127/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 4676998 m, 29682 m/sec, 5026234 t fired, .
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[lola][.] 75 EG EXCL 189/243 131/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 4825356 m, 29671 m/sec, 5186491 t fired, .
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[lola][.] 75 EG EXCL 194/243 135/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 4973250 m, 29578 m/sec, 5346296 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 199/243 139/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 5121051 m, 29560 m/sec, 5505945 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 204/243 143/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 5267704 m, 29330 m/sec, 5665795 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 209/243 147/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 5414240 m, 29307 m/sec, 5827602 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 214/243 151/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 5560960 m, 29344 m/sec, 5989638 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 219/243 155/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 5707933 m, 29394 m/sec, 6151933 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 224/243 159/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 5853226 m, 29058 m/sec, 6312236 t fired, .
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[lola][.] 75 EG EXCL 229/243 163/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 6001277 m, 29610 m/sec, 6473754 t fired, .
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[lola][.] 75 EG EXCL 234/243 167/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 6149233 m, 29591 m/sec, 6634458 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 239/243 171/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 6296872 m, 29527 m/sec, 6795543 t fired, .
[lola][.]
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[lola][W] CANCELED task # 75 (type EXCL) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 (local timeout)
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ 0 4 0 0 6 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 1 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.]
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[lola][I] LAUNCH task # 81 (type EXCL) for 40 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12
[lola][I] time limit : 243 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 75 (type EXCL) for 61 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15
[lola][I] time limit : 3170 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 81 (type EXCL) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12
[lola][I] result : true
[lola][I] markings : 8
[lola][I] fired transitions : 7
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 75 EG EXCL 5/317 5/5 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 149399 m, -1229494 m/sec, 157842 t fired, .
[lola][.]
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[lola][I] CANCELED task # 75 (type EXCL) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15 (memory limit exceeded)
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.]
[lola][.] Time elapsed: 440 secs. Pages in use: 180
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[lola][I] LAUNCH task # 79 (type EXCL) for 10 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02
[lola][I] time limit : 351 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 79 (type EXCL) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02
[lola][I] result : true
[lola][I] markings : 49
[lola][I] fired transitions : 48
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 56 (type EXCL) for 55 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13
[lola][I] time limit : 395 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 56 CTL EXCL 5/395 8/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13 75003 m, 15000 m/sec, 75700 t fired, .
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 56 CTL EXCL 10/395 15/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13 152391 m, 15477 m/sec, 153768 t fired, .
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 56 CTL EXCL 15/395 21/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13 229078 m, 15337 m/sec, 231072 t fired, .
[lola][.]
[lola][.] Time elapsed: 455 secs. Pages in use: 196
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 56 CTL EXCL 20/395 28/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13 304819 m, 15148 m/sec, 307489 t fired, .
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 56 CTL EXCL 25/395 35/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13 380298 m, 15095 m/sec, 383963 t fired, .
[lola][.]
[lola][.] Time elapsed: 465 secs. Pages in use: 210
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[lola][I] FINISHED task # 56 (type EXCL) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13
[lola][I] result : false
[lola][I] markings : 449783
[lola][I] fired transitions : 455366
[lola][I] time used : 30
[lola][I] memory pages used : 41
[lola][I] LAUNCH task # 38 (type EXCL) for 37 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11
[lola][I] time limit : 447 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 38 (type EXCL) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11
[lola][I] result : false
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 29 (type EXCL) for 28 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08
[lola][I] time limit : 521 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 29 (type EXCL) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 17 (type EXCL) for 16 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04
[lola][I] time limit : 626 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 0/626 1/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 3122 m, 624 m/sec, 3359 t fired, .
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 5/626 2/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 22962 m, 3968 m/sec, 79839 t fired, .
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 10/626 3/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 43405 m, 4088 m/sec, 155901 t fired, .
[lola][.]
[lola][.] Time elapsed: 480 secs. Pages in use: 216
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 15/626 4/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 63798 m, 4078 m/sec, 236580 t fired, .
[lola][.]
[lola][.] Time elapsed: 485 secs. Pages in use: 216
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 20/626 4/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 80295 m, 3299 m/sec, 317466 t fired, .
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 25/626 5/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 97794 m, 3499 m/sec, 399517 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 30/626 6/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 116200 m, 3681 m/sec, 481522 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 35/626 7/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 132384 m, 3236 m/sec, 562127 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 40/626 7/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 149423 m, 3407 m/sec, 639730 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 45/626 8/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 167087 m, 3532 m/sec, 717292 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 50/626 9/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 183867 m, 3356 m/sec, 795118 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 55/626 10/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 198748 m, 2976 m/sec, 874225 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 60/626 11/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 215978 m, 3446 m/sec, 952282 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 65/626 11/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 232489 m, 3302 m/sec, 1032657 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 70/626 12/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 250417 m, 3585 m/sec, 1113512 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 75/626 13/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 269022 m, 3721 m/sec, 1191356 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 80/626 14/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 285831 m, 3361 m/sec, 1270707 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 85/626 14/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 301991 m, 3232 m/sec, 1349885 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 90/626 15/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 315947 m, 2791 m/sec, 1430033 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 95/626 16/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 331262 m, 3063 m/sec, 1509712 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 100/626 16/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 345294 m, 2806 m/sec, 1590205 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 105/626 17/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 360835 m, 3108 m/sec, 1670887 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 110/626 18/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 376566 m, 3146 m/sec, 1753468 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 115/626 18/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 391444 m, 2975 m/sec, 1836292 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 120/626 19/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 405611 m, 2833 m/sec, 1919821 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 125/626 20/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 420618 m, 3001 m/sec, 2002540 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 130/626 21/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 438309 m, 3538 m/sec, 2084881 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 135/626 21/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 455312 m, 3400 m/sec, 2168486 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 140/626 22/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 473192 m, 3576 m/sec, 2251746 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 145/626 23/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 489670 m, 3295 m/sec, 2335159 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 150/626 24/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 505077 m, 3081 m/sec, 2418644 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 155/626 25/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 519268 m, 2838 m/sec, 2502682 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 160/626 25/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 533790 m, 2904 m/sec, 2586372 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 165/626 26/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 549316 m, 3105 m/sec, 2669506 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 170/626 27/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 565584 m, 3253 m/sec, 2752487 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 175/626 28/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 580451 m, 2973 m/sec, 2836851 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 180/626 28/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 595859 m, 3081 m/sec, 2920637 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 185/626 29/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 609419 m, 2712 m/sec, 3004832 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 190/626 30/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 622182 m, 2552 m/sec, 3089167 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 195/626 30/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 635180 m, 2599 m/sec, 3173379 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 200/626 31/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 650363 m, 3036 m/sec, 3256176 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 205/626 32/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 667305 m, 3388 m/sec, 3337816 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 210/626 32/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 684023 m, 3343 m/sec, 3419954 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 215/626 33/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 701939 m, 3583 m/sec, 3501582 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 220/626 33/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 718374 m, 3287 m/sec, 3584231 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 225/626 34/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 732873 m, 2899 m/sec, 3667514 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 230/626 34/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 749079 m, 3241 m/sec, 3750224 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 235/626 35/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 766474 m, 3479 m/sec, 3832733 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 240/626 36/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 783310 m, 3367 m/sec, 3915523 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 245/626 37/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 801269 m, 3591 m/sec, 3997713 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 250/626 38/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 817696 m, 3285 m/sec, 4080540 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 255/626 38/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 832223 m, 2905 m/sec, 4163779 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 260/626 39/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 848340 m, 3223 m/sec, 4246201 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 265/626 40/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 865015 m, 3335 m/sec, 4328299 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 270/626 41/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 882411 m, 3479 m/sec, 4409924 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 275/626 41/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 900065 m, 3530 m/sec, 4491546 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 280/626 42/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 914477 m, 2882 m/sec, 4574727 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 285/626 43/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 930512 m, 3207 m/sec, 4657092 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 290/626 43/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 947356 m, 3368 m/sec, 4739415 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] 17 CTL EXCL 295/626 44/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 964685 m, 3465 m/sec, 4821051 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] 17 CTL EXCL 300/626 45/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 981796 m, 3422 m/sec, 4903674 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] 17 CTL EXCL 305/626 46/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 999125 m, 3465 m/sec, 4986252 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 310/626 47/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1017704 m, 3715 m/sec, 5067530 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 315/626 47/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1033511 m, 3161 m/sec, 5150636 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 320/626 48/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1050465 m, 3390 m/sec, 5233169 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 325/626 49/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1068715 m, 3650 m/sec, 5315510 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 330/626 50/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1084784 m, 3213 m/sec, 5398642 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 335/626 50/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1099878 m, 3018 m/sec, 5482152 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 340/626 51/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1114808 m, 2986 m/sec, 5566701 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] 17 CTL EXCL 345/626 52/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1130788 m, 3196 m/sec, 5650501 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] 17 CTL EXCL 350/626 52/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1145995 m, 3041 m/sec, 5734428 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 355/626 53/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1160346 m, 2870 m/sec, 5818690 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 360/626 54/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1176974 m, 3325 m/sec, 5901978 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 365/626 55/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1193833 m, 3371 m/sec, 5986009 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 370/626 55/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1211866 m, 3606 m/sec, 6069523 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 375/626 56/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1226801 m, 2987 m/sec, 6153747 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 380/626 57/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1241211 m, 2882 m/sec, 6238200 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] 17 CTL EXCL 385/626 58/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1255637 m, 2885 m/sec, 6321958 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] 17 CTL EXCL 390/626 58/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1271445 m, 3161 m/sec, 6405447 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] 17 CTL EXCL 395/626 59/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1286338 m, 2978 m/sec, 6490272 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 400/626 60/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1300528 m, 2838 m/sec, 6574749 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 405/626 60/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1313196 m, 2533 m/sec, 6659822 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 410/626 61/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1326715 m, 2703 m/sec, 6744274 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 415/626 62/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1343021 m, 3261 m/sec, 6825669 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 420/626 62/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1359653 m, 3326 m/sec, 6904517 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 425/626 63/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1376235 m, 3316 m/sec, 6984459 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] 17 CTL EXCL 430/626 64/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1390866 m, 2926 m/sec, 7068198 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] 17 CTL EXCL 435/626 65/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1407750 m, 3376 m/sec, 7150702 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] 17 CTL EXCL 440/626 65/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1424360 m, 3322 m/sec, 7233935 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 445/626 66/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1441632 m, 3454 m/sec, 7316302 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 450/626 67/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1460179 m, 3709 m/sec, 7397979 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 455/626 68/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1474989 m, 2962 m/sec, 7477201 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 460/626 68/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1488762 m, 2754 m/sec, 7556977 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 465/626 69/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1504682 m, 3184 m/sec, 7635852 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 470/626 70/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1520542 m, 3172 m/sec, 7714992 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
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[lola][.] 17 CTL EXCL 475/626 71/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1537368 m, 3365 m/sec, 7793539 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] 17 CTL EXCL 480/626 72/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1554606 m, 3447 m/sec, 7873857 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] 17 CTL EXCL 485/626 72/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1569196 m, 2918 m/sec, 7957696 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 490/626 73/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1585439 m, 3248 m/sec, 8040572 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 495/626 73/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1601874 m, 3287 m/sec, 8123628 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 500/626 74/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1619142 m, 3453 m/sec, 8206247 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 505/626 75/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1633980 m, 2967 m/sec, 8289717 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 510/626 75/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1651126 m, 3429 m/sec, 8373170 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 515/626 76/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1668861 m, 3547 m/sec, 8455961 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] 17 CTL EXCL 520/626 77/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1683619 m, 2951 m/sec, 8540204 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
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[lola][.] 17 CTL EXCL 525/626 78/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1700158 m, 3307 m/sec, 8624642 t fired, .
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[lola][.] 17 CTL EXCL 530/626 78/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1717904 m, 3549 m/sec, 8708812 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 535/626 79/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1733877 m, 3194 m/sec, 8793471 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 540/626 80/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1750670 m, 3358 m/sec, 8877232 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 545/626 81/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1767379 m, 3341 m/sec, 8960397 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 550/626 82/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1785414 m, 3607 m/sec, 9042709 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 555/626 82/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1800232 m, 2963 m/sec, 9126660 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] 17 CTL EXCL 560/626 83/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1814852 m, 2924 m/sec, 9205399 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
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[lola][.] 17 CTL EXCL 565/626 84/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1828936 m, 2816 m/sec, 9289655 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] 17 CTL EXCL 570/626 84/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1842898 m, 2792 m/sec, 9368840 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 580/626 85/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1869235 m, 2628 m/sec, 9535667 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 585/626 86/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1885305 m, 3214 m/sec, 9614615 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 590/626 87/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1902161 m, 3371 m/sec, 9693089 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 595/626 87/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1916117 m, 2791 m/sec, 9772940 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 17 CTL EXCL 600/626 88/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1932600 m, 3296 m/sec, 9851661 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][.] 17 CTL EXCL 605/626 89/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1949026 m, 3285 m/sec, 9933723 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
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[lola][.] 17 CTL EXCL 610/626 90/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1966206 m, 3436 m/sec, 10015808 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] 17 CTL EXCL 615/626 91/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1984408 m, 3640 m/sec, 10096875 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
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[lola][.] 17 CTL EXCL 620/626 91/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 1999733 m, 3065 m/sec, 10179334 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 625/626 92/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 2013938 m, 2841 m/sec, 10262248 t fired, .
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 2 0 0 2 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 1 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
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[lola][I] LAUNCH task # 8 (type EXCL) for 3 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01
[lola][I] time limit : 625 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 17 (type EXCL) for 16 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04
[lola][I] time limit : 2500 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 8 (type EXCL) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01
[lola][I] result : false
[lola][I] markings : 2924
[lola][I] fired transitions : 2923
[lola][I] time used : 0
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 5/625 2/5 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 22858 m, -398216 m/sec, 79581 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 10/625 3/5 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 45122 m, 4452 m/sec, 161699 t fired, .
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 15/625 4/5 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 65580 m, 4091 m/sec, 244546 t fired, .
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 20/625 4/5 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 82542 m, 3392 m/sec, 328563 t fired, .
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 17 CTL EXCL 25/625 5/5 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04 100702 m, 3632 m/sec, 411571 t fired, .
[lola][.]
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ 0 1 0 0 3 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][I] LAUNCH task # 6 (type EXCL) for 3 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01
[lola][I] time limit : 823 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 6 (type EXCL) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01
[lola][I] result : false
[lola][I] markings : 1
[lola][I] time used : 0
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[lola][I] LAUNCH task # 1 (type EXCL) for 0 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00
[lola][I] time limit : 1235 sec
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[lola][I] FINISHED task # 1 (type EXCL) for FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00
[lola][I] result : true
[lola][I] markings : 8419
[lola][I] fired transitions : 11811
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[lola][I] LAUNCH task # 14 (type EXCL) for 13 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03
[lola][I] time limit : 2469 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 4/2469 4/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 124440 m, 24888 m/sec, 128974 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 9/2469 7/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 275597 m, 30231 m/sec, 286416 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 14/2469 11/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 424936 m, 29867 m/sec, 443648 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 19/2469 14/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 574285 m, 29869 m/sec, 599421 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 24/2469 16/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 723481 m, 29839 m/sec, 755281 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 29/2469 19/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 872815 m, 29866 m/sec, 911218 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] 14 CTL EXCL 34/2469 22/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 1021447 m, 29726 m/sec, 1067589 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 39/2469 25/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 1164256 m, 28561 m/sec, 1224601 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 44/2469 27/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 1310293 m, 29207 m/sec, 1381874 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] 14 CTL EXCL 49/2469 30/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 1457925 m, 29526 m/sec, 1539162 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 54/2469 33/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 1605267 m, 29468 m/sec, 1696531 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 59/2469 36/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 1753261 m, 29598 m/sec, 1853957 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] 14 CTL EXCL 64/2469 38/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 1897115 m, 28770 m/sec, 2011194 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 69/2469 41/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 2040974 m, 28771 m/sec, 2168757 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 74/2469 43/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 2189836 m, 29772 m/sec, 2327519 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] 14 CTL EXCL 79/2469 46/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 2338176 m, 29668 m/sec, 2485328 t fired, .
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[lola][.] 14 CTL EXCL 84/2469 49/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 2488051 m, 29975 m/sec, 2643065 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 99/2469 58/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 2941004 m, 30300 m/sec, 3116158 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 104/2469 60/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 3086642 m, 29127 m/sec, 3273635 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 109/2469 63/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 3230717 m, 28815 m/sec, 3431251 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 114/2469 66/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 3378746 m, 29605 m/sec, 3588792 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 119/2469 68/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 3526634 m, 29577 m/sec, 3746398 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 124/2469 71/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 3674419 m, 29557 m/sec, 3903927 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 129/2469 74/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 3820747 m, 29265 m/sec, 4061292 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 134/2469 76/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 3962959 m, 28442 m/sec, 4218724 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.]
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[lola][.] 14 CTL EXCL 139/2469 79/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 4111529 m, 29714 m/sec, 4377834 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 144/2469 82/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 4260595 m, 29813 m/sec, 4536613 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 149/2469 85/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 4408921 m, 29665 m/sec, 4694456 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 154/2469 87/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 4559424 m, 30100 m/sec, 4852928 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 159/2469 89/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 4708280 m, 29771 m/sec, 5010555 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 164/2469 92/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 4857486 m, 29841 m/sec, 5169213 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 169/2469 94/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 5006648 m, 29832 m/sec, 5327996 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.]
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[lola][.] 14 CTL EXCL 174/2469 97/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 5153913 m, 29453 m/sec, 5484871 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 179/2469 99/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 5301977 m, 29612 m/sec, 5642151 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
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[lola][.]
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[lola][.] 14 CTL EXCL 184/2469 102/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 5451255 m, 29855 m/sec, 5800466 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 189/2469 104/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 5598401 m, 29429 m/sec, 5957487 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 194/2469 106/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 5741476 m, 28615 m/sec, 6112265 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 199/2469 109/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 5890779 m, 29860 m/sec, 6269742 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 204/2469 111/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 6040322 m, 29908 m/sec, 6427510 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 209/2469 114/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 6187876 m, 29510 m/sec, 6584096 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 214/2469 116/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 6336262 m, 29677 m/sec, 6741727 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 219/2469 118/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 6483189 m, 29385 m/sec, 6898492 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] 14 CTL EXCL 224/2469 121/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 6628677 m, 29097 m/sec, 7053247 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.]
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[lola][.] 14 CTL EXCL 229/2469 123/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 6777038 m, 29672 m/sec, 7210655 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 234/2469 126/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 6924802 m, 29552 m/sec, 7367766 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 239/2469 128/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 7070020 m, 29043 m/sec, 7523042 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 244/2469 130/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 7214850 m, 28966 m/sec, 7678444 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 249/2469 133/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 7363490 m, 29728 m/sec, 7834917 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 254/2469 135/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 7510250 m, 29352 m/sec, 7990369 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 259/2469 138/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 7656082 m, 29166 m/sec, 8145466 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 264/2469 140/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 7801926 m, 29168 m/sec, 8300617 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] 14 CTL EXCL 269/2469 142/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 7947635 m, 29141 m/sec, 8455833 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] 14 CTL EXCL 274/2469 145/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 8094382 m, 29349 m/sec, 8611803 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 279/2469 147/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 8243079 m, 29739 m/sec, 8769516 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 284/2469 150/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 8390060 m, 29396 m/sec, 8926139 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 289/2469 152/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 8532754 m, 28538 m/sec, 9080631 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 294/2469 154/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 8676275 m, 28704 m/sec, 9237301 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]
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[lola][.] 14 CTL EXCL 299/2469 157/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 8817427 m, 28230 m/sec, 9394145 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
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[lola][.] 14 CTL EXCL 304/2469 159/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 8957783 m, 28071 m/sec, 9550688 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 309/2469 161/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 9098297 m, 28102 m/sec, 9708174 t fired, .
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[lola][.] 14 CTL EXCL 314/2469 164/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 9237882 m, 27917 m/sec, 9864881 t fired, .
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[lola][.] 14 CTL EXCL 319/2469 166/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 9376491 m, 27721 m/sec, 10020415 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 324/2469 168/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 9515934 m, 27888 m/sec, 10176534 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 329/2469 170/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 9657324 m, 28278 m/sec, 10334675 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 334/2469 173/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 9798518 m, 28238 m/sec, 10492912 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 339/2469 175/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 9937371 m, 27770 m/sec, 10649489 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 344/2469 177/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 10077170 m, 27959 m/sec, 10806214 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 349/2469 179/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 10223720 m, 29310 m/sec, 10963506 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 354/2469 182/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 10368616 m, 28979 m/sec, 11120055 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] 14 CTL EXCL 359/2469 184/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 10514617 m, 29200 m/sec, 11278257 t fired, .
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[lola][.] 14 CTL EXCL 364/2469 187/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 10659734 m, 29023 m/sec, 11435598 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 369/2469 189/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 10803286 m, 28710 m/sec, 11591539 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 374/2469 191/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 10947650 m, 28872 m/sec, 11747930 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 379/2469 194/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 11093537 m, 29177 m/sec, 11905737 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 384/2469 196/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 11238696 m, 29031 m/sec, 12063240 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]
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[lola][.] 14 CTL EXCL 389/2469 198/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 11379718 m, 28204 m/sec, 12218339 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
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[lola][.] 14 CTL EXCL 394/2469 201/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 11524572 m, 28970 m/sec, 12375160 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 399/2469 203/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 11670075 m, 29100 m/sec, 12531708 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] 14 CTL EXCL 404/2469 205/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 11813643 m, 28713 m/sec, 12687145 t fired, .
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[lola][.] 14 CTL EXCL 409/2469 208/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 11958447 m, 28960 m/sec, 12844126 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 414/2469 210/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 12102852 m, 28881 m/sec, 13001466 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 419/2469 212/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 12245827 m, 28595 m/sec, 13156976 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 424/2469 215/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 12391331 m, 29100 m/sec, 13314563 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 429/2469 217/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 12537736 m, 29281 m/sec, 13473300 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 434/2469 220/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 12680371 m, 28527 m/sec, 13629164 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 439/2469 222/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 12822188 m, 28363 m/sec, 13785046 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 444/2469 224/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 12968893 m, 29341 m/sec, 13942423 t fired, .
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[lola][.] 14 CTL EXCL 449/2469 227/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 13113281 m, 28877 m/sec, 14098600 t fired, .
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[lola][.] 14 CTL EXCL 454/2469 229/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 13257825 m, 28908 m/sec, 14255411 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 459/2469 232/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 13402221 m, 28879 m/sec, 14412116 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 464/2469 234/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 13544740 m, 28503 m/sec, 14567390 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 469/2469 236/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 13688124 m, 28676 m/sec, 14722854 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 474/2469 238/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 13833381 m, 29051 m/sec, 14880279 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.]
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[lola][.] 14 CTL EXCL 479/2469 241/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 13977844 m, 28892 m/sec, 15037208 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 484/2469 243/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 14117848 m, 28000 m/sec, 15191173 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] 14 CTL EXCL 489/2469 245/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 14251110 m, 26652 m/sec, 15338385 t fired, .
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[lola][.] 14 CTL EXCL 494/2469 247/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 14390343 m, 27846 m/sec, 15493945 t fired, .
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[lola][.] 14 CTL EXCL 499/2469 250/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 14528886 m, 27708 m/sec, 15649476 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 504/2469 252/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 14667285 m, 27679 m/sec, 15805731 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 509/2469 254/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 14803164 m, 27175 m/sec, 15959222 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 514/2469 256/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 14935243 m, 26415 m/sec, 16108467 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 519/2469 258/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 15067868 m, 26525 m/sec, 16257953 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
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[lola][.] 14 CTL EXCL 524/2469 260/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 15203199 m, 27066 m/sec, 16410295 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
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[lola][.] 14 CTL EXCL 529/2469 262/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 15343433 m, 28046 m/sec, 16568504 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
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[lola][.] 14 CTL EXCL 534/2469 265/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 15480518 m, 27417 m/sec, 16724718 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
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[lola][.] 14 CTL EXCL 539/2469 267/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 15618874 m, 27671 m/sec, 16879106 t fired, .
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[lola][.] 14 CTL EXCL 544/2469 269/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 15760108 m, 28246 m/sec, 17030690 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 549/2469 271/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 15906157 m, 29209 m/sec, 17188232 t fired, .
[lola][.]
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 554/2469 274/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 16053023 m, 29373 m/sec, 17347529 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 559/2469 276/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 16199321 m, 29259 m/sec, 17506334 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-00: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 1 0
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-15: F 0 0 0 0 2 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 14 CTL EXCL 564/2469 279/2000 FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03 16344664 m, 29068 m/sec, 17664197 t fired, .
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[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-01: DISJ false DISJ
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-02: EXEF true state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-05: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-06: EG true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-07: CTL true preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-08: CTL true CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-09: F false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-10: CTL false preprocessing
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-11: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-12: CONJ false state space /EXEF
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-13: CTL false CTL model checker
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-14: CTL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FamilyReunion-COL-L00050M0005C002P002G001-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0

========== file over 1MB has been truncated ======
retrieve it from the run archives if needed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00050M0005C002P002G001"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FamilyReunion-COL-L00050M0005C002P002G001, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r159-smll-171636267900401"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00050M0005C002P002G001.tgz
mv FamilyReunion-COL-L00050M0005C002P002G001 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;