About the Execution of LoLA for FamilyReunion-COL-L00010M0001C001P001G001
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16209.163 | 1464077.00 | 1349177.00 | 5989.70 | ???????F?F?????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r159-smll-171636267900388.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FamilyReunion-COL-L00010M0001C001P001G001, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r159-smll-171636267900388
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 636K
-rw-r--r-- 1 mcc users 7.4K Apr 11 20:19 CTLCardinality.txt
-rw-r--r-- 1 mcc users 81K Apr 11 20:19 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.8K Apr 11 20:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Apr 11 20:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.4K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 11 20:28 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 171K Apr 11 20:28 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.2K Apr 11 20:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 57K Apr 11 20:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 134K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-00
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-01
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-02
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-03
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-04
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-05
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-06
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-08
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-10
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-11
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-12
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-13
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-14
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717145796243
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717147260320
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] Places: 1486, Transitions: 1234
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 76 (type SKEL/CNST) for 25 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 76 (type SKEL/CNST) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 82 (type SKEL/FNDP) for 39 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 83 (type SKEL/EQUN) for 39 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 84 (type SKEL/SRCH) for 39 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 80 (type SKEL/FNDP) for 25 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 84 (type SKEL/SRCH) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 82 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09 (obsolete)
[[35mlola[0m][W] CANCELED task # 83 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09 (obsolete)
[[35mlola[0m][I] LAUNCH task # 85 (type SKEL/EQUN) for 25 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 86 (type SKEL/SRCH) for 25 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 86 (type SKEL/SRCH) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 80 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07 (obsolete)
[[35mlola[0m][W] CANCELED task # 85 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07 (obsolete)
[[35mlola[0m][I] FINISHED task # 80 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 82 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] findlow criterion violated for transition 59
[[35mlola[0m][I] FINISHED task # 83 (type SKEL/EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 85 (type SKEL/EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07
[[35mlola[0m][I] result : true
[[35mlola[0m][W] findlow criterion violated for transition 64
[[35mlola[0m][W] findlow criterion violated for transition 63
[[35mlola[0m][I] Rule S: 0 transitions removed,11 places removed
[[35mlola[0m][W] findlow criterion violated for transition 4
[[35mlola[0m][I] LAUNCH task # 90 (type EXCL) for 25 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07
[[35mlola[0m][I] time limit : 138 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 88 (type FNDP) for 25 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 89 (type EQUN) for 25 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 92 (type FNDP) for 39 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 90 (type EXCL) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 13
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 88 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07 (obsolete)
[[35mlola[0m][W] CANCELED task # 89 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07 (obsolete)
[[35mlola[0m][I] LAUNCH task # 94 (type EXCL) for 39 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09
[[35mlola[0m][I] time limit : 149 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 93 (type EQUN) for 39 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 88 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 94 (type EXCL) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 13
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 92 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09 (obsolete)
[[35mlola[0m][W] CANCELED task # 93 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09 (obsolete)
[[35mlola[0m][I] FINISHED task # 92 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 57 (type EXCL) for 54 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-10
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 93 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 89 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07
[[35mlola[0m][I] result : true
[[35mlola[0m][W] findlow criterion violated for transition 5
[*** LOG ERROR #0001 ***] [2024-05-31 08:56:37] [status_logger] string pointer is null
[[35mlola[0m][W] findlow criterion violated for transition 6
[[35mlola[0m][W] findlow criterion violated for transition 58
[[35mlola[0m][W] findlow criterion violated for transition 53
[[35mlola[0m][W] findlow criterion violated for transition 12
[[35mlola[0m][W] findlow criterion violated for transition 13
[[35mlola[0m][W] findlow criterion violated for transition 50
[[35mlola[0m][W] findlow criterion violated for transition 45
[[35mlola[0m][W] findlow criterion violated for transition 43
[[35mlola[0m][W] findlow criterion violated for transition 39
[[35mlola[0m][W] findlow criterion violated for transition 35
[[35mlola[0m][W] findlow criterion violated for transition 34
[[35mlola[0m][W] findlow criterion violated for transition 26
[[35mlola[0m][W] findlow criterion violated for transition 29
[[35mlola[0m][W] findlow criterion violated for transition 28
[[35mlola[0m][W] findlow criterion violated for 19 clusters
[[35mlola[0m][I] Time for checking findlow: 5
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-07: CONJ false state space[0m
[[35mlola[0m][.] [1m[31mFamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-09: CONJ false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-04: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 74 LTL EXCL 15/224 11/2000 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-15 1120599 m, 77445 m/sec, 1592622 t fired, .
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[[35mlola[0m][.] 74 LTL EXCL 20/224 14/2000 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-15 1483566 m, 72593 m/sec, 2129828 t fired, .
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[[35mlola[0m][.] 10 LTL EXCL 195/435 193/2000 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-03 13499129 m, 67850 m/sec, 21177280 t fired, .
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[[35mlola[0m][.] 10 LTL EXCL 200/435 198/2000 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-03 13826608 m, 65495 m/sec, 21701222 t fired, .
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[[35mlola[0m][.] 10 LTL EXCL 205/435 203/2000 FamilyReunion-COL-L00010M0001C001P001G001-LTLFireability-03 14157743 m, 66227 m/sec, 22212765 t fired, .
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00010M0001C001P001G001"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FamilyReunion-COL-L00010M0001C001P001G001, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r159-smll-171636267900388"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00010M0001C001P001G001.tgz
mv FamilyReunion-COL-L00010M0001C001P001G001 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;