MCC'2024- Execution of r159-smll-171636267900356

About the Execution of LoLA for FMS-PT-05000

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
16204.075	149063.00	151215.00	887.60	???F?F?????F??TF	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r159-smll-17163626
Waiting for the VM to be ready (probing ssh)
....................................................
==============================
Generated by BenchKit 2-5568
Executing tool lola
Input is FMS-PT-05000, examination is LTLFireabi
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r159-smll-171636267900356
====================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 424K
-rw-r--r-- 1 mcc users 7.5K May 14 13:22 CTLCardinal
-rw-r--r-- 1 mcc users 81K May 14 13:22 CTLCardinal
-rw-r--r-- 1 mcc users 5.1K May 14 13:22 CTLFireabil
-rw-r--r-- 1 mcc users 49K May 14 13:22 CTLFireabil
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericProp
-rw-r--r-- 1 mcc users 6.3K May 18 16:42 GenericProp
-rw-r--r-- 1 mcc users 3.3K Apr 22 14:44 LTLCardinal
-rw-r--r-- 1 mcc users 21K Apr 22 14:44 LTLCardinal
-rw-r--r-- 1 mcc users 2.1K Apr 22 14:44 LTLFireabil
-rw-r--r-- 1 mcc users 15K Apr 22 14:44 LTLFireabil
-rw-r--r-- 1 mcc users 6.9K Apr 11 22:10 Reachabilit
-rw-r--r-- 1 mcc users 64K Apr 11 22:10 Reachabilit
-rw-r--r-- 1 mcc users 9.7K Apr 11 22:09 Reachabilit
-rw-r--r-- 1 mcc users 88K Apr 11 22:09 Reachabilit
-rw-r--r-- 1 mcc users 1.5K Apr 22 14:44 UpperBounds
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:44 UpperBounds
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 16K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result
FORMULA_NAME FMS-PT-05000-LTLFireability-00
FORMULA_NAME FMS-PT-05000-LTLFireability-01
FORMULA_NAME FMS-PT-05000-LTLFireability-02
FORMULA_NAME FMS-PT-05000-LTLFireability-03
FORMULA_NAME FMS-PT-05000-LTLFireability-04
FORMULA_NAME FMS-PT-05000-LTLFireability-05
FORMULA_NAME FMS-PT-05000-LTLFireability-06
FORMULA_NAME FMS-PT-05000-LTLFireability-07
FORMULA_NAME FMS-PT-05000-LTLFireability-08
FORMULA_NAME FMS-PT-05000-LTLFireability-09
FORMULA_NAME FMS-PT-05000-LTLFireability-10
FORMULA_NAME FMS-PT-05000-LTLFireability-11
FORMULA_NAME FMS-PT-05000-LTLFireability-12
FORMULA_NAME FMS-PT-05000-LTLFireability-13
FORMULA_NAME FMS-PT-05000-LTLFireability-14
FORMULA_NAME FMS-PT-05000-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717140990439

FORMULA FMS-PT-05000-LTLFireability-05
FORMULA FMS-PT-05000-LTLFireability-03
FORMULA FMS-PT-05000-LTLFireability-15
FORMULA FMS-PT-05000-LTLFireability-14
FORMULA FMS-PT-05000-LTLFireability-11

BK_STOP 1717141139502

--------------------
content from stderr:

[[35mlola[0m][I] LoLA will run for 3600 seconds
[[35mlola[0m][W] [1m[33munknown unit in
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pn
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition
[[35mlola[0m][I] closed [1m[34mnet[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xm
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m
[[35mlola[0m][I] Rule S: 0 transitions
[[35mlola[0m][I] LAUNCH task # 24 (type
[[35mlola[0m][I] time limit : 120 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 9 (type
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 9 (type
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 69 (type
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 70 (type
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 76 (type
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 24 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 66 (type
[[35mlola[0m][I] time limit : 171 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 69 (type
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][W] CANCELED task # 70 (type
[[35mlola[0m][I] FINISHED task # 66 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 63 (type
[[35mlola[0m][I] time limit : 225 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 63 (type
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 54 (type
[[35mlola[0m][I] time limit : 240 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 54 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 51 (type
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 51 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 42 (type
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 70 (type
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 76 (type
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-03:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-05:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-10:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-11:
[[35mlola[0m][.] [1m[32mFMS-PT-05000-LTLFireability-14:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-00:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-01:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-02:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-04:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-06:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-07:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-08:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-09:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-12:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 42 LTL EXCL 5/276
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs.
[[35mlola[0m][.] # running tasks: 1 of
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-03:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-05:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-10:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-11:
[[35mlola[0m][.] [1m[32mFMS-PT-05000-LTLFireability-14:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-00:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-01:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-02:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-04:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-06:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-07:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-08:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-09:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-12:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 42 LTL EXCL 10/276
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs.
[[35mlola[0m][.] # running tasks: 1 of
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-03:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-05:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-10:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-11:
[[35mlola[0m][.] [1m[32mFMS-PT-05000-LTLFireability-14:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-00:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-01:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-02:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-04:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-06:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-07:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-08:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-09:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-12:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 42 LTL EXCL 15/276
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs.
[[35mlola[0m][.] # running tasks: 1 of
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-03:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-05:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-10:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-11:
[[35mlola[0m][.] [1m[32mFMS-PT-05000-LTLFireability-14:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-00:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-01:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-02:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-04:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-06:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-07:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-08:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-09:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-12:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 42 LTL EXCL 20/276
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs.
[[35mlola[0m][.] # running tasks: 1 of
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-03:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-05:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-10:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-11:
[[35mlola[0m][.] [1m[32mFMS-PT-05000-LTLFireability-14:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-00:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-01:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-02:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-04:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-06:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-07:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-08:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-09:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-12:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 42 LTL EXCL 25/276
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs.
[[35mlola[0m][.] # running tasks: 1 of
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-03:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-05:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-10:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-11:
[[35mlola[0m][.] [1m[32mFMS-PT-05000-LTLFireability-14:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-00:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-01:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-02:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-04:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-06:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-07:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-08:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-09:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-12:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 42 LTL EXCL 30/276
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs.
[[35mlola[0m][.] # running tasks: 1 of
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-03:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-05:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-10:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-11:
[[35mlola[0m][.] [1m[32mFMS-PT-05000-LTLFireability-14:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-00:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-01:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-02:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-04:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-06:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-07:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-08:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-09:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-12:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 42 LTL EXCL 35/276
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs.
[[35mlola[0m][.] # running tasks: 1 of
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-03:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-05:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-10:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-11:
[[35mlola[0m][.] [1m[32mFMS-PT-05000-LTLFireability-14:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-00:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-01:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-02:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-04:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-06:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-07:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-08:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-09:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-12:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 42 LTL EXCL 40/276
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs.
[[35mlola[0m][.] # running tasks: 1 of
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-03:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-05:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-10:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-11:
[[35mlola[0m][.] [1m[32mFMS-PT-05000-LTLFireability-14:
[[35mlola[0m][.] [1m[31mFMS-PT-05000-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-00:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-01:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-02:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-04:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-06:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-07:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-08:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-09:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-12:
[[35mlola[0m][.] FMS-PT-05000-LTLFireability-13:
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 407 Killed
7900356.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16 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======================================= lity ================= ity.txt ity.xml ity.txt ity.xml ertiesDefinition.xml ertiesVerdict.xml ity.txt ity.xml ity.txt ity.xml yCardinality.txt yCardinality.xml yFireability.txt yFireability.xml .txt .xml (invocation template) vector(from text file) FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT at most ([1m[36m--timelimit[0m) memory specification: using default[0m from [4m[34mmodel.pnml[0m mlnet[0m) net file [4m[34mmodel.pnml[0m lformula[0m) from [4m[34mLTLFireability.xml[0m removed,0 places removed EXCL) for 23 FMS-PT-05000-LTLFireability-05 CNST) for 6 FMS-PT-05000-LTLFireability-02 CNST) for FMS-PT-05000-LTLFireability-02 FNDP) for 13 FMS-PT-05000-LTLFireability-03 EQUN) for 13 FMS-PT-05000-LTLFireability-03 EQUN) for 56 FMS-PT-05000-LTLFireability-12 EXCL) for FMS-PT-05000-LTLFireability-05 5004 5005 0 1 EXCL) for 65 FMS-PT-05000-LTLFireability-15 FNDP) for FMS-PT-05000-LTLFireability-03 1 0 0 EQUN) for FMS-PT-05000-LTLFireability-03 (obsolete) EXCL) for FMS-PT-05000-LTLFireability-15 5 5 0 1 EXCL) for 62 FMS-PT-05000-LTLFireability-14 EXCL) for FMS-PT-05000-LTLFireability-14 4 3 0 1 EXCL) for 53 FMS-PT-05000-LTLFireability-11 EXCL) for FMS-PT-05000-LTLFireability-11 6 6 0 1 EXCL) for 50 FMS-PT-05000-LTLFireability-10 EXCL) for FMS-PT-05000-LTLFireability-10 5 5 0 1 EXCL) for 39 FMS-PT-05000-LTLFireability-09 EQUN) for FMS-PT-05000-LTLFireability-03 EQUN) for FMS-PT-05000-LTLFireability-12 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 22/2000 FMS-PT-05000-LTLFireability-09 3290293 m, 658058 m/sec, 6032403 t fired, . Pages in use: 22 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 44/2000 FMS-PT-05000-LTLFireability-09 6562799 m, 654501 m/sec, 12032852 t fired, . Pages in use: 44 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 66/2000 FMS-PT-05000-LTLFireability-09 9790915 m, 645623 m/sec, 17949867 t fired, . Pages in use: 66 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 87/2000 FMS-PT-05000-LTLFireability-09 12953900 m, 632597 m/sec, 23749006 t fired, . Pages in use: 87 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 108/2000 FMS-PT-05000-LTLFireability-09 16069620 m, 623144 m/sec, 29457524 t fired, . Pages in use: 108 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 129/2000 FMS-PT-05000-LTLFireability-09 19101270 m, 606330 m/sec, 35015894 t fired, . Pages in use: 129 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 150/2000 FMS-PT-05000-LTLFireability-09 22252468 m, 630239 m/sec, 40793101 t fired, . Pages in use: 150 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 171/2000 FMS-PT-05000-LTLFireability-09 25349654 m, 619437 m/sec, 46472119 t fired, . Pages in use: 171 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 192/2000 FMS-PT-05000-LTLFireability-09 28404985 m, 611066 m/sec, 52072857 t fired, . Pages in use: 192 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 215/2000 FMS-PT-05000-LTLFireability-09 31622789 m, 643560 m/sec, 57969626 t fired, . Pages in use: 215 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 237/2000 FMS-PT-05000-LTLFireability-09 34825379 m, 640518 m/sec, 63842236 t fired, . Pages in use: 237 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 259/2000 FMS-PT-05000-LTLFireability-09 38030744 m, 641073 m/sec, 69714845 t fired, . Pages in use: 259 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 279/2000 FMS-PT-05000-LTLFireability-09 41028548 m, 599560 m/sec, 75209446 t fired, . Pages in use: 279 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 300/2000 FMS-PT-05000-LTLFireability-09 44034050 m, 601100 m/sec, 80721611 t fired, . Pages in use: 300 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 321/2000 FMS-PT-05000-LTLFireability-09 47064151 m, 606020 m/sec, 86276106 t fired, . Pages in use: 321 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 343/2000 FMS-PT-05000-LTLFireability-09 50314785 m, 650126 m/sec, 92234753 t fired, . Pages in use: 343 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 365/2000 FMS-PT-05000-LTLFireability-09 53497519 m, 636546 m/sec, 98069334 t fired, . Pages in use: 365 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 385/2000 FMS-PT-05000-LTLFireability-09 56515096 m, 603515 m/sec, 103601105 t fired, . Pages in use: 385 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 405/2000 FMS-PT-05000-LTLFireability-09 59413084 m, 579597 m/sec, 108914283 t fired, . Pages in use: 405 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 427/2000 FMS-PT-05000-LTLFireability-09 62484649 m, 614313 m/sec, 114543494 t fired, . Pages in use: 427 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 448/2000 FMS-PT-05000-LTLFireability-09 65541787 m, 611427 m/sec, 120145575 t fired, . Pages in use: 448 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 468/2000 FMS-PT-05000-LTLFireability-09 68491911 m, 590024 m/sec, 125560061 t fired, . Pages in use: 468 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 489/2000 FMS-PT-05000-LTLFireability-09 71491654 m, 599948 m/sec, 131058757 t fired, . Pages in use: 489 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 508/2000 FMS-PT-05000-LTLFireability-09 74309371 m, 563543 m/sec, 136222345 t fired, . Pages in use: 508 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 529/2000 FMS-PT-05000-LTLFireability-09 77229220 m, 583969 m/sec, 141572991 t fired, . Pages in use: 529 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 550/2000 FMS-PT-05000-LTLFireability-09 80243245 m, 602805 m/sec, 147095546 t fired, . Pages in use: 550 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 570/2000 FMS-PT-05000-LTLFireability-09 83191791 m, 589709 m/sec, 152506175 t fired, . Pages in use: 570 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 591/2000 FMS-PT-05000-LTLFireability-09 86249941 m, 611630 m/sec, 158110785 t fired, . Pages in use: 591 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 1 0 3 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 612/2000 FMS-PT-05000-LTLFireability-09 89248331 m, 599678 m/sec, 163606009 t fired, . Pages in use: 612 4. Visible: 16 $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FMS-PT-05000"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FMS-PT-05000, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r159-smll-171636267900356"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FMS-PT-05000.tgz
mv FMS-PT-05000 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;