fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r159-smll-171636267800354
Last Updated
July 7, 2024

About the Execution of LoLA for FMS-PT-05000

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16207.432 251335.00 254163.00 945.80 ?????????F?????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r159-smll-171636267800354.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FMS-PT-05000, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r159-smll-171636267800354
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 424K
-rw-r--r-- 1 mcc users 7.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 81K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 21K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.9K Apr 11 22:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 64K Apr 11 22:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.7K Apr 11 22:09 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 88K Apr 11 22:09 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 16K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FMS-PT-05000-CTLFireability-2024-00
FORMULA_NAME FMS-PT-05000-CTLFireability-2024-01
FORMULA_NAME FMS-PT-05000-CTLFireability-2024-02
FORMULA_NAME FMS-PT-05000-CTLFireability-2024-03
FORMULA_NAME FMS-PT-05000-CTLFireability-2024-04
FORMULA_NAME FMS-PT-05000-CTLFireability-2024-05
FORMULA_NAME FMS-PT-05000-CTLFireability-2024-06
FORMULA_NAME FMS-PT-05000-CTLFireability-2024-07
FORMULA_NAME FMS-PT-05000-CTLFireability-2024-08
FORMULA_NAME FMS-PT-05000-CTLFireability-2024-09
FORMULA_NAME FMS-PT-05000-CTLFireability-2024-10
FORMULA_NAME FMS-PT-05000-CTLFireability-2024-11
FORMULA_NAME FMS-PT-05000-CTLFireability-2023-12
FORMULA_NAME FMS-PT-05000-CTLFireability-2023-13
FORMULA_NAME FMS-PT-05000-CTLFireability-2023-14
FORMULA_NAME FMS-PT-05000-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717140665950

FORMULA FMS-PT-05000-CTLFireability-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717140917285

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from CTLFireability.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 1 (type EXCL) for 0 FMS-PT-05000-CTLFireability-2024-00
[lola][I] time limit : 180 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 60 (type EQUN) for 33 FMS-PT-05000-CTLFireability-2024-11
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 62 (type EQUN) for 33 FMS-PT-05000-CTLFireability-2024-11
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 64 (type EQUN) for 36 FMS-PT-05000-CTLFireability-2023-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 62 (type EQUN) for FMS-PT-05000-CTLFireability-2024-11
[lola][I] result : true
[lola][I] LAUNCH task # 53 (type FNDP) for 27 FMS-PT-05000-CTLFireability-2024-09
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 60 (type EQUN) for FMS-PT-05000-CTLFireability-2024-11
[lola][I] result : unknown
[lola][I] LAUNCH task # 65 (type EQUN) for 27 FMS-PT-05000-CTLFireability-2024-09
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 53 (type FNDP) for FMS-PT-05000-CTLFireability-2024-09
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 65 (type EQUN) for FMS-PT-05000-CTLFireability-2024-09 (obsolete)
[lola][I] FINISHED task # 64 (type EQUN) for FMS-PT-05000-CTLFireability-2023-12
[lola][I] result : unknown
[lola][I] FINISHED task # 65 (type EQUN) for FMS-PT-05000-CTLFireability-2024-09
[lola][I] result : true
[lola][I] FINISHED task # 1 (type EXCL) for FMS-PT-05000-CTLFireability-2024-00
[lola][I] result : true
[lola][I] markings : 65004
[lola][I] fired transitions : 75002
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 57 (type EXCL) for 36 FMS-PT-05000-CTLFireability-2023-12
[lola][I] time limit : 240 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 57 (type EXCL) for FMS-PT-05000-CTLFireability-2023-12
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 50 (type EXCL) for 49 FMS-PT-05000-CTLFireability-2023-15
[lola][I] time limit : 276 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 50 (type EXCL) for FMS-PT-05000-CTLFireability-2023-15
[lola][I] result : false
[lola][I] markings : 40023
[lola][I] fired transitions : 40034
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 44 (type EXCL) for 43 FMS-PT-05000-CTLFireability-2023-13
[lola][I] time limit : 300 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FMS-PT-05000-CTLFireability-2024-00: CTL true CTL model checker
[lola][.] FMS-PT-05000-CTLFireability-2024-09: AG false findpath
[lola][.] FMS-PT-05000-CTLFireability-2023-12: CONJ false state space /EXEF
[lola][.] FMS-PT-05000-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FMS-PT-05000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[lola][.] FMS-PT-05000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2024-11: EFAG 0 1 0 0 3 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 44 CTL EXCL 5/300 21/2000 FMS-PT-05000-CTLFireability-2023-13 4592192 m, 918438 m/sec, 4592981 t fired, .
[lola][.]
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[lola][.] FMS-PT-05000-CTLFireability-2024-00: CTL true CTL model checker
[lola][.] FMS-PT-05000-CTLFireability-2024-09: AG false findpath
[lola][.] FMS-PT-05000-CTLFireability-2023-12: CONJ false state space /EXEF
[lola][.] FMS-PT-05000-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] FMS-PT-05000-CTLFireability-2024-11: EFAG 0 1 0 0 3 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 44 CTL EXCL 10/300 43/2000 FMS-PT-05000-CTLFireability-2023-13 9439257 m, 969413 m/sec, 9440880 t fired, .
[lola][.]
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[lola][.] FMS-PT-05000-CTLFireability-2024-09: AG false findpath
[lola][.] FMS-PT-05000-CTLFireability-2023-12: CONJ false state space /EXEF
[lola][.] FMS-PT-05000-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
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[lola][.] FMS-PT-05000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2024-11: EFAG 0 1 0 0 3 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 44 CTL EXCL 15/300 64/2000 FMS-PT-05000-CTLFireability-2023-13 14194633 m, 951075 m/sec, 14197084 t fired, .
[lola][.]
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[lola][.] FMS-PT-05000-CTLFireability-2024-00: CTL true CTL model checker
[lola][.] FMS-PT-05000-CTLFireability-2024-09: AG false findpath
[lola][.] FMS-PT-05000-CTLFireability-2023-12: CONJ false state space /EXEF
[lola][.] FMS-PT-05000-CTLFireability-2023-15: CTL false CTL model checker
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[lola][.] FMS-PT-05000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2024-11: EFAG 0 1 0 0 3 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
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[lola][.] 44 CTL EXCL 20/300 86/2000 FMS-PT-05000-CTLFireability-2023-13 19048939 m, 970861 m/sec, 19052230 t fired, .
[lola][.]
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[lola][.] FMS-PT-05000-CTLFireability-2024-09: AG false findpath
[lola][.] FMS-PT-05000-CTLFireability-2023-12: CONJ false state space /EXEF
[lola][.] FMS-PT-05000-CTLFireability-2023-15: CTL false CTL model checker
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[lola][.] FMS-PT-05000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
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[lola][.] FMS-PT-05000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2024-11: EFAG 0 1 0 0 3 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
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[lola][.]
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[lola][.] 44 CTL EXCL 25/300 108/2000 FMS-PT-05000-CTLFireability-2023-13 23931060 m, 976424 m/sec, 23935203 t fired, .
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[lola][.] FMS-PT-05000-CTLFireability-2024-09: AG false findpath
[lola][.] FMS-PT-05000-CTLFireability-2023-12: CONJ false state space /EXEF
[lola][.] FMS-PT-05000-CTLFireability-2023-15: CTL false CTL model checker
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[lola][.] FMS-PT-05000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2024-11: EFAG 0 1 0 0 3 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 44 CTL EXCL 30/300 129/2000 FMS-PT-05000-CTLFireability-2023-13 28735831 m, 960954 m/sec, 28740813 t fired, .
[lola][.]
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[lola][.] FMS-PT-05000-CTLFireability-2024-09: AG false findpath
[lola][.] FMS-PT-05000-CTLFireability-2023-12: CONJ false state space /EXEF
[lola][.] FMS-PT-05000-CTLFireability-2023-15: CTL false CTL model checker
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[lola][.] FMS-PT-05000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2024-11: EFAG 0 1 0 0 3 0 0 0
[lola][.] FMS-PT-05000-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 44 CTL EXCL 35/300 151/2000 FMS-PT-05000-CTLFireability-2023-13 33554810 m, 963795 m/sec, 33560642 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 402 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FMS-PT-05000"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FMS-PT-05000, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r159-smll-171636267800354"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FMS-PT-05000.tgz
mv FMS-PT-05000 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;